Silicon Photonic Integrated Circuits Research Articles

Physics to system-level modeling of silicon-organic-hybrid nanophotonic devices

The continuous growth in data volume has sparked interest in silicon-organic-hybrid (SOH) nanophotonic devices integrated into silicon photonic integrated circuits (PICs). SOH devices offer improved speed and energy efficiency compared to silicon photonics devices. However, a comprehensive and accurate modeling methodology of SOH devices, such as modulators corroborating experimental results, is lacking. While some preliminary modeling approaches for SOH devices exist, their reliance on theoretical and numerical methodologies, along with a lack of compatibility with electronic design automation (EDA), hinders their seamless and rapid integration with silicon PICs. Here, we develop a phenomenological, building-block-based SOH PICs simulation methodology that spans from the physics to the system level, offering high accuracy, comprehensiveness, and EDA-style compatibility. Our model is also readily integrable and scalable, lending itself to the design of large-scale silicon PICs. Our proposed modeling methodology is agnostic and compatible with any photonics-electronics co-simulation software. We validate this methodology by comparing the characteristics of experimentally demonstrated SOH microring modulators (MRMs) and Mach Zehnder modulators with those obtained through simulation, demonstrating its ability to model various modulator topologies. We also show our methodology's ease and speed in modeling large-scale systems. As an illustrative example, we use our methodology to design and study a 3-channel SOH MRM-based wavelength-division (de)multiplexer, a widely used component in various applications, including neuromorphic computing, data center interconnects, communications, sensing, and switching networks. Our modeling approach is also compatible with other materials exhibiting the Pockels and Kerr effects. To our knowledge, this represents the first comprehensive physics-to-system-level EDA-compatible simulation methodology for SOH modulators.

Ultrahigh extinction ratio and a low power silicon thermo-optic switch.

The silicon thermo-optic switch (TOS) is one of the most fundamental and crucial blocks in large-scale silicon photonic integrated circuits (PICs). An energy-efficient silicon TOS with ultrahigh extinction ratio can effectively mitigate cross talk and reduce power consumption in optical systems. In this Letter, we demonstrate a silicon TOS based on cascading Mach-Zehnder interferometers (MZIs) with spiral thermo-optic phase shifters. The experimental results show that an ultrahigh extinction ratio of 58.8 dB is obtained, and the switching power consumption is as low as 2.32 mW/π without silicon air trench. The rise time and fall time of the silicon TOS are about 10.8 and 11.2 µs, respectively. Particularly, the figure of merit (FOM) has been improved compared with previously reported silicon TOS. The proposed silicon TOS may find potential applications in optical switch arrays, on-chip optical delay lines, etc.

Efficient Verilog-A based time-domain variability analysis method for passive photonic integrated circuits

The performance of silicon photonic integrated circuits (PICs), especially wavelength filters, can be highly sensitive to variations in the fabrication process due to the large refractive index contrast of the silicon on insulator platform. This paper proposes an easy-to-implement and efficient time-domain variability analysis method for passive PICs. The method utilizes the polynomial chaos expansion technique to construct Verilog-A based models for estimating the statistical information of stochastic passive PICs. In comparison to existing methods, this approach is considerably easy to implement, efficient, and exhibits superior scalability, particularly as the numbers of ports and random parameters in the studied PICs increase. The technique is demonstrated via the time-domain variability analysis of a ring-resonator-based wavelength filter and a Mach-Zehnder interferometer-based demultiplexer filter.

Thermal flux manipulation on the silicon photonic chip to suppress the thermal crosstalk

The integration density of silicon photonic integrated circuit (PIC) is ultimately constrained by various crosstalk mechanisms on the chip. Among them, the most prominent limiting factor is the thermal crosstalk due to the wide use of the thermo-optic effect. High-density silicon PICs strongly demand an advanced structure with better thermal crosstalk suppression ability than the traditional air isolation trench. Inspired by the thermal-metamaterial based on the scattering-cancellation method, we demonstrate a closed heat shield (CHS) structure on a silicon PIC chip, which can manipulate the thermal flux to bypass the temperature-sensitive silicon photonics components. The on-chip CHS structure is a bilayer cylindrical shell fabricated by the standard silicon photonics processing flow. Its outer and inner shell layers are formed by a 6-μm-wide interconnection metal and 4-μm-wide air trench, respectively. Plenty of temperature-sensitive micro-ring resonators inside the CHS are used to probe the temperature profile. The measurement results show that the CHS can reduce the local temperatures by 50%/44%/36% at the locations 29/41/83 μm away from the external heater. In contrast, the conventional air trench of the same dimension reduces the local temperatures by 32%/28%/21% at the same positions. In addition, the response time of the thermal field inside the CHS is around one-half of that in the conventional air trench. Furthermore, the simulation result indicates that if the outer shell of the CHS can contact with the silicon substrate by utilizing the through-silicon-via structure, the thermal crosstalk suppression ability can be improved significantly.

Monolithic back-end-of-line integration of phase change materials into foundry-manufactured silicon photonics

Monolithic integration of novel materials without modifying the existing photonic component library is crucial to advancing heterogeneous silicon photonic integrated circuits. Here we show the introduction of a silicon nitride etch stop layer at select areas, coupled with low-loss oxide trench, enabling incorporation of functional materials without compromising foundry-verified device reliability. As an illustration, two distinct chalcogenide phase change materials (PCMs) with remarkable nonvolatile modulation capabilities, namely Sb2Se3 and Ge2Sb2Se4Te1, were monolithic back-end-of-line integrated, offering compact phase and intensity tuning units with zero-static power consumption. By employing these building blocks, the phase error of a push-pull Mach–Zehnder interferometer optical switch could be reduced with a 48% peak power consumption reduction. Mirco-ring filters with >5-bit wavelength selective intensity modulation and waveguide-based >7-bit intensity-modulation broadband attenuators could also be achieved. This foundry-compatible platform could open up the possibility of integrating other excellent optoelectronic materials into future silicon photonic process design kits.

Optimization of a programmable λ/2-pitch optical phased array

Abstract A challenge in optical phased arrays (OPAs) is to achieve single-lobe emission using densely spaced emitters without incurring inter-waveguide optical crosstalk. Here, we propose to heuristically optimize the amplitude and phase of each grating antenna in an OPA to correct for optical non-idealities, including fabrication variations and inter-waveguide crosstalk. This method was applied to a silicon photonic integrated circuit with 1 mm-long gratings at 775 nm spacing for operation in a wavelength range of 1450–1650 nm. We achieved a wide two-dimensional beam-steering range of 110° × 28°, evaluated over a 127° × 47° field-of-view (FOV). Within this FOV, we measured an average sidelobe suppression of 8.2 dB and focused on average, 34.5 % of the emitted power into the main lobe. We achieved a peak sidelobe suppression of 14.5 dB and 50 % of the power concentrated in the main lobe. The approach is suitable for applications that require alias-free out-of-plane emission.

Nanophotonic phased array XY Hamiltonian solver

Solving large-scale computationally hard optimization problems using existing computers has hit a bottleneck. A promising alternative approach uses physics-based phenomena to naturally solve optimization problems, wherein the physical phenomena evolve to their minimum energy. In this regard, photonics devices have shown promise as alternative optimization architectures, benefiting from high-speed, high-bandwidth, and parallelism in the optical domain. Among photonic devices, programmable spatial light modulators (SLMs) have shown promise in solving large scale Ising model problems, to which many computationally hard problems can be mapped. Despite much progress, existing SLMs for solving the Ising model and similar problems suffer from slow update rates and physical bulkiness. Here, we show that using a compact silicon photonic integrated circuit optical phased array (PIC-OPA), we can simulate an XY Hamiltonian, a generalized form of the Ising Hamiltonian, where spins can vary continuously. In this nanophotonic XY Hamiltonian solver, the spins are implemented using analog phase shifters in the optical phased array. The far field intensity pattern of the PIC-OPA represents an all-to-all coupled XY Hamiltonian energy and can be optimized with the tunable phase-shifters, allowing us to solve an all-to-all coupled XY model. Our results show the utility of PIC-OPAs as compact, low power, and high-speed solvers for nondeterministic polynomial-hard problems. The scalability of the silicon PIC-OPA and its compatibility with monolithic integration with CMOS electronics further promise the realization of a powerful hybrid photonic/electronic non-Von Neumann compute engine.

Chiral forces in longitudinally invariant dielectric photonic waveguides

We calculate numerically the optical chiral forces in rectangular cross-section dielectric waveguides for potential enantiomer separation. Our study considers force strength and time needed for separating chiral nanoparticles, mainly via quasi-TE guided modes at short wavelengths (405 nm) and the 90°-phase-shifted combination of quasi-TE and quasi-TM modes at longer wavelengths (1310 nm). Particle tracking simulations show successful enantiomer separation within two seconds. These results suggest the feasibility of enantiomeric separation of nanoparticles displaying sufficient chirality using simple silicon photonic integrated circuits, with wavelength selection based on the nanoparticle size.

Generating high-dimensional entanglement using a foundry-fabricated photonic integrated circuit

We present a silicon photonic integrated circuit (PIC) designed to generate high-dimensional (HD) entanglement across four discrete waveguide path modes. Our PIC is foundry fabricated and fully packaged with electrical wirebonds and an epoxy bonded fiber array. We performed a partial characterization of our system’s density matrix by demonstrating spectral indistinguishability of photon pairs, measuring the joint coincidence distribution of photon pairs across all pairs of output modes, and measuring the coherences of different mode pairs using two-photon interference. Using a quantitative entanglement witness, we have determined that our system generates at least 1.45 ± 0.15 ebits of HD photonic entanglement.

Present and future of micro-transfer printing for heterogeneous photonic integrated circuits

We present the current state of the art in micro-transfer printing for heterogeneously integrated silicon photonic integrated circuits. The versatility of the technology is highlighted, as is the way ahead to make this technology a key enabler for next-generation photonic systems-on-chip.

High-responsivity on-chip waveguide coupled germanium photodetector for 2 μm waveband

Recently, the emerging 2 μm waveband has gained increasing interest due to its great potential for a wide scope of applications. Compared with the existing optical communication windows at shorter wavelengths, it also offers distinct advantages of lower nonlinear absorption, better fabrication tolerance, and larger free carrier plasma effects for silicon photonics, which has been a proven device technology. While much progress has been witnessed for silicon photonics at the 2 μm waveband, the primary challenge still exists for on-chip detectors. Despite the maturity and compatibility of the waveguide coupled photodetectors made of germanium, the 2 μm regime is far beyond its cutoff wavelength. In this work, we demonstrate an efficient and high-speed on-chip waveguide-coupled germanium photodetector operating at the 2 μm waveband. The weak sub-bandgap absorption of epitaxial germanium is greatly enhanced by a lateral separation absorption charge multiplication structure. The detector is fabricated by the standard process offered by a commercial foundry. The device has a benchmark performance with responsivity of 1.05 A/W and 3 dB bandwidth of 7.12 GHz, which is able to receive high-speed signals with up to 20 Gbit/s data rate. The availability of such an efficient and fast on-chip detector circumvents the barriers between silicon photonic integrated circuits and the potential applications at the 2 μm waveband.

103 GHz germanium-on-silicon photodiode enabled by an optimized U-shaped electrode

High-performance germanium photodiodes are crucial components in silicon photonic integrated circuits for large-capacity data communication. However, the bandwidths of most germanium photodiodes are limited by the intractable resistance–capacitance parasitic effect. Here, we introduce a unique U-shaped electrode to alleviate this issue, reducing the parasitic effect by 36% without compromising any other performance. Experimentally, a large bandwidth of 103 GHz, an optical responsivity of 0.95 A/W at 1550 nm, and a dark current as low as 1.3 nA are achieved, leading to a record high specific detectivity. This is the first breakthrough to 100 GHz bandwidth among all vertical germanium photodiodes, to the best of our knowledge. Open eye diagrams of 120 Gb/s on-off keying and 200 Gb/s four-level pulse amplitude signals are well received. This work provides a promising solution for chip-based ultra-fast photodetection.

Multi-band all-silicon TM-pass polarizer based on one-dimensional photonic crystals nanohole array

We propose an on-chip transverse magnetic (TM)-pass polarizer utilizing one-dimensional photonic crystals for multi-band operation. The TE0 modes in the 1550/2000nm wave band are suppressed by carefully selecting the pitch lengths of the nanoholes, leveraging the bandgap of the nanohole array. Conversely, the TM0 modes remain almost unaffected. The TM-pass polarizer employs a single-etched design on a standard 220 nm SOI platform and has a compact length of ∼ 17.9 µm. The simulated bandwidths (BWs) for polarization extinction ratios (PERs) > 20 dB and > 25 dB are about 210 nm and 195 nm for the 1550 nm wave band, and 265 nm and 240 nm for the 2000nm wave band. Moreover, the insertion losses (ILs) are ∼ 0.5/0.3 dB at wavelengths of 1550/2000nm, respectively. For the fabricated device, the measured BWs for PER > 20 dB and > 25 dB are evaluated to be larger than 100 nm for both 1550/2000nm wave bands. The measured ILs are 1/0.8 dB at wavelengths of 1550/2000nm. This straightforward and compatible design opens possibilities for the development of practical multi-band silicon photonic integrated circuits.

A 3D Integrated Energy-Efficient Transceiver Realized by Direct Bond Interconnect of Co-Designed 12 nm FinFET and Silicon Photonic Integrated Circuits

A 3D Integrated Energy-Efficient Transceiver Realized by Direct Bond Interconnect of Co-Designed 12 nm FinFET and Silicon Photonic Integrated Circuits

Do different kinds of photon-pair sources have the same indistinguishability in quantum silicon photonics?

In the same silicon photonic integrated circuit, we compare two types of integrated degenerate photon-pair sources (microring resonators and waveguides) using Hong–Ou–Mandel (HOM) interference experiments. Two nominally identical microring resonators are coupled to two nominally identical waveguides, which form the arms of a Mach–Zehnder interferometer. This is pumped by two lasers at two different wavelengths to generate, by spontaneous four-wave mixing, degenerate photon pairs. In particular, the microring resonators can be thermally tuned in or out of resonance with the pump wavelengths, thus choosing either the microring resonators or the waveguides as photon-pair sources, respectively. In this way, an on-chip HOM visibility of 94% with microring resonators and 99% with straight waveguides is measured upon filtering. We compare our experimental results with theoretical simulations of the joint spectral intensity and the purity of the degenerate photon pairs. We verify that the visibility is connected to the sources’ indistinguishability, which can be quantified by the overlap between the joint spectral amplitudes (JSA) of the photon pairs generated by the two sources. We estimate a JSA overlap of 98% with waveguides and 89% with microring resonators.

Recent Progress in Silicon‐Based Photonic Integrated Circuits and Emerging Applications

AbstractIn recent years, with the further ministration of the semiconductor device in integrated circuits, power consumption and data transmission bandwidth have become insurmountable obstacles. As an integrated technology, photonic integrated circuits (PICs) have a promising potential in the post‐Moore era with more advantages in data processing, communication, and diversified sensing applications for their ultra‐high process speed and low power consumption. Silicon photonics is believed to be an encouraging solution to realize PICs because of the mature CMOS process. The past decades have witnessed a huge growth in silicon PICs. However, there is still a demand for the development of silicon PICs to enable powerful chip‐scale systems and new functionalities. In this paper, a review of the photonic components, functional blocks, and emerging applications for PICs is offered. The common photonic components are classified into several sections, including on‐chip light sources, fiber‐to‐chip couplers, photonic resonators, waveguide‐based sensors, on‐chip photodetectors, and modulators. The functional blocks of the PICs mentioned in this review are photonic memories and photonic neural networks. Finally, the paper concludes with emerging applications for further study.

Real-time reconfigurable on-chip photonic frequency decoder.

A group-delay-unit-based integrated silicon photonic integrated circuit (PIC) is employed as a reconfigurable analog radio frequency decoder, which provides a real-time temporal and spectral analysis of any arbitrary multi-tone signal in the micro- and mm-wave range. The circuit is based on cascaded Mach-Zehnder interferometer embedded silicon microring resonators as variable delay units. The temporal decoding of the multi-tone input signal is demonstrated by tuning the signal with respect to the ring resonator delay and resonance. A one-to-one conformal time-to-frequency mapping provides real-time spectral decoding of the signal under test without additional digital signal processing. The idea is validated by several experimental results with single-tone and two-tone input signals in a compact, low-power, silicon PIC. The proposed real-time temporal analog frequency decoder may be very intriguing for high-speed, low-latency wireless applications, such as autonomous driving and 6G.

In‐Plane 1.5 µm Distributed Feedback Lasers Selectively Grown on (001) SOI

AbstractHetero‐epitaxy for integration of efficient III‐V lasers on silicon can enable wafer‐scale silicon photonic integrated circuits, which can unleash the full advantages of silicon photonics in production on large silicon wafers with low cost, high throughput, and large bandwidth and large‐scale integration. In this work, efficient III‐V distributed feedback (DFB) lasers selectively grown on (001) silicon‐on‐insulator (SOI) wafers are presented. The selective hetero‐epitaxy of sufficiently large areas of III‐V segments allows the demonstration of DFB lasers on the SOI wafer. The fabricated DFB lasers feature a co‐planar configuration with the Si layer, allowing for efficient coupling between III‐V lasers and Si waveguides. The unique III‐V‐on‐insulator structure also provides strong optical confinement for the lasers. Gratings are designed and fabricated with minimal non‐radiative recombination and a simple process with good tolerance. The optically pumped DFB laser has a low lasing threshold of around 17.5 µJ cm−2, stable single‐mode lasing at 1.5 µm, a side‐mode‐suppression‐ratio of over 35 dB, and a spontaneous emission factor of 0.7. The results here demonstrate a step forward towards wafer‐scale integration with monolithically grown lasers, thus outlining the prospect of fully integrated Si photonics.

Broadband quantum-dot frequency-modulated comb laser

Frequency-modulated (FM) laser combs, which offer a quasi-continuous-wave output and a flat-topped optical spectrum, are emerging as a promising solution for wavelength-division multiplexing applications, precision metrology, and ultrafast optical ranging. The generation of FM combs relies on spatial hole burning, group velocity dispersion, Kerr nonlinearity, and four-wave mixing (FWM). While FM combs have been widely observed in quantum cascade Fabry-Perot (FP) lasers, the requirement for a low-dispersion FP cavity can be a challenge in platforms where the waveguide dispersion is mainly determined by the material. Here we report a 60 GHz quantum-dot (QD) mode-locked laser in which both the amplitude-modulated (AM) and the FM comb can be generated independently. The high FWM efficiency of –5 dB allows the QD laser to generate FM comb efficiently. We also demonstrate that the Kerr nonlinearity can be practically engineered to improve the FM comb bandwidth without the need for GVD engineering. The maximum 3-dB bandwidth that our QD platform can deliver is as large as 2.2 THz. This study gives novel insights into the improvement of FM combs and paves the way for small-footprint, electrically pumped, and energy-efficient frequency combs for silicon photonic integrated circuits (PICs).

Imaging Analysis of Photonic Integrated Interference Imaging System Based on Compact Sampling Lenslet Array Considering On-Chip Optical Loss

A photonic integrated interference imaging system (PIIIS) is a computational imager based on Michelson interference and photonic integrated circuits (PICs). In this paper, a PIIIS based on a compact sampling lenslet array that can sample the zero spatial frequency through a single lenslet, densely sample the frequency in the azimuth direction through the configuration of a hierarchical multistage lenslet array, and continuously sample the frequency in the radial direction through a Langford sequence is proposed. We introduce the design process of the compact sampling lenslet array in detail and simulate the imaging of the system. The simulation results demonstrate that the lenslet array can effectively improve the imaging quality of a PIIIS. In addition, we design a silicon PIC and a silicon nitride transition PIC that match the compact sampling lenslet array and simulate the imaging of the system under the influence of the on-chip optical loss of PICs (the average interference baseline loss is 15.4 dB at 1550 nm). The results show that on-chip optical loss mainly affects the brightness and contrast of the reconstructed image but has little effect on the structure.