Chemical Vapor Deposition Silicon Research Articles

Studying the Influence of n-Type Strained (111) Silicon on the Piezoresistive Coefficients

This paper investigates the effect of inducing a pre-strain state into the (111) silicon substrate on the piezoresistive coefficients. For this purpose, a ten-element sensing rosette has been fabricated on strained and unstrained silicon substrates and fully calibrated using uniaxial, thermal, and hydrostatic loading. The strained silicon technique was integrated during the microfabrication process using a highly compressive film produced by plasma enhanced chemical vapor deposition silicon nitride. This layer induces a tensile strain at the front side of the substrate where the sensing elements were fabricated. The calibration results show that the tensile strained silicon has smaller longitudinal and transverse piezoresistive coefficients than those on unstrained silicon. On the other hand, the shear piezoresistive and the pressure coefficients were increased by 23% and 30%, respectively.

Copper indium gallium selenide (CIGS) solar cell devices on steel substrates coated with thick SiO2-based insulating material

Flexible copper indium gallium selenide (CIGS)-based solar cells were developed on stainless steel (STS) substrates covered with an insulating layer. The properties of the CIGS films fabricated on STS foils coated with SiO2-based soluble material (“sol-SiO2”) were compared with those on plasma enhanced chemical vapor-deposited silicon oxide (“PE-SiO2”)/MoNa/STS and SLG substrates. The decrease in compensating donor due to sufficient Na doping from the insulating layer was attributed to higher open-circuit voltage and fill factor. Furthermore, the double graded Ga composition in the CIGS films grown on the STS substrates was preserved, and the open-circuit voltage was enhanced with a minor decrease in the short-circuit current. As a result, solar cells with 14% efficiency were produced on sol-SiO2/STS samples with a Fe atom diffusion barrier and external Na incorporation. This was far higher than the 9.5% and 12.8% obtained from the solar cells on PE-SiO2/MoNa/STS and SLG, respectively.

27 pT Silicon Nitride MEMS Magnetometer for Brain Imaging

We report the design, fabrication, and characterization of an ultrasensitive resonant (~300–400 Hz) magnetometer with 0.67-mV/nT sensitivity. The sensor was composed of a low stress (−14 MPa) low-pressure chemical vapor deposition silicon nitride cross bridge and a neodymium magnet. External magnetic field biasing (to modify the effective Hooke’s constant), shielding, mechanical isolation, and parametric amplification and feedback were used to progressively improve the sensor performance from 1 $\mu \text{T}$ minimum detectable signal to 27 pT; an improvement of five orders of magnitude. The sensor’s average temperature sensitivity around the room temperature was 11.9 pV/pT/°C.

Electronic Properties of a-SiO<inline-formula> <tex-math notation="LaTeX">${}_{x}$</tex-math> </inline-formula>N<inline-formula> <tex-math notation="LaTeX">${}_{y}$</tex-math> </inline-formula>:H/SiN<inline-formula> <tex-math notation="LaTeX">${}_{x}$</tex-math> </inline-formula> Stacks for Surface Passivation of P-Type Crystalline Si Wafers

The surface passivation quality of plasma-enhanced chemical vapor-deposited silicon oxynitride/silicon nitride (a-SiO ${}_{x}$ N ${}_{y}$ :H/SiN ${}_{x}$ ) stacks has been investigated for p-type float-zone crystalline silicon wafers. The effective lifetime $\tau _{\rm{eff}}$ , density of fixed charge $Q_{{f}}$ , and density of interface defects $D_{\rm{it}}$ were measured as a function of the a-SiO ${}_{x}$ N ${}_{y}$ :H layer thickness both before and after firing at 800 °C for 3 s. Photoluminescence imaging under applied bias has been used to characterize $Q_{{f}}$ and the surface recombination parameters ${\rm S}_{\rm 0n}$ and ${\rm S}_{\rm 0p}$ through fitting $\tau _{\rm{eff}}$ versus voltage curves to an extended Shockley–Read–Hall (SRH) model. The results are in good agreement with values measured using capacitance–conductance–voltage measurements. Good surface passivation has been obtained with a peak effective lifetime of 2.41 ms. For both as-deposited and fired samples, $Q_{{f}}$ and $D_{\rm{it}}$ decrease with increasing a-SiO ${}_{x}$ N ${}_{y}$ :H layer thickness up to ∼18 nm. The results indicate that the field-effect passivation is weakened as the a-SiO ${}_{x}$ N ${}_{y}$ :H thickness increases and that chemical passivation from a-SiO ${}_{x}$ N ${}_{y}$ :H/SiN ${}_{x}$ plays a prominent role. Increasing the a-SiO ${}_{x}$ N ${}_{y}$ :H/SiN ${}_{x}$ thickness to 50 nm produces similar results, indicating that an 18-nm interlayer is enough to obtain the desired passivation properties. Compared with as-deposited samples, fired samples exhibit lower $D_{\rm{it}}$ , indicating that the firing process enhances chemical passivation of the a-SiO ${}_{x}$ N ${}_{y}$ :H/SiN ${}_{x}$ stacks.

Fabrication of normally-off AlGaN/GaN metal–insulator–semiconductor high-electron-mobility transistors by photo-electrochemical gate recess etching in ionic liquid

We characterized an ionic liquid (1-butyl-3-methylimidazolium nitrate, C8H15N3O3) as a photo-electrochemical etchant for fabricating normally-off AlGaN/GaN metal–insulator–semiconductor high-electron-mobility transistors (MIS-HEMTs). Using the ionic liquid, we achieved an etching rate of ∼2.9 nm/min, which is sufficiently low to facilitate good etching control. The normally-off AlGaN/GaN MIS-HEMT was fabricated with an etching time of 6 min, with the 20 nm low-pressure chemical vapor deposition (LPCVD) silicon nitride (Si3N4) gate dielectric exhibiting a threshold voltage shift from −10 to 1.2 V, a maximum drain current of more than 426 mA/mm, and a breakdown voltage of 582 V.

Silicon Surface Passivation by Gallium Oxide Capped With Silicon Nitride

Advances in the passivation of p-type and $p^{+}$ surfaces have been one of the main developments in crystalline silicon solar cell technology in recent years, enabling significant progress in p-type solar cells with partial rear contacts, and n-type solar cells with front-side boron diffusions. In this contribution, we demonstrate improvements in the passivation of p-type and boron diffused $p^{+}$ surfaces with plasma-enhanced atomic layer deposition (PEALD) gallium oxide (Ga2O3) with the addition of plasma-enhanced chemical vapor deposition (PECVD) silicon nitride (SiNx). On 1.6 Ωcm p-type wafers, we measure an improvement in the upper limit surface recombination velocity ( $S_{{\rm eff, \text{UL}}}$ ) from 2.5 to 1.4 cm/s on optimized Ga2O3 passivated samples before and after SiNx capping. We also show an improvement in the passivation of boron diffused $p^{+}$ surfaces over previously reported data, measuring a recombination parameter ( $J_{0}$ ) of 26 fA/cm2 on a Ga2O3 passivated 85 Ω/sq boron diffusion, approaching the Auger limit of ∼21 fA/cm2 for this diffusion. In addition, we show that initial studies on the thermal stability of the Ga2O3/SiNx stack indicate that it is compatible with conventional screen-printed metallization firing procedures.

Thermal annealing effects on the stress stability in silicon dioxide films grown by plasma-enhanced chemical vapor deposition

The stress stability in plasma-enhanced chemical vapor deposition (PECVD) silicon dioxide (SiO2) films is a key factor of device performance. In this study, the PECVD SiO2 films are annealed at 400–1000 °C in a nitrogen (N2) or oxygen (O2) ambience for 2 h. The influences of annealing parameters on the stress state and stress stability in PECVD SiO2 films are investigated. The bonding nature and surface morphology of the films are also studied to analyze the physical mechanism involved. It is demonstrated that the stress stability is first deteriorated and then improved with increasing annealing temperature. In addition, O2 ambience is more appropriate to improve stress stability than N2, and the stress in PECVD SiO2 film can be stabilized when it is annealed at 1000 °C in O2 ambience. These results should be able to provide important insights into the design of device fabrication processes.

Novel orthogonal velocity polishing tool and its material removal characteristics from CVD SiC mirror surfaces.

A new and patented polishing tool called Orthogonal Velocity field Tool (OVT) was built and its material removal characteristics from Chemical Vapor Deposition Silicon Carbide (CVD SiC) mirror surfaces were investigated in this study. The velocity field of OVT is produced by rotating the bicycle type tool in the two orthogonal axes, and this concept is capable of producing a material removal foot print of pseudo Gaussian shapes. First for the OVT characterization, we derived a theoretical material removal model using distributions of pressure exerted onto the workpiece surface, relative speed between the tool and workpiece surface, and dwell time inside the tool- workpiece contact area. Second, using two flat CVD SiC mirrors that are 150 mm in diameter, we ran material removal experiments over machine run parameter ranging from 12.901 to 25.867 psi in pressure, from 0.086 m/sec to 0.147 m/sec tool in the relative speed, and 5 to 15 sec in dwell time. Material removal coefficients are obtained by using the in-house developed data analysis program. The resulting material removal coefficient varies from 3.35 to 9.46 um/psi hour m/sec with a mean value of 5.90 ± 1.26(standard deviation). We describe the technical details of the new OVT machine, the data analysis program, the experiments, and the results together with the implications to the future development of the machine.

Thin-Film Multichip Packaging for High-Temperature Geothermal Application

A thin-film multichip module substrate technology has been developed and evaluated for packaging high-temperature (300 °C) geothermal well instrumentation. The base substrate technology selected was AlN to minimize the difference in the coefficient of thermal expansion between the substrate and the SiC digital die. The conductor was vacuum deposited Ti/Ti:W/Au followed by an electroplated Au. A plasma-enhanced chemical vapor-deposited silicon nitride was used for the interlayer dielectric. The substrate was characterized as a function of temperature and after aging at 300 °C. The electrical properties and adhesion remained stable after 2000 h at 300 °C.

Effect of hyperthermal annealing on LPCVD silicon nitride

The objective of this paper is to understand the effects of 1100°C annealing on film thickness, refractive index and especially residual stress of low-pressure chemical vapor deposition (LPCVD) silicon nitride films. The annealing effect on Young's modulus of silicon nitride films is also discussed. For these purposes, a number of 1100°C furnace annealing processes in N2 atmosphere were carried out. With the increase of annealing time, film thickness decreases exponentially and correspondingly the refractive index increases. Both film thickness and refractive index reach a stable value after several times annealing. Due to the film densification and viscous flow, residual stress of Si–Si3N4 system increases in the first 10min annealing treatment and then decreases in the following annealing processes. Based on the Maxwell viscoelastic model, an improved model which considers film densification and viscous flow simultaneously is built to explain the effect of annealing process on residual stress.

Improving stress stability in low-pressure chemical vapor deposited silicon dioxide films by ion implantation

The stress state of low-pressure chemical vapor deposition (LPCVD) silicon dioxide (SiO2) films fluctuates upon aging due to the ambient moisture. The related variation of the SiO2 films is a key factor of device reliability. In this study, ion implantation is introduced to improve film stress stability. The stress state modified by ion implantation is discussed in detail and an analytical model is presented. The evolution of the stress in as-deposited and P+-, As+-, and B+-implanted LPCVD SiO2 films upon aging is investigated, and the bonding nature of the films is also studied to provide insight into the physical mechanisms involved. It is demonstrated that low implantation energy slightly modifies the stress in films. In addition, P+ ion is the most appropriate impurity ion to improve film stress stability, and the stress in P+-implanted LPCVD SiO2 film can be stabilized with a low tensile stress of 67MPa when the film is implanted at 15keV with a dose of 1×1015cm−2.

Investigation of E-Beam Evaporated Silicon Film Properties for MEMS Applications

This paper investigates the crystallinity, microstructure, surface morphology, stress characteristics, and Young’s Modulus of ultrahigh vacuum (UHV) electron-beam (E-beam) evaporated silicon films with a low thermal budget. The films are evaporated at various substrate temperatures ranging from 200 °C–625 °C, deposition rates ranging from 50 to 400 nm/min, and annealed at 600 °C for various durations. Some of the preliminary results were reported by Michael and Kwok. The results indicate that the film characteristics of the evaporated silicon films are significantly different from and better suited for microelectromechanical systems (MEMS) applications than low pressure chemical vapor deposition silicon films, commonly used for MEMS devices. The very attractive properties of UHV E-beam deposited silicon films are remarkably low residual stress (both average and gradient), very smooth surface morphology, and thick layers at a low thermal budget with reasonably large deposition rates. Two different mechanisms have been identified as responsible for initiating the formation of crystal grains in these films: 1) kinetic energy of evaporated silicon atoms; and 2) thermal energy from the substrate heating. The first mechanism leads to fine columnar grains responsible for the smooth surface morphology and easily controllable low stress characteristics. The second mechanism results in coarse grain formation with a relatively higher proportion of (111) oriented grains. Cantilever beams of 30- $\mu \text{m}$ thickness have been fabricated from such films with rms roughness of $\mu \text{m}$ with Young’s Modulus of 169 GPa. [2015-0096]

Normally Off AlGaN/GaN MIS-High-Electron Mobility Transistors Fabricated by Using Low Pressure Chemical Vapor Deposition Si<sub>3</sub>N<sub>4</sub> Gate Dielectric and Standard Fluorine Ion Implantation

This letter presents a fabrication technology of enhancement-mode (E-mode) AlGaN/GaN metal-insulator–semiconductor high-electron mobility transistors (MIS-HEMTs) using 10 keV fluorine ion implantation. An 8 nm low-pressure chemical vapor deposition silicon nitride layer was deposited on the AlGaN as gate dielectric and energy-absorbing layer that slows down the high energy (10 keV) fluorine ions to reduce the implantation damage. The E-mode MIS-HEMTs exhibit a threshold voltage as high as +3.3 V with a maximum drain current over 200 mA/mm (250 mA/mm for depletion-mode MIS-HEMTs) and a high on/off current ratio of $10^{9}$ . Meanwhile, the E-mode MIS-HEMT dynamic $R_{\mathrm{\scriptscriptstyle ON}}$ is only 1.53 times larger than the static $R_{\mathrm{\scriptscriptstyle ON}}$ after off-state $V_{\mathrm {DS}}$ stress of 500 V.

Characterization of Leakage and Reliability of SiN<sub><italic>x</italic></sub> Gate Dielectric by Low-Pressure Chemical Vapor Deposition for GaN-based MIS-HEMTs

In this paper, we systematically investigated the leakage and breakdown mechanisms of the low-pressure chemical vapor deposition (LPCVD) silicon nitride thin film deposited on AlGaN/GaN heterostructures. The LPCVD-SiN x gate dielectric exhibits low leakage and high breakdown electric field. The dominant mechanism of the leakage current through LPCVD-SiN x gate dielectric is identified to be Poole–Frenkel emission at low electric field and Fowler–Nordheim tunneling at high electric field. Both electric-field-accelerated and temperature-accelerated time-dependent dielectric breakdown of the LPCVD-SiN x gate dielectric were also investigated.

Reliability of platinum electrodes and heating elements on SiO2 insulation layers and membranes

In this work, failure mechanisms of Pt electrodes including adhesion problems, material migration due to thermally induced compressive stress and electromigration that could occur in the platinum electrodes and heater structures at temperatures above 600°C have been systematically studied, after the deposition. Lifetime determination, scanning electron microscopy and XRD analysis have been applied for samples which have experienced different loading conditions in order to qualitatively and quantitatively understand the phenomena. Electromigration testing is performed with the aim to enable time-to-failure prediction for sensor elements and compare different platinum layers in terms of their stability. Dedicated, application-related test structures are used so that the results are applicable to sensor lifetime estimations. Furthermore, a method for the determination of thermal conductivity of thin insulating films has been adapted for the characterization of plasma-enhanced chemical vapor deposition (PECVD) silicon oxide and successfully applied on two materials with different deposition recipes. These two materials are used for the fabrication of platinum-based heating elements with PECVD SiO2 as insulation or membrane layer. The results for the two recipes are similar but with a significant difference. A slight increase of the conductivities has been observed due to a thermal anneal of the test structures at temperatures above 700°C.

Alignment of nanoparticles, nanorods, and nanowires during chemical vapor deposition of silicon

We fabricated silicon nanostructures (Si-NSs) on SiO x /Si substrate in chemical vapor deposition. During the synthesis of Si-NSs, Si sunflower-shaped structures of one to hundred microns were observed, therein the nanoparticles (NPs), nanowires, and nanorods were aligned in an ordered manner. We suggest that the NSs reported here are evolved by the electrostatic force exerted by charged NPs in gas phase. This NS would help in understanding the role of spontaneous charging of NPs in the gas phase and the role of charged NPs in the gas phase for NSs growth.

Study of the a-Si:H/c-Si Heterointerface by Ex-Situ Spectroscopic Ellipsometry, Infrared Spectroscopy, and Solar Cell Modeling

The interface formation between plasma-enhanced chemical vapor-deposited (PECVD) silicon thin films and H-terminated, p-type c-Si was investigated. The formation of hydrogenated amorphous silicon (a-Si:H), epitaxial Si, and mixed phase Si was detected through spectroscopic ellipsometry (SE) and high-resolution transmission electron mi- croscopy (HRTEM). The evolution of the hydrogen content and hydrogen bonding configurations in the films were monitored by attenuated total reection infrared spectroscopy (FTIR-ATR). The dependence of the hydrogen binding configuration on the film morphology was observed. Even with an observed epitaxial layer in the structure of the intrinsic a-Si:H, a silicon heterojunction (SHJ) solar cell with 9.2% efficiency was obtained, which is the largest-active-area (72 cm^2) SHJ cell on p-type c-Si. The numerical simulation tool AFORS-HET was used to model the layers and interface properties of the cell. The simulation results were consistent with the experimental results, demonstrating the importance of interface defect passivation in SHJ solar cells.

CFD–PBM coupled simulation of silicon CVD growth in a fluidized bed reactor: Effect of silane pyrolysis kinetic models

The coupled numerical code of Eulerian–Granular model and population balance model was applied to simulate silane-derived silicon chemical vapor deposition growth in a three-dimensional fluidized bed reactor. Two silane homogenous kinetic models were used to obtain the gaseous concentration of silicon cluster for further calculation on cluster scavenging rate, and two heterogeneous kinetic models implemented to evaluate the rate of silane surface deposition. The applicability of silane pyrolysis kinetic models on gaseous species and silicon growth were analyzed in detail after the verification of fundamental flow behavior. The results showed that the growth rate agreed well with Hsu’s experimental data under the combination kinetic models of Hogness’s homogenous and Furusawa’s heterogeneous ones, in which a complete silane decomposition was almost achieved, but the impractical growth result was obtained as inlet silane mole fraction higher than 0.5. Moreover, the interphase mass transfer of silane surface deposition and cluster scavenging was also focused, which showed that silane surface deposition tended to occur at the solid dense bottom region with higher mass transfer rate and cluster scavenging happened in almost the whole solid phase.

PECVD low stress silicon nitride analysis and optimization for the fabrication of CMUT devices

Two technological options to achieve a high deposition rate, low stress plasma-enhanced chemical vapor deposition (PECVD) silicon nitride to be used in capacitive micromachined ultrasonic transducers (CMUT) fabrication are investigated and presented. Both options are developed and implemented on standard production line PECVD equipment in the framework of a CMUT technology transfer from R & D to production. A tradeoff between deposition rate, residual stress and electrical properties is showed.The first option consists in a double layer of silicon nitride with a relatively high deposition rate of ~100 nm min−1 and low compressive residual stress, which is suitable for the fabrication of the thick nitride layer used as a mechanical support of the CMUTs. The second option involves the use of a mixed frequency low-stress silicon nitride with outstanding electrical insulation capability, providing improved mechanical and electrical integrity of the CMUT active layers. The behavior of the nitride is analyzed as a function of deposition parameters and subsequent annealing. The nitride layer characterization is reported in terms of interfaces density influence on residual stress, refractive index, deposition rate, and thickness variation both as deposited and after thermal treatment. A sweet spot for stress stability is identified at an interfaces density of 0.1 nm−1, yielding 87 MPa residual stress after annealing. A complete CMUT device fabrication is reported using the optimized nitrides. The CMUT performance is tested, demonstrating full functionality in ultrasound imaging applications and an overall performance improvement with respect to previous devices fabricated with non-optimized silicon nitride.

CMUTs with high-K atomic layer deposition dielectric material insulation layer.

Use of high-κ dielectric, atomic layer deposition (ALD) materials as an insulation layer material for capacitive micromachined ultrasonic transducers (CMUTs) is investigated. The effect of insulation layer material and thickness on CMUT performance is evaluated using a simple parallel plate model. The model shows that both high dielectric constant and the electrical breakdown strength are important for the dielectric material, and significant performance improvement can be achieved, especially as the vacuum gap thickness is reduced. In particular, ALD hafnium oxide (HfO2) is evaluated and used as an improvement over plasma-enhanced chemical vapor deposition (PECVD) silicon nitride (Six)Ny)) for CMUTs fabricated by a low-temperature, complementary metal oxide semiconductor transistor-compatible, sacrificial release method. Relevant properties of ALD HfO2) such as dielectric constant and breakdown strength are characterized to further guide CMUT design. Experiments are performed on parallel fabricated test CMUTs with 50-nm gap and 16.5-MHz center frequency to measure and compare pressure output and receive sensitivity for 200-nm PECVD Six)Ny) and 100-nm HfO2) insulation layers. Results for this particular design show a 6-dB improvement in receiver output with the collapse voltage reduced by one-half; while in transmit mode, half the input voltage is needed to achieve the same maximum output pressure.