Silicon Carbide Insulated Gate Bipolar Transistor Research Articles

A Novel 4H–SiC/Si Heterojunction IGBT Achieving Low Turn–Off Loss

In this paper, a novel silicon carbide (SiC) insulated gate bipolar transistor (IGBT) with a 4H–SiC/Si heterojunction in the buffer layer (HBL) is proposed to improve the turn–off characteristic. Compared with the conventional 4H–SiC IGBT, the polysilicon region is integrated in the buffer layer to form a natural potential well, which can help to store excess carriers in the turn–off process. The simulation results indicate that the turn–off time (toff) was reduced from 325 ns to 232 ns, and the turn–off loss (Eoff) was decreased from 2.619 mJ to 1.375 mJ, while a similar on–state ability was maintained. This means that reductions of 28.6% in toff and 47.5% in Eoff were achieved. The Eoff of the two devices at different forward voltages (VF) was compared by changing the carrier lifetime. As a result, a better trade–off between Eoff and VF was also achieved by the proposed HBL–IGBT. Moreover, the heterojunction of the HBL–IGBT can be formed with the plasma–activated direct bonding technology, which is compatible with the conventional fabrication process.

10kV+ Rated SiC n-IGBTs: Novel Collector-Side Design Approach Breaking the Trade-Off between dV/dt and Device Efficiency

10kV+ rated 4H- Silicon Carbide (SiC) Insulated Gate Bipolar Transistors (IGBTs) have the potential to become the devices of choice in future Medium Voltage (MV) and High Voltage (HV) power converters. However, one significant performance concern of SiC IGBTs is the extremely fast collector voltage rise (dV/dt) observed during inductive turn-off. Studies on the physical mechanisms of high dV/dt in 4H-SiC IGBTs revealed the importance of collector-side design in controlling the phenomenon. In this paper we propose a novel collector-side design approach, which consists of four n-type layers with optimized doping densities and allows the control of dV/dt independently from the device performance. Further, we demonstrate a reduction of dV/dt by 87% without degrading the high switching frequency capability of the device, or the on-state performance, through the addition of two n-type epitaxial layers in the collector side, between the buffer and the drift regions.

Cell Design Consideration in SiC Planar IGBT and Proposal of New SiC IGBT With Improved Performance Trade-Off

In silicon carbide (SiC) planar insulated-gate bipolar transistor (IGBT), a large distance between neighboring p-bodies is beneficial to enhance the on-state conductivity modulation, but will expose the gate oxide to high electric field in off-state. With p-bodies placed closer, the gate oxide field is reduced, but the conductivity modulation is suppressed. In this work, a new SiC planar IGBT with oxide shield is proposed and studied by TCAD simulations. The proposed SiC IGBT achieves improved trade-off between on-state voltage drop (VON) and maximum gate oxide electric field (Eox-m). When a quite larger distance between neighboring p-bodies is adopted in the proposed SiC IGBT, a low VON is obtained, while the Eox-m can be kept at a small value with the oxide shielding structures protecting the gate oxide. Switching characteristics are also studied, and the proposed SiC-IGBT delivers much better trade-off between turn-off energy loss (EOFF) and VON than the conventional SiC planar IGBT.

Investigations of Short Circuit Robustness of SiC IGBTs with Considerations on Physics Properties and Design

The commercial success of silicon carbide (SiC) diodes and MOSFETs for the automotive industry has led many in the field to begin developing ultra-high voltage (UHV) SiC insulated gate bipolar transistors (IGBTs), rated from 6 kV to 30 kV, for future grid conversion applications. Despite this early interest, there has been little work conducted on the optimal layout for the SiC IGBT, most early work seeking to overcome difficulties in fabricating the devices without a P+ substrate. In this paper, numerical TCAD simulations are used to examine the link between the carrier lifetime of SiC IGBTs and their short circuit capability. For the planar devices, simulations show that increasing carrier lifetime from 1 to 10 μs, has not only a profound effect reducing on-state losses, but also increases short circuit withstand time (SCWT) by 39%. Two retrograde p-well designs are also investigated, the optimal device for SCWT having a 100 nm channel region of 5×1016 cm-3, with this increasing to a peak value of 2×1018 cm-3, in a 700 nm region beneath the channel.

Comparative Evaluation of Voltage Source Converters With Silicon Carbide Semiconductor Devices for High-Voltage Direct Current Transmission

Recent advancements in silicon carbide (SiC) power semiconductor technology enable developments in the high-power sector, e.g., high-voltage-direct-current (HVdc) converters for transmission, where today silicon (Si) devices are state-of-the-art. New submodule (SM) topologies for modular multilevel converters offer benefits in combination with these new SiC semiconductors. This article reviews developments in both fields, SiC power semiconductor devices and SM topologies, and evaluates their combined performance in relation to core requirements for HVdc converters: grid code compliance, reliability, and cost. A detailed comparison of SM topologies regarding their structural properties, design and control complexity, voltage capability, losses, and fault handling is given. Alternatives to state-of-the-art SMs with Si insulated-gate bipolar transistors (IGBTs) are proposed, and several promising design approaches are discussed. Most advantages can be gained from three technology features. First, SM bipolar capability enables dc fault handling and reduced the energy storage requirements. Second, SM topologies with parallel conduction paths in combination with SiC metal-oxide-semiconductor field-effect transistors offer reduced losses. Third, a higher SM voltage enabled by a higher blocking voltage of SiC devices results in a reduced converter complexity. For the latter, ultrahigh-voltage bipolar devices, such as SiC IGBTs and SiC gate turn-off thyristors, are envisioned.

Numerical analysis and thermal fatigue life prediction of solder layer in a SiC-IGBT power module

Limited by the mechanical properties of materials, silicon (Si) carbide insulated gate bipolar transistor (IGBT) can no longer meet the requirements of high power and high frequency electronic devices. Silicon carbide (SiC) IGBT, represented by SiC MOSFET, combines the excellent performance of SiC materials and IGBT devices, and becomes an ideal device for high-frequency and high-temperature electronic devices. Even so, the thermal fatigue failure of SiC IGBT, which directly determines its application and promotion, is a problem worthy of attention. In this study, the thermal fatigue behavior of SiC-IGBT under cyclic temperature cycles was investigated by finite element method. The finite element thermomechanical model was established, and stress-strain distribution and creep characteristics of the SnAgCu solder layer were obtained. The thermal fatigue life of the solder was predicted by the creep, shear strain and energy model respectively, and the failure position and factor of failure were discussed.

Static and Dynamic Performance Prediction of Ultrahigh-Voltage Silicon Carbide Insulated-Gate Bipolar Transistors

The performance of theoretical ultrahigh-voltage power semiconductor devices has been predicted by means of numerical simulations using the Sentaurus technology computer-aided design tool. A general silicon carbide punch-through insulated-gate bipolar transistor (IGBT) structure has been implemented with suitable physics-based models and parameters to reflect the device characteristics in a wide range of device blocking voltages from 20 to 50 kV. The models for 20 kV class IGBTs have been implicitly validated by means of published experimental results. Mixed-mode simulations were performed that predicted total switching energy loss densities of 335, 629, 906, and 999 mJ/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> for 20, 30, 40, and 50 kV class devices, respectively, at 25 °C, JC = 20 A/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , and an ambipolar carrier lifetime of 20 μs. While the IGBT on-state forward voltage drop reduces, the switching losses increase with higher charge-carrier lifetime for a given current density (e.g., 20 A/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ). The large span of simulation results will be used as an input support to the design of future high-power converters.

Wide-Range Prediction of Ultra-High Voltage SiC IGBT Static Performance Using Calibrated TCAD Model

In this paper, a technology computer-aided design (TCAD) model of a silicon carbide (SiC) insulated-gate bipolar transistor (IGBT) has been calibrated against previously reported experimental data. The calibrated TCAD model has been used to predict the static performance of theoretical SiC IGBTs with ultra-high blocking voltage capabilities in the range of 20-50 kV. The simulation results of transfer characteristics, IC-VGE, forward characteristics, IC-VCE, and blocking voltage characteristics are studied. The threshold voltage is approximately 5 V, and the forward voltage drop is ranging from VF = 4.2-10.0 V at IC = 20 A, using a charge carrier lifetime of τA = 20 μs. Furthermore, the forward voltage drop impact for different process dependent parameters (i.e., carrier lifetimes, mobility/scattering and trap related defects) and junction temperature are investigated in a parametric sensitivity analysis. The wide-range simulation results may be used as an input to facilitate high power converter design and evaluation. In this case, the TCAD simulated static characteristics of SiC IGBTs is compared to silicon (Si) IGBTs in a modular multilevel converter in a general high-power application. The results indicate several benefits and lower conduction energy losses using ultra-high voltage SiC IGBTs compared to Si IGBTs.

Enhanced Conduction Characteristics in SiC IGBT with Floating p-Grid Shielded Thick Current Storage Layer

A silicon carbide insulated-gate bipolar transistor (SiC IGBT) structure is proposed and investigated with TCAD simulations. The proposed SiC IGBT features a deep current storage layer and a floating p-grid. Compared to the conventional SiC IGBT, the current storage layer significantly improves conductivity modulation in the device, and results in improved conduction characteristics (i.e. lower VON). However, a mere deep CSL leads to an appreciable degradation in the device breakdown voltage (BV). The floating p-grid in the proposed IGBT effectively clamps this rise of electrical field, and thus achieves an uncompromised BV. Detailed study reveals that the alignment of the p-grid to the top structure does not have obvious influence on the device performance, which makes the structure easy to implement. Switching characteristics of the IGBTs are also studied, and the EOFF-VON trade-off of the proposed SiC IGBT is much better than the conventional IGBT.

A Novel Silicon Carbide Accumulation Channel Injection Enhanced Gate Transistor With Buried Barrier Under Shielding Region

A silicon carbide (SiC) injection enhanced gate transistor with accumulation channel (AC-IEGT) is proposed in this letter, which has a barrier layer with small windows under the p+ shielding region. The new structure can enhance electron injection through accumulation channel. Thus, an optimized carrier density can be obtained in the emitter side. Compared with conventional SiC insulated gate bipolar transistor and carrier stored trench bipolar transistor, static simulation results show that the static characteristics of the device are improved significantly. The figure of merit ( $V_{\text {BR}}^{2}/R_{\text {on,sp}})$ of AC-IEGT increases by 81.96 % and 17.78 %, respectively. The mix-mode circuit simulation results show that the proposed could be more suitable for ultra-high voltage application.

Fabrication of a P-Channel SiC-IGBT with High Channel Mobility

We fabricated and characterized an ultrahigh voltage (&gt;10kV) p-channel silicon carbide insulated gate bipolar transistor (SiC-IGBT) with high channel mobility. Higher field-effect channel mobility of 13.5 cm2/Vs was achieved by the combination of adopting an n-type base layer with a retrograde doping profile and additional wet re-oxidation annealing (wet-ROA) at 1100°C in the gate oxidation process. The on-state characteristics of the p-channel SiC-IGBT at 200°C showed the low differential specific on-resistance of 24 mΩcm2 at VG = -20 V. The forward blocking voltage of the p-channel SiC-IGBT at 25°C was 10.2 kV a the leakage current density of 1.0 μA/cm2.