SiGe Epitaxial Base Research Articles

Understanding the Effects of Epitaxy Artifacts on SiGe HBT Performance through Detailed Process/Device Simulation

Faceting at the periphery of the shallow trench isolation during SiGe epitaxial base growth and its influence on SiGe HBT collector-base capacitance are investigated utilizing Technology Computer Aided Design techniques. The simulations suggest peripheral diffusion of boron from the extrinsic base into the intrinsic device may be attributed to depletion of germanium and carbon on the faceted plane that drives the boron diffusion and contributes to the collector-base capacitance, Ccb. Increases in the angle of the facet relative to the {110} plane are shown to reduce Ccb. Moreover, a significant reduction in Ccb was observed with no faceting, suggesting that moving the facet away from the active silicon region was desirable for reducing this key parasitic capacitance. These results serve to highlight the role that faceting plays in extrinsic device parasitic capacitances and identifies a focus area for scaling the device capacitance.

A High-Performance SiGe HBT/BiCMOS Technology

A high-performance SiGe HBT/BiCMOS technology is reviewed. A nano-meter scaling of epitaxial SiGe base layer is an effective to improve cutoff frequency. Non-self-aligned structure and self-aligned structure in SiGe HBTs are compared in terms of their process flows and characteristics. An ECL gate delay of 4.9 psec is achieved by the high-yield self-aligned SiGe HBTs with a maximum oscillation frequency of 183 GHz. Without performance degradation the SiGe HBT and advanced CMOS technology are integrated with high-performance passive elements for mixed signal system-on-a-chips.

A 0.18-μm RF SiGe BiCMOS technology with collector-epi-free double-poly self-aligned HBTs

This paper describes an RF SiGe BiCMOS technology based on a standard 0.18-/spl mu/m CMOS process. This technology has the following key points: 1) A double-poly self-aligned SiGe-HBT is produced by adding a four-mask process to the CMOS process flow-this HBT has an SiGe epitaxial base selectively grown on an epi-free collector; 2) two-step annealing of CMOS source/drain/gate activation is utilized to solve the thermal budget tradeoff between SiGe-HBTs and CMOS; and 3) a robust Ge profile design is studied to improve the thermal stability of the SiGe-base/Si-collector junction. This process yields 73-GHz f/sub T/, 61-GHz f/sub max/ SiGe HBTs without compromising 0.18-/spl mu/m p/sup +//n/sup +/ dual-gate CMOS characteristics.

HIGH-PERFORMANCE Si and SiGe BIPOLAR TECHNOLOGIES AND CIRCUITS

In this paper we present Si and SiGe bipolar technologies and circuits suited for present and future high-performance communication systems. The silicon bipolar technology described has an implanted base and, without increase in process complexity in comparison to current production technologies, transit frequencies of 52 GHz and maximum oscillation frequencies of 65 GHz are achieved. The transistors of the described epitaxial SiGe-base technologies exhibit transit frequencies of 81 GHz and maximum oscillation frequencies of 95 GHz. Measurement results of circuits realized in these technologies for low power and high-speed applications are presented: a 43 GHz low power dynamic frequency divider, a 23 GHz monolithically integrated oscillator, a 40 Gb/s clock and data (CDR) recovery realized in the pure silicon bipolar technology, and a 53 GHz static frequency divider, a 79 GHz dynamic frequency divider and a 20 GHz/27 mW dual-modulus prescaler in the SiGe technology.

RTS noise in submicron SiGe epitaxial base bipolar transistors

In this paper, we report a comprehensive study of Random Telegraph Signal (RTS) noise in SiGe epitaxial base bipolar transistors. We analyse the multilevel fluctuations of base and emitter forward currents before and after reverse stress on the emitter-base junction. We show the influence of the chemical treatment preceeding polysilicon emitter deposition on noise properties. We identified that RTS noise arises from different regions in the device : the silicon/polysilicon interface if an oxidizing surface preparation is used, and the emitter periphery after stress-induced degradation. Temperature and bias dependent measurements allowed us to characterize these defects (activation energy, defect type), to analyse their impact to the low frequency noise properties of these transistors and to discuss the role of hot carrier stressing.

Influence of the oxygen content in SiGe on the parameters of Si/SiGe heterojunction bipolar transistors

We demonstrate peak fT and fmax of 50 GHz for heterojunction bipolar transistors (HBTs) with an oxygen concentration in the epitaxial SiGe base layer of about 1020 cm−3. These fT/fmax values are over 10 GHz higher than for identically processed HBTs with an O content of only 1018 cm−3. This is due to reduced transient enhanced diffusion of boron in the O-rich layers. However, the base carrier lifetimes are reduced by the high oxygen content. We show that ideal base current characteristics and a low 1/fnoise level can be obtained despite this effect by localizing the emitter-base space-charge region outside the O-rich layer.

Si-Ge heterojunction bipolar technology for high-speed integrated circuits

This review discusses the fundamentals of SiGe epitaxial base heterojunction bipolar transistor (HBT) technology that have been developed for use in analog and mixed-signal applications in the 1–20 GHz range. The basic principles of operation of the graded base SiGe HBT are reviewed. These principles are then used to explore the design optimization for analog applications. Device results are presented that illustrate some important trade-offs in device design. A discussion of the use of UHV/CVD for the deposition of the epitaxial base profile is followed by an overview of the integrated process. This process, which has been installed on 200 mm wafers in IBM's Advanced Semiconductor Technology Center in Hopewell Junction, N.Y., also includes a full range of support devices. The process has demonstrated SiGe HBT performance, reliability, and yield in a CMOS fabrication with the addition of only one tool for UHV/CVD deposition of the epi-base and, with minimal additional process steps, can be used to fabricate full BiCMOS designs. This paper concludes with a discussion of high-performance circuits fabricated to date, including ECL ring'oscillators, power amplifiers, low-noise amplifiers, voltage-controlled oscillators, and finally a 12-bit DAC that features nearly 3000 SiGe HBT devices demonstrating medium-scale integration.

Si/SiGe epitaxial-base transistors. I. Materials, physics, and circuits

A detailed review of SiGe epitaxial base technology is presented, which chronicles the progression of research from materials deposition through device and integration demonstrations, culminating in the first SiGe integrated circuit application. In part I of this paper, the requirements and processes for high-quality SiGe film preparation are discussed, with emphasis on fundamental principles. A detailed overview of SiGe HBT device design and implications for circuit applications is then presented.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

SiGe drift base bipolar transistor with self-aligned selective CVD-tungsten electrodes

A new device and process technology is developed for high-speed SiGe epitaxial base transistors. A 60-nm SiGe epitaxial base and the selectively ion-implanted collector (SIC) structure enhance the cutoff frequency to about 40 GHz. Base resistance is minimized to 165 /spl Omega/ (emitter area: 0.2/spl times/3 /spl mu/m/sup 2/), and an f/sub MAX/ of 37.1 GHz is achieved by employing 0.2-/spl mu/m EB lithography for the emitter window, selective CVD tungsten for the base electrode and a self-aligned oxide side wall for the emitter-to-base separation. Circuit simulations predict that this device could reduce the ECL gate delay to below 20 ps.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

High-performance SiGe epitaxial base bipolar transistors produced by a reduced-pressure CVD reactor

High-performance Si and SiGe epitaxial base bipolar transistors have been fabricated using a commercially available, reduced pressure, epitaxial reactor. The SiGe devices exhibit exceptional Early voltages in the range of 400-500 V, and an f/sub T/ of 31 GHz with a BV/sub CEO/ of 7.6 V and BV/sub CBO/ of 16 V. These results demonstrate that SiGe has potential as a commercially viable technology for analog, digital, and mixed-signal applications. >

113-GHz f/sub T/ graded-base SiGe HBT's

Summary form only given. A novel low-thermal cycle process was used to fabricate epitaxial SiGe-base heterojunction bipolar transistors (HBTs) with record unity current gain cutoff frequencies. The process includes an in situ phosphorus-doped polysilicon emitter which requires only a 800 degrees C-10-s anneal. A peak f/sub T/ of 113 GHz at V/sub CB/ of 1 V was obtained for an intrinsic base sheet resistance of 7 k Omega / Square Operator . >

SiGe-base bipolar transistors for cryogenic BiCMOS applications

We demonstrate that the cryogenic (e.g., 77K=LNT) properties of SiGe-base heterojunction bipolar transistors and circuits are sufficiently advanced to warrant a serious consideration of the merits of cryogenic BiCMOS technologies for future LNT computer applications. In this paper we review the features of epitaxial SiGe-base bipolar technologies which make them particularly Suitable for LNT operation, examine the DC and dynamic properties of SiGe-base transistors operating at low temperatures, highlight the profile design constraints unique to the LNT environment, and discuss future research directions and opportunities.

Device design issues for a high-performance technology with Si or SiGe epitaxial base

Design issues for a high-performance bipolar technology with Si or SiGe epitaxial base are discussed. Narrow and shallow polysilicon emitter formation and extrinsic base design for low base resistance are investigated using selective epitaxy emitter window (SEEW) transistors. In spite of a close proximity of the extrinsic base diffusion to the intrinsic device a cut-off frequency (f T ) up to 50 GHz has been achieved for an emitter width of 0.35 ?m. The depth of the extrinsic base diffusion did affect the collector-base capacitance and indicated that the extrinsic base should be designed in a manner consistent with the circuit operating current density. Further, we discuss in detail the emitter window tolerance for SEEW formation.

Sub-30-ps ECL circuit operation at liquid-nitrogen temperature using self-aligned epitaxial SiGe-base bipolar transistors

The authors report the operation of emitter coupled logic (ECL) circuits at liquid-nitrogen temperature using self-aligned epitaxial SiGe-base bipolar transistors. A minimum ECL gate delay of 28.1 ps at 84 K was measured; this is essentially unchanged from the room-temperature value of 28.8 ps at 310 K. This delay number was achieved under full logic-swing (500-mV) conditions and represents an improvement of greater than a factor of 2 over the best reported value for 84 K operation. Lower-power ECL circuits have switching speeds as fast as 51 ps at 2.2 mW (112-fJ power-delay product) at 84 K. These results suggest that silicon-based bipolar technology is suitable for very-high-speed applications in cryogenic computer systems. >

Self-aligned SiGe-base heterojunction bipolar transistor by selective epitaxy emitter window (SEEW) technology

In the device a SiGe epitaxial base is integrated in a structure which uses in situ doped epitaxial lateral overgrowth for the formation of the emitter window and the extrinsic base contact. Nearly ideal I-V characteristics have been achieved for a base width of 60 nm with an intrinsic base resistance of 4.6 k Omega / Square Operator and for emitter widths down to 0.4 mu m. A DC collector current enhancement factor of 3.1 was obtained relative to a Si homojunction transistor with a 1.25 times higher intrinsic base resistance. The breakdown voltage BV/sub CBO/ is identical for both Si and SiGe devices, even though the collector-base depletion region is partly overlapped with the reduced-bandgap SiGe strained layer. The lower BV/sub CEO/, measured for the SiGe-base transistor, is due to the higher current gain. Based on these results the fabrication of high-speed bipolar circuits that take advantage of SiGe-base bandgap engineering seems possible using selective epitaxy emitter window (SEEW) technology.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>