SiC Metal-oxide-semiconductor Field-effect Transistors Research Articles

Electrically detected magnetic resonance of carbon dangling bonds at the Si-face 4H-SiC/SiO2 interface

SiC based metal-oxide-semiconductor field-effect transistors (MOSFETs) have gained a significant importance in power electronics applications. However, electrically active defects at the SiC/SiO2 interface degrade the ideal behavior of the devices. The relevant microscopic defects can be identified by electron paramagnetic resonance (EPR) or electrically detected magnetic resonance (EDMR). This helps to decide which changes to the fabrication process will likely lead to further increases of device performance and reliability. EDMR measurements have shown very similar dominant hyperfine (HF) spectra in differently processed MOSFETs although some discrepancies were observed in the measured g-factors. Here, the HF spectra measured of different SiC MOSFETs are compared, and it is argued that the same dominant defect is present in all devices. A comparison of the data with simulated spectra of the C dangling bond (PbC) center and the silicon vacancy (VSi) demonstrates that the PbC center is a more suitable candidate to explain the observed HF spectra.

Effects of high-temperature diluted-H2 annealing on effective mobility of SiC MOSFETs estimated by split capacitance–voltage technique

The effects of post-oxidation annealing (POA) in diluted-H2 ambient on 4H- and 6H-SiC/SiO2 interfaces were investigated. Effective mobility (μeff) was extracted from lateral metal–oxide–semiconductor field-effect transistors (MOSFETs) by the split capacitance–voltage (C–V) technique to determine the surface charge density and a calibration technique using two MOSFETs with different gate lengths to minimize the contribution of parasitic components. POA at 1150 °C in diluted-H2 ambient resulted in an enhancement of μeff, compared with that in N2 ambient. It was indicated that the effects of POA in diluted-H2 ambient should be attributed to the reduction in the density of near-interface traps in oxide, which disturb the electron transportation in the inversion channel, from the measurement temperature dependence of μeff for 6H-SiC MOSFETs as well as from the C–V curves of MOS capacitors fabricated on n-type 4H-SiC.

High-Temperature Characteristics of 3-kV 4H-SiC Reverse Blocking MOSFET for High-Performance Bidirectional Switch

Novel 3-kV 4H-SiC reverse blocking (RB) metal–oxide–semiconductor field-effect transistors (MOSFETs) have been demonstrated for high-voltage bidirectional switching applications. To achieve RB capability, a series Schottky barrier diode structure was introduced onto the backside of the 4H-SiC MOSFET. The developed SiC RB MOSFET exhibits bidirectional blocking voltage over 3 kV and a differential specific on-resistance of 20 $\text{m}\Omega ~\cdot $ cm2 at room temperature. In an inductive-load switching measurement, the RB MOSFET showed good turn-ON/-OFF characteristics at 1 kV. The bidirectional switch configured by the developed RB MOSFETs exhibited lower ON-state power loss than the series connection of the standard SiC MOSFETs at wide range of temperature and operation current, demonstrating the advantage of the SiC RB MOSFET as a high-performance bidirectional switch.

Soft‐switching operation of the dual‐interleaved boost converter over all duty ratios

To extend the operating range of the snubber assisted zero-voltage and zero-current transition dual-interleaved boost converter beyond its inherent soft-switching limit of D = 0.5, a resonant pulse transformer is proposed instead of the resonant inductor. The 1 : 2 turns ratio of the transformer ensures full discharge of the snubber capacitor at all duty ratio values to facilitate zero-voltage zero-current switching at turn on of the main switching devices. The effectiveness of the topology has been confirmed by SPICE simulation and demonstrated by a 20 kW SiC metal–oxide–semiconductor field-effect transistor converter. The prototype operated at 20 kW, 112 kHz, 320–600 V achieving 98.7% efficiency and achieved 98.2% efficiency at 6 kW. Taking the additional losses in the auxiliary circuit into account, the switching losses at 20 kW are reduced by 74% compared with hard-switching operation, representing a 54% reduction in overall losses.

Comparison between SiC- and Si-Based Inverters for Photovoltaic Power Generation Systems

100-W class power storage systems were developed, which comprised spherical Si solar cells, a maximum power point tracking charge control-ler, a lithium-ion battery, and one of two different types of direct current (DC)-alter- nating current (AC) converters. One inverter used SiC met-al-oxide-semicon-ductor field-effect transistors (MOSFETs) as switching devices while the other used Si MOSFETs. In these 100-W class inverters, the ON resistance was considered to have little influence on the efficiency. Nevertheless, the SiC-based inverter exhibited an approximately 3% higher DC-AC conversion efficiency than the Si-based inverter. Power loss analysis indicated that the higher efficiency resulted predominantly from lower switching and reverse recovery losses in the SiC MOSFETs compared with in the Si MOSFETs.

A compact SiC photovoltaic inverter with maximum power point tracking function

A compact 150W photovoltaic inverter was developed using SiC devices, which integrated a maximum power point tracking charge controller and a direct current (DC) - alternating current (AC) converter into a single module. The DC-AC converter circuit was built with four SiC metal-oxidesemiconductor field-effect transistors, while the DC-DC converter circuit built with four SiC Schottky barrier diodes. An increase of the switching frequency led to the module of a reduced size (250×180×28mm3), which is just one third volume of a commercial Si-based inverter available today. Besides being compact, the conversion efficiency of the DC-AC converter was approximately 3% higher than that of the commercial Si-based inverter. In addition, the MPPT controller showed a conversion efficiency exceeding 96%, which raised the total efficiency under practical operation conditions up to 86%.

Fictitious Reference Iterative Tuning-Based Two-Degrees-of-Freedom Method for Permanent Magnet Synchronous Motor Speed Control Using FPGA for a High-Frequency SiC MOSFET InverterMOSFET Inverter

This paper proposes proportional-integral/proportional gain controller parameter tuning in a two-degrees-of-freedom (2DOF) control system using the fictitious reference iterative tuning (FRIT) method for permanent magnet synchronous motor (PMSM) speed control using a field-programmable gate array (FPGA) for a high-frequency SiC MOSFET (metal oxide semiconductor field-effect transistor) inverter. The PI-P (proportional-integral/proportional) controller parameters can be tuned using the FRIT method from one-shot experimental data without using a mathematical model of the plant. Particle swarm optimization is used for FRIT optimization. An inverter that uses a SiC MOSFET is presented to achieve high-frequency operation at up to100 kHz using a switching pulse-width modulation (PWM) technique. As a result, a high-responsivity and high-stability PMSM (permanent magnet synchronous motor) control system is achieved, where the speed response follows the ideal response characteristic for both the step response and the disturbance response. High-responsivity and optimal disturbance rejection can be achieved using the 2DOF control system. FPGA-based digital hardware control is used to maximize the switching frequency of the SiC MOSFET inverter. Finally, an experimental system is set up, and experimental results are presented to prove the viability of the proposed method.

A Test Environment for Power Semiconductor Devices Using a Gate-Boosting Circuit

For semiconductor-based pulsed power generators, short turn-ON and turn-OFF times of the employed switching elements are especially in hard switching condition of advantage. In order to enhance switching speeds for standard devices under hard switching conditions, we propose a capacitively coupled gate-boosting circuit with gate-drive voltages of up to 80 V. A low inductance test circuit has been set up to evaluate different switching elements under varying driving conditions. Beside single pulse operation, the setup allows for burst mode and continuous repetitive switching. The flexible design of the setup allows for testing metal–oxide–semiconductor field-effect transistors (MOSFETs) as well as insulated-gate bipolar transistors (IGBTs). Exemplary, we show results for a SiC MOSFET and a standard IGBT. By applying 80 V gate-drive voltage, the current rise rate of the SiC MOSFET could be increased by a factor of 3.5 up to 2.6 kA/ $\mu \text{s}$ . For standard IGBT devices, we achieved an eightfold increase in current rise rate up to 4.2 kA/ $\mu \text{s}$ . We verified a reproducible pulse shape for over ${\textrm {10}}^{\textrm {8}}$ pulses. In addition, the gate-drive circuit is able to drive the device in 3-MHz burst mode at 250 A peak collector current.

New Material Transistor with Record-High Field-Effect Mobility among Wide-Band-Gap Semiconductors.

At an ultrathin 5 nm, we report a new high-mobility tin oxide (SnO2) metal-oxide-semiconductor field-effect transistor (MOSFET) exhibiting extremely high field-effect mobility values of 279 and 255 cm(2)/V-s at 145 and 205 °C, respectively. These values are the highest reported mobility values among all wide-band-gap semiconductors of GaN, SiC, and metal-oxide MOSFETs, and they also exceed those of silicon devices at the aforementioned elevated temperatures. For the first time among existing semiconductor transistors, a new device physical phenomenon of a higher mobility value was measured at 45-205 °C than at 25 °C, which is due to the lower optical phonon scattering by the large SnO2 phonon energy. Moreover, the high on-current/off-current of 4 × 10(6) and the positive threshold voltage of 0.14 V at 25 °C are significantly better than those of a graphene transistor. This wide-band-gap SnO2 MOSFET exhibits high mobility in a 25-205 °C temperature range, a wide operating voltage of 1.5-20 V, and the ability to form on an amorphous substrate, rendering it an ideal candidate for multifunctional low-power integrated circuit (IC), display, and brain-mimicking three-dimensional IC applications.

Development of a Wire-Bonding-Less SiC Power Module Operating over a Wide Temperature Range

In this paper, we describe a power module fabricated using SiC metal–oxide–semiconductor field-effect transistors (MOSFETs). A C-R snubber is integrated into this power module for reduction of the surge voltage and dumping of the voltage ringing. The four SiC MOSFETs are sandwiched between active metal copper (AMC) substrates. The surfaces of the SiC MOSFETs are attached to AMC substrates by Al bumps, owing to which the power module shows low inductance. Moreover, this power module ensures credibility and reliability at higher operating temperatures beyond 200 °C. The switching characteristics of the module are studied experimentally for high-temperature and high-frequency operations.

Change in Characteristics of SiC MOSFETs by Gamma-Ray Irradiation at High Temperature

Radiation response of 4H-SiC vertical power Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) was investigated at 150°C up to 10.4 MGy. Until irradiation at 1.2 MGy, the drain current – gate voltage curves of the SiC MOSFETs shifted to the negative voltage side, and the leakage of drain current at gate voltages below threshold voltage increased with increasing absorbed dose. However, no significant change in the electrical characteristics of SiC MOSFETs was observed at doses above 1.2 MGy. For blocking characteristics, there were no degradations of the SiC MOSFETs irradiated at 150°C even after irradiated at 10.4 MGy.

Origin of the unidentified positive mobile ions causing the bias temperature instability in SiC MOSFETs and their diffusion process

For SiC metal–oxide–semiconductor field-effect transistors (MOSFETs), it has been shown that unidentified positive mobile ions are generated in SiO2 after conventional hydrogen annealing, which leads to significant reliability degradation known as bias temperature instability (BTI). Discovering the origin of these mobile ions is important for fabricating highly reliable SiC MOSFETs. On the basis of first-principles calculations, we verified that the BTI of SiC MOSFETs is caused by hydrogen ions combining with CO3-like defects in SiO2. These hydrogen ions dissociate from the CO3-like defects and diffuse “as protons” in SiO2. These results indicate that the observed positive mobile ions are protons.

Comparative Study of a Multi-MW High-Power Density DC Transformer With an Optimized High-Frequency Magnetics in All-DC Offshore Wind Farm

In this paper, the design of a 1/30 kV, 10 MW modular isolated dc–dc converter is presented. The design and optimization of a high-frequency transformer as the key part of such a converter is addressed. Efficiency curves for different semiconductors and frequencies are presented in order to find an optimum frequency-enabling adequate transformer volume reduction with a suitable compromise with the converter efficiency. It was found that for this voltage level and size, it is no point to go above 6 kHz from the transformer perspective since the isolation requirement that leads to that the size is not reduced much more for even higher frequencies. At 5 kHz, the efficiency of the transformer having a nanocristalline core reached 99.7% while the power density was about 22 kW/l. For the entire dc–dc converter, an efficiency of 98.5% was reached at 5 kHz switching frequency using SiC metal–oxide semiconductor field-effect transistors as switching elements while the efficiency when using insulated-gate bipolar transistors reached 97.2% at the same frequency.

Fabrication and characterization of the normally-off N-channel lateral 4H–SiC metal–oxide–semiconductor field-effect transistors**Projcet supported by the National Natural Science Foundation of China (Grant Nos. 61404098, 61176070, and 61274079), the Doctoral Fund of Ministry of Education of China (Grant Nos. 20110203110010 and 20130203120017), the National Key Basic Research Program of China (Grant No. 2015CB759600), and the Key Specific Projects of Ministry of

In this paper, the normally-off N-channel lateral 4H–SiC metal–oxide–semiconductor field-effect transistors (MOSFFETs) have been fabricated and characterized. A sandwich- (nitridation–oxidation–nitridation) type process was used to grow the gate dielectric film to obtain high channel mobility. The interface properties of 4H–SiC/SiO2 were examined by the measurement of HF I–V, G–V, and C–V over a range of frequencies. The ideal C–V curve with little hysteresis and the frequency dispersion were observed. As a result, the interface state density near the conduction band edge of 4H–SiC was reduced to 2 × 1011 eV−1·cm−2, the breakdown field of the grown oxides was about 9.8 MV/cm, the median peak field-effect mobility is about 32.5 cm2·V−1·s−1, and the maximum peak field-effect mobility of 38 cm2·V−1·s−1 was achieved in fabricated lateral 4H–SiC MOSFFETs.

Negative bias temperature instability of SiC MOSFET induced by interface trap assisted hole trapping

We investigated the negative bias temperature instability (NBTI) characteristics of 4H-SiC metal oxide semiconductor field effect transistor (MOSFET) and metal oxide semiconductor capacitor (MOSCAP). The shift of threshold voltage approached saturation with time, and the different magnitude of mid-gap voltage shift with different starting biases observed in capacitance-voltage (CV) curves taken from MOSCAP and MOSFET suggested that the hole trapping was the primary mechanism contributing to the NBTI in this study. The trend of mid-gap voltage shift with starting bias and threshold voltage shift with stress bias showed steep change before −10 V and approached saturation after −10 V which can be explained by a process where the hole trapping was assisted by positively charged interface states. The positively charged interface states may have acted as an intermediate state which reduced the overall energy barrier and facilitated the process of hole trapping. The split-CV sweeps with 0 s and 655 s of hold time were essentially overlapped which was consistent with the time evolution characteristic of hole trapping and supported the interface trap assisted hole trapping mechanism.

(Invited) Characteristics of a Wire-Bonding-Less SiC Power Module Operating in a Wide Temperature Range

Introduction Using high-speed switching, wide bandgap semiconductor devices can reduce on-resistance in the on-state to realize low power converter losses. In addition, SiC power devices can be operated in high temperatures; thus, their cooling systems can be reduced in size or removed all together, thereby increasing the power density of the power converter. In this study, we designed and fabricated a SiC power module with a built-in snubber circuit. This power module is operable in high temperatures over 200 degrees C. Design of Power Module for High-Temperature Operation The manufactured power module, its components, and its circuit diagram are shown in Fig. 1. The module size is 30 × 44 × 29 mm3. Active metal brazing copper (AMC) substrates sandwich the four SiC-metal–oxide–semiconductor field-effect transistors (MOSFETs) in this structure. Two AMC substrates connect via the metal block. The C–R snubber circuit is built-in on the surface of AMC1 (Fig. 1(b)). The SiC-MOSFET and AMC1 are joined by a flip-chip-bonding technique using an Al bump. The others are joined by Au–Ge solder. Fig. 2 shows the 50-kHz switching waveforms. Fig. 3 shows the circuit configuration for the Fig. 2 waveforms. This power module can realize high-speed switching in a fall time tf @ 25 ns. Surge voltage and ringing are suppressed by the built-in snubber circuit. Acknowledgment This work was supported by Council for Science, Technology and Innovation (CSTI), Cross-ministerial Strategic Innovation Promotion Program (SIP), "Next-generation power electronics/Consistent R&D of next-generation SiC power electronics", and "the Novel Semiconductor Power Electronics Project Realizing Low Carbon Emission Society" (funding agency: NEDO). Figure 1

Recovery of the Electrical Characteristics of SiC MOSFETs Irradiated with Gamma-Rays by Thermal Treatments

Effects of gamma-ray irradiation and subsequent thermal annealing on the characteristics of vertical structure power Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) fabricated on 4H-SiC were studied. After irradiation at 1.2 MGy, the drain current – gate voltage curves of the MOSFETs shifted to the negative voltage side and the leakage drain current at inverse voltage increased. No significant change in the degraded electrical characteristics of SiC MOSFETs was observed by room temperature annealing. The degraded characteristics of SiC MOSFETs began to recover by annealing above 120 °C, and their characteristics reached almost the initial ones by annealing at 360 °C.

Analysis of effect of gate oxidation at SiC MOS interface on threshold-voltage shift using deep-level transient spectroscopy

In this study, we investigate the influence of wet oxidation after nitridation of a gate oxide on the interface states in SiC metal–oxide–semiconductor field-effect transistors (MOSFETs). We used deep-level transient spectroscopy (DLTS) to clarify the mechanism behind the positive shift in the threshold voltage after wet oxidation without any significant decrease in the mobility. We applied DLTS using a small pulse to obtain the depth profile of the states. We found that the density of deep-level states near the interface on the SiC side increased after wet oxidation at 600 and 800 °C, whereas the density of shallow states did not increase. This result indicates that the increase in the deep-level states is related to the threshold-voltage shift, and there is no degradation in the mobility.

Energy position of the active near-interface traps in metal–oxide–semiconductor field-effect transistors on 4H–SiC

Based on the insight that the Fermi level in a metal–oxide–semiconductor field-effect transistor (MOSFET) channel is set in the conduction band, due to the quantum confinement of the channel electrons, this letter provides an experimental demonstration that the near-interface traps responsible for degradation of channel-carrier mobility in SiC MOSFETs are energetically aligned to the conduction band of SiC. The experimental demonstration is based on conductance measurements of MOS capacitors in accumulation. The accumulation conductance does not change with temperature, which demonstrates that there is channel-carrier communication with the near-interface traps by tunneling.

The effect of nitric oxide anneals on silicon vacancies at and very near the interface of 4H SiC metal oxide semiconducting field effect transistors using electrically detected magnetic resonance

We use three electrically detected magnetic resonance (EDMR) approaches to explore nitric oxide (NO) annealing in 4H SiC metal-oxide-semiconductor field-effect transistors (MOSFETs). One approach is sensitive to defects at the interface and those extending into the SiC. Two of these approaches are particularly sensitive to SiC/SiO2 interface defects. They show that NO anneals decrease the EDMR response. Since this and earlier studies indicate the ubiquitous presence of silicon vacancy centers in SiC MOSFETs, our results provide strong circumstantial evidence that these defects play an important role in limiting device performance and that NO anneals are effective in reducing their populations.