Negative bias temperature instability of SiC MOSFET induced by interface trap assisted hole trapping

Abstract

We investigated the negative bias temperature instability (NBTI) characteristics of 4H-SiC metal oxide semiconductor field effect transistor (MOSFET) and metal oxide semiconductor capacitor (MOSCAP). The shift of threshold voltage approached saturation with time, and the different magnitude of mid-gap voltage shift with different starting biases observed in capacitance-voltage (CV) curves taken from MOSCAP and MOSFET suggested that the hole trapping was the primary mechanism contributing to the NBTI in this study. The trend of mid-gap voltage shift with starting bias and threshold voltage shift with stress bias showed steep change before −10 V and approached saturation after −10 V which can be explained by a process where the hole trapping was assisted by positively charged interface states. The positively charged interface states may have acted as an intermediate state which reduced the overall energy barrier and facilitated the process of hole trapping. The split-CV sweeps with 0 s and 655 s of hold time were essentially overlapped which was consistent with the time evolution characteristic of hole trapping and supported the interface trap assisted hole trapping mechanism.