Si Passivation Research Articles

Waveguide-Integrated Black Phosphorus Photodetector for Mid-Infrared Applications.

Midinfrared (MIR), which covers numerous molecular vibrational fingerprints, has attracted enormous research interest due to its promising potential for label-free and damage-free sensing. Despite intense development efforts, the realization of waveguide-integrated on-chip sensing system has seen very limited success to date. The huge lattice mismatch between silicon and the commonly used detection materials such as HgCdTe, III-V, or II-VI compounds has been the key bottleneck that hinders their integration. Here, we realize an integration of silicon-on-insulator (SOI) waveguides with black phosphorus (BP) photodetectors. When operating near BP's cutoff wavelength where absorption is weak, the light-BP interaction is enhanced by exploiting the optical confinement in the Si waveguide and grating structure to overcome the limitation of absorption length constrained by the BP thickness. Devices with different BP crystal orientation and thickness are compared in terms of their responsivity and noise equivalent power (NEP). Spectral photoresponse from 3.68 to 4.03 μm was investigated. Additionally, power-dependent responsivity and gate-tunable photocurrent were also studied. At a bias of 1 V, the BP photodetector achieved a responsivity of 23 A/W at 3.68 μm and 2 A/W at 4 μm and a NEP less than 1 nW/Hz1/2 at room temperature. The integration of passive Si photonics and active BP photodetector is envisaged to offer a potential pathway toward the realization of integrated on-chip systems for MIR sensing applications.

Silicon uptake by a pasture grass experiencing simulated grazing is greatest under elevated precipitation

BackgroundGrasses are hyper-accumulators of silicon (Si) and often up-regulate Si following herbivory. Positive correlations exist between Si and plant water content, yet the extent to which Si uptake responses can be mediated by changes in soil water availability has rarely been studied and never, to our knowledge, under field conditions. We used field-based rain-exclusion shelters to investigate how simulated grazing (shoot clipping) and altered rainfall patterns (drought and elevated precipitation, representing 50% and 150% of ambient precipitation levels, respectively) affected initial patterns of root- and shoot-Si uptake in a native Australian grass (Microlaena stipoides) in Si-supplemented and untreated soils.ResultsSi supplementation increased soil water retention under ambient and elevated precipitation but not under drought, although this had little effect on Si uptake and growth (tiller numbers or root biomass) of M. stipoides. Changes in rainfall patterns and clipping had strong individual effects on plant growth and Si uptake and storage, whereby clipping increased Si uptake by M. stipoides under all rainfall treatments but to the greatest extent under elevated precipitation. Moreover, above-ground–below-ground Si distribution only changed following elevated precipitation by decreasing the ratio of root:shoot Si concentrations.ConclusionsResults highlight the importance of soil water availability for Si uptake and suggest a role for both active and passive Si transport mechanisms. Such manipulative field studies may provide a more realistic insight into how grasses initially respond to herbivory in terms of Si-based defence under different environmental conditions.

Vacuum-Free, Room-Temperature Organic Passivation of Silicon: Toward Very Low Recombination of Micro-/Nanotextured Surface Structures.

Crystalline silicon (c-Si) solar cells remain dominant in the photovoltaic (PV) market because of their cost-effective advantages. However, the requirement for expensive vacuum equipment and the power-hungry thermal budget for surface passivation technology, which is one of the key enablers of the high performance of c-Si solar cells, impede further reductions of costs. Thus, the omission of the vacuum and high-temperature process without compromising the passivation effect is highly desirable due to cost concerns. Here, we demonstrate a vacuum-free, room-temperature organic Nafion thin-film passivation scheme with an effective minority carrier lifetime (τeff) exceeding 9 ms on an n-type c-Si wafer with a resistivity of 1-5 Ω·cm, corresponding to an implied open circuit voltage (i Voc) of 724 mV and upper-limit surface recombination velocity (SRV) of 1.46 cm/s, which is a level that is in line with the hydrogenated amorphous Si film-passivation scheme used in the current PV industry. We find that the Nafion film passivation of Si can be enhanced in an O2 atmosphere and that the Nafion/c-Si interface oxidation should be responsible for the passivation mechanism. This highly effective passivation is also achieved on various micro-/nanotextured Si surface structures from actual production, including a pyramidal surface and nanopore-pyramid hybrid structure with nanopores on the inclined plane of the pyramid. We develop an organic Nafion-passivated n-type back-junction Si solar cell to examine application in a real device. The open circuit voltage ( Voc) of the solar cell with the Nafion passivation layer achieves a clear improvement (30.8 mV) over those without the passivation layer, resulting in an increase (1.5%) in the power conversion efficiency. These results suggest the potential use of these organic electronics with current Si microelectronics and a new strategy for the development of vacuum-free, low-temperature Si-based PVs at low cost.

Recent Advances in and New Perspectives on Crystalline Silicon Solar Cells with Carrier-Selective Passivation Contacts

Crystalline silicon (c-Si) is the dominating photovoltaic technology today, with a global market share of about 90%. Therefore, it is crucial for further improving the performance of c-Si solar cells and reducing their cost. Since 2014, continuous breakthroughs have been achieved in the conversion efficiencies of c-Si solar cells, with a current record of 26.6%. The great efficiency boosts originate not only from the materials, including Si wafers, emitters, passivation layers, and other functional thin films, but also from novel device structures and an understanding of the physics of solar cells. Among these achievements, the carrier-selective passivation contacts are undoubtedly crucial. Current carrier-selective passivation contacts can be realized either by silicon-based thin films or by elemental and/or compound thin films with extreme work functions. The current research and development status, as well as the future trends of these passivation contact materials, structures, and corresponding high-efficiency c-Si solar cells will be summarized.

Field-effect passivation of Si by ALD-Al2O3: Second harmonic generation monitoring and simulation

This paper investigates the ability of second harmonic generation (SHG) to probe the passivation quality of atomic layer deposited Al2O3 on Si by estimating the induced interface electric field due to fixed charges in the oxide. Samples with various oxide charges (Qox) and interface state densities (Dit) were fabricated, using different deposition parameters. The samples were characterized by capacitance-voltage (C-V) and microwave photoconductance decay measurements in order to evaluate Qox and Dit, as well as the effective minority carrier lifetime τeff. The SHG results were consistent with Qox, Dit, and τeff values, proving the ability of the technique to monitor the interfacial quality in a contactless and non-destructive way. Optical simulations which use the electric field values obtained from the C-V measurements could reproduce the measured SHG signal. This demonstrates that SHG coupled with optical simulation can give access to the electric field magnitude and thus characterize the electrical properties of oxide/Si interfaces.

Electrical Characterization of Charge Polarity in AlF₃ Anti-Reflection Layers for Complementary Metal Oxide Semiconductor Image Sensors.

In this study, the charge polarity of aluminum fluoride (AlF3) as a function of varying thickness (tAlF3 = 20, 35, 50, 65, and 80 nm) was discussed. AlF3 films were deposited onto p-Si wafers via electron beam sputtering. Thickness dependent charge polarity and reliability issues under bias-temperature stress conditions were identified using a capacitance-voltage (C-V) characterization method. AlF3 was found to possess negative fixed charges, leading to a C-V curve shift toward the positive gate bias direction as tAlF3 was increased up to 50 nm. On the contrary, the C-V characteristics were dominantly affected by the positive charges of mobile ions and/or fluorine vacancies when tAlF3 was increased to more than 50 nm. Additionally, negative bias temperature stress (1 MV/cm, 473 K for 10 mins) increased insulator trapped charges and decreased interface traps in 20 nm thick AlF3 films. These results could be attributed to positively charged fluorine vacancies introduced by broken Al-F bonds within AlF3 films and the passivation of Si dangling bonds due to broken fluorine ions at the interface, respectively. It was believed that 20 nm thick AlF3 films sufficiently attracted holes from the Si substrate, forming a hole accumulation layer on the surface due to total charge polarity of the AlF3 dielectric being entirely governed by negative fixed charges as the thickness of AlF3 decreased. Based on these results, AlF3 films are proposed for use as an anti-reflection layer to replace HfO2 in CMOS image sensors.

(Invited) High Performance UTB GeOI n and pMOSFETs Featuring HEtero-Layer-Lift-Off (HELLO) Technology

Introduction Ultrathin body (UTB) Ge-on-insulator (GeOI) is compulsory structure for improved gate control and immunity against short channel effects in the ultimately scaled high performance and low power CMOS. However, severe carrier mobility degradation has been reported in commercially available Smart-CutTM GeOI substrates with body thickness (T body) less than 20 nm [1, 2]. Unstable Ge/buried oxide (BOX) interfaces, poor Ge crystallinity and Ge thickness fluctuation are main obstacles in conventional UTB GeOI structures. Therefore, more sophisticated fabrication methods are strongly required. In this work, a novel Ge layer transfer technology called HEtero-Layer-Lift-Off (HELLO) [3] utilizing SiGe etch stop layer and Si passivation layer in the donor structure has been developed for precise control of T body and back interfacial quality in UTB GeOI. Enhancement of carrier mobility in both UTB GeOI n and pMOSFETs has been demonstrated, showing high potential of UTB GeOI by HELLO technology [4, 5]. HELLO technology The schematic flows of HELLO technology for fabricating GeOI substrates is shown in Fig. 1. As a donor structure, Ge channel (20 nm)/Si0.3Ge0.7 etch stop layer (6.5 nm)/Ge buffer layer (500 nm)/AlAs/GaAs hetero-structures were grown by low-pressure CVD. To improve back interfacial quality, plasma treatment or 0.5-nm-thick Si passivation on top of Ge layer prior to ALD-Al2O3 deposition were carried out for GeOI n or pMOSFETs, respectively. Then, the direct bonding to SiO2/Si host substrate was performed in press machine under vacuum at 200 °C. Note that the direct bonding was performed at interface of Al2O3/SiO2 to prevent the damage for Ge channel layer. To release GaAs substrate, the AlAs layer was etched selectively and laterally in HCl solution at room temperature. Then, Ge buffer layer and Si0.3Ge0.7 etch stop layer were etched, sequentially. This HELLO technology was performed at low temperature to avoid thermal stress, leading to high quality GeOI structure. The detailed fabrication method for GeOI MOSFETs can be found elsewhere [4]. GeOI n and pMOSFETs Figures 2 show the I D-V G transfer chcaracteristics of UTB GeOI n and pMOSFETs fabricated with HELLO technology with T body of 3 and 4 nm, respectively. Comparable device performance has been achieved and a high I on-I off ratio of 105 has been obtained in both devices. The TEM image of ultrathin GeOI channel (3 nm) in MOSFETs fabricated through HELLO technology is also shown in the inset. Single crystalline Ge layer with precise channel thickness control down to 3 nm was achieved. Positive V th shift was observed in GeOI pMOSFETs as compared with that of nMOSFETs, which can be attributed to carrier confinement at Si-passivated GeOI back interface owing to Ge/Si valence band offset. Figures 3 show the benchmarks of T body dependence of effective (a) electron and (b) hole mobility at N S of 2×1012 cm-2. The mobility of reported GeOI [1, 2] and SOI devices [6] are also plotted for comparison. Severe mobility degradation with scaling T body was found for both n and pMOSFETs as fabricated with conventional GeOI substrates. Nevertheless, it was confirmed the effective electron mobility in HELLO fabricated GeOI significantly increased with scaling T body below 10 nm. This unique phenomenon may be attributed to the modulation of Ge conduction band structure [4]. On the other hand, GeOI pMOSFETs attained much higher mobility of about 150 cm2/Vs in UTB regime. The trend of mobility degradation with scaling T body was also suppressed for the devices fabricated with HELLO technology, presenting the clear benefit of reducing thickness fluctuation and Si-passivated back interface. Thanks to HELLO technology, for the first time, GeOI n and pMOSFETs both outperformed their SOI counterparts in UTB regime. Conclusion High quality GeOI substrates have been successfully fabricated through HELLO technology. Both electron and hole mobility in GeOI devices outperformed their SOI counterparts in UTB regime, indicating that UTB-GeOI structure is very promising for future Ge CMOS applications. Acknowledgement The authors would like to thank the support from Sumitomo Chemical Co., Ltd. and Hitachi Kokusai Electric Inc. for Ge layer transfer technology and AIST-NPF for device fabrication.

(Invited) High Performance UTB GeOI n and pMOSFETs Featuring HEtero-Layer-Lift-Off (HELLO) Technology

Advanced HEtero-Layer-Lift-Off (HELLO) technology utilizing Ge/SiGe/Ge hetero-epitaxy technique was implemented to realize high quality ultrathin body (UTB) Ge-on-insulator (GeOI) structures. Top interfacial quality of GeOI has been taken care by plasma enhanced ALD-Al2O3 passivation. On the other hand, bottom interfacial quality of GeOI was improved by N2O plasma treatment or Si passivation for UTB GeOI n and pMOSFETs, respectively. Besides, GeOI body thickness (T body) was precisely controlled through SiGe etch stop layer and digital etching process. For lowering parasitic resistance of S/D regions of bulk Ge n and pMOSFETs, ion implantation after germanidation (IAG) has been demonstrated as an effective way. Moreover, high performance UTB GeOI n and pMOSFETs with T body less than 5 nm have been successfully fabricated for the first time. Thickness dependence of carrier mobility of GeOI has also been investigated systematically through split-CV method, revealing a great potential of UTB GeOI structures in future Ge CMOS application.

Low Dark Current Ge/Si Photodetector Grown By Selective Epitaxial Growth

Normal-incidence p-i-n Ge/Si photodetectors were fabricated on SOI substrate by selective epitaxy. Thermal annealing and surface Si passivation were performed in situ to reduce the dark current. Bulk leakage current density and surface leakage density as low as 3.4 mA/cm2 and 0.4 μA/cm are achieved under –1 V, respectively. The responsivity at wavelength of 1550 and 1310 nm are 0.27 and 0.59 A/W under zero-bias, respectively. The photodetector has a 3-dB bandwidth of 48 GHz at –3 V. Clear open eye diagrams at 40 Gbps are observed under zero-bias at a wavelength of 1550 nm.

High-efficiency heterojunction crystalline Si solar cells

High-efficiency back-contact heterojunction crystalline Si (c-Si) solar cells with record-breaking conversion efficiencies of 26.7% for cells and 24.5% for modules are reported. The importance of thin-film Si solar cell technology for heterojunction c-Si solar cells with amorphous Si passivation layers in improving conversion efficiency and reducing production cost is demonstrated. Our attempts to reduce the production cost of a heterojunction c-Si solar cell by applying a SiOx layer prepared by a plasma-enhanced CVD method are presented. The characteristics of heterojunction c-Si solar cells are clarified by comparing them with those of practical homojunction solar cells, and crucial targets for industrialization of back-contact heterojunction c-Si solar cells are discussed. Owing to the recent improvement of c-Si solar cells and perovskite solar cells, conversion efficiencies over 30% have become a realistic target by using a two-terminal tandem structure with a heterojunction c-Si solar cell and a perovskite solar cell.

Integrating a Charge Trapping Layer in Passivated Emitter Rear Contact Cell to Enhance Efficiency

In this letter, we propose a charge trapping technique to enhance passivated emitter rear contact solar cell efficiency without changing the fabrication process. We trap the charge by applying voltage to the rear contact between the SiNx passivation layer and Si substrate with special metal screen printing. Furthermore, different charge voltages were applied for IV curve, fill factor, efficiency, and series resistance comparisons. The IV curve was measured with white light, with results showing that the fill factor and efficiency increase and series resistance decrease with an increase in charge voltage. Finally, a model was proposed to explain the charge trapping effect in the passivation layer.

Investigation of crystalline silicon surface passivation by positively charged POx/Al2O3 stacks

We investigate the passivation of crystalline Si (c-Si) surfaces by phosphorus oxide (POx) thin films deposited in an atomic layer deposition (ALD) reactor and capped in-situ by ALD Al2O3. Passivation is demonstrated on both n- and p-type (100) Si surfaces, and for POx/Al2O3 stacks deposited at both 25 °C and 100 °C. In contrast to Al2O3 alone, POx/Al2O3 passivation is activated already by annealing at temperatures as low as 250 °C in N2 in all cases. Best results were obtained after annealing at 350 °C and 450 °C for films deposited at 25 °C and 100 °C respectively, with similar implied open-circuit voltages of 723 and 724 mV on n-type (100) Si. In the latter case an outstandingly low surface recombination velocity of 1.7 cm/s and saturation current density of 3.3 fA/cm2 were obtained on 1.35 Ω cm material. Passivation of p-type Si appeared somewhat poorer, with surface recombination velocity of 13 cm/s on 2.54 Ω cm substrates. Passivation was found to be independent of POx film thickness for films of 4 nm and above, and was observed to be stable during prolonged annealing up to 500 °C. This excellent passivation performance on n-type Si is attributed partly to an unusually large positive fixed charge in the range of 3–5 × 1012 cm−2 (determined from capacitance–voltage measurements) for stacks deposited at both temperatures, which is significantly larger than that exhibited by existing positively charged passivation materials such as SiNx. Indeed, passivation performance on n-type silicon is shown to compare favourably to state-of-the-art results reported for PECVD SiNx. POx/Al2O3 stacks thus represent a highly effective positively charged passivation scheme for c-Si, with potential for n-type surface passivation and selective doping applications.

Fabrication of TiOx–Si photoanode and its energetic photoelectrochemical performance

Pristine Si is oxidized to insulative SiO2 when it comes in contact with air and water. Covering it with a protection layer inhibits passivation of Si and significantly improves its photoelectrochemical performance. In this study, TiOx with gradient change of oxygen stoichiometry ratio (TiOx) was designed as a protection layer and fabricated via a chemical vapour deposition process in Ar flow under 400 °C for 1 min. The anaerobic atmosphere and short heating duration synergistically produced the ratio of O and Ti lower than two in the prepared film. XPS analysis suggested the existance of TiO2 only at the surface of TiOx film and Ti3+ and Ti2+ appeared successively with the increase of distance to the surface. The first advantage of lower-valence-state Ti and oxygen deficiency was to inhibit the oxidation of Si and to reduce electric resistance of the interface and the protection layer. The second advantage was to create a defect energy level under the conduction band of TiO2 which provided the possibility for holes in the valence band of Si to be transferred to this defect level. This tunnel like transfer enhanced the photogenerated charge separation and redox ability of TiOx–Si which brought a 3.25 folds enhancements in photocurrent density compared to that of stoichiometric TiO2–Si at 0 V (SCE) under simulated sunlight. This study highly motivates further research on transparent and conductive protection layer of Si photoelectrode.

Local Schottky contacts of embedded Ag nanoparticles in Al2O3/SiNx:H stacks on Si: a design to enhance field effect passivation of Si junctions

This paper describes an original design leading to the field effect passivation of Si n+-p junctions. Ordered Ag nanoparticle (Ag-NP) arrays with optimal size and coverage fabricated by means of nanosphere lithography and thermal evaporation, were embedded in ultrathin-Al2O3/SiNx:H stacks on the top of implanted Si n+-p junctions, to achieve effective surface passivation. One way to characterize surface passivation is to use photocurrent, sensitive to recombination centers. We evidenced an improvement of photocurrent by a factor of 5 with the presence of Ag NPs. Finite-difference time-domain (FDTD) simulations combining with semi-quantitative calculations demonstrated that such gain was mainly due to the enhanced field effect passivation through the depleted region associated with the Ag-NPs/Si Schottky contacts.

Operational Characteristics and Failure Modes of Protected Si Anodes for Sunlight-Driven Water Oxidation

The development of a fully integrated photoelectrochemical cell capable of efficiently producing carbon-neutral fuels from sunlight, water, and atmospheric carbon dioxide is challenged by the electrochemical corrosion of photoelectrodes at the potentials required to drive the desired redox reactions. Recent progress in the development of protective coatings that integrate transparent conductive oxides with electrocatalysts has extended the operational lifetime of technologically important semiconductors such as Si, GaAs, and InP for use as photoanodes in aqueous alkaline electrolytes from seconds to hundreds or thousands of hours. Although an understanding of the failure modes for such devices has not yet been developed fully, systematic examinations of failure modes could lead to methods for improving the maximum attainable lifetimes, and would support the development of accelerated stability-testing protocols as well as modeling and simulation efforts to estimate device durability. This presentation will first provide a brief overview of recent progress in the development of protective coatings and catalyst-placement strategies for the stabilization of semiconductor electrodes for use in integrated solar fuels systems, and will then provide an in-depth examination of the failure mechanisms governing the performance and durability of a model system – Si anodes patterned with micrometer-scale Ni islands operating in contact with 1.0 M KOH (aq). In the patterned-catalyst approach, an insoluble protective oxide layer is grown over areas of the semiconductor not covered by the catalyst islands, and during operation the current is collected at and passed through the catalyst islands. For semiconductors such as Si that form insoluble oxides under water-oxidation conditions, the protective oxide layer can be grown in situ. The patterned-catalyst approach therefore can be considered a model system for protective coatings with pinhole or grain-boundary defects – where stability depends upon on passivation of the semiconductor beneath regions of the coating that allow direct contact with the electrolyte – allowing top-down definition and spatial control over regions analogous to through-film defects that are otherwise difficult to control and vary systematically. Ex situ and operando electrochemical, microscopic, and spectroscopic techniques were used to investigate the performance and stability of Si anodes patterned with a square array of micrometer-sized Ni islands and operated in contact with 1.0 M KOH (aq). Non-photoactive p+-Si(111) substrates were used to evaluate the stability of the catalyst as well as the formation of the passive SiOx layer. The impact of the diurnal cycle on the stability of the electrodes was evaluated by investigating the behavior of Si(100) substrates under open-circuit conditions. Buried-junction np+-Si(111) substrates were used to evaluate performance and stability under simulated solar illumination. The stability and efficiency of the patterned-catalyst Si electrodes were affected by the filling fraction of the Ni catalyst, the orientation and dopant type of the substrates, and the measurement conditions. The electrochemical behavior at different stages of operation, including Ni catalyst activation, Si passivation, steady-state operation, and device failure was affected by the dynamic processes of anodic formation and isotropic dissolution of SiOx on the exposed Si. Buried-junction np+-Si(111) photoanodes with an 18.0% filling fraction of a square array of Ni microelectrodes demonstrated performance equivalent to a Ni anode in series with a photovoltaic device having an open-circuit voltage of 538 ± 20 mV, a short-circuit current density of 20.4 ± 1.3 mA cm-2, and a photovoltaic efficiency of 6.7 ± 0.9%. For these samples the photocurrent density at the equilibrium potential for oxygen evolution was 12.7 ± 0.9 mA cm-2, yielding an ideal regenerative cell solar-to-oxygen conversion efficiency of 0.47 ± 0.07%. The photocurrent passed exclusively through the Ni catalyst islands to evolve O2 with nearly 100% faradaic efficiency. However, the passivating layer of SiOx dissolves in KOH, resulting in Si corrosion and SiOx dissolution especially in the dark. The dynamic processes of SiOx formation and etching affect both the electrical stability of the electrochemical and photovoltaic components, as well as the optoelectronic stability of the photovoltaic component. Localized undercutting of catalyst islands and damage to the emitter profile correlated with the current distribution on sample surfaces, suggesting substantial current branching at the location where the active catalysts and the corrosive solution are both present. This work provides evidence of one likely failure mechanism for Si photoanodes protected by transparent catalytic films, specifically, undercutting and removal of the catalysts at defects in protective coatings that can arise during fabrication, deployment and operation.

Forming-free performance of a-SiNx:H-based resistive switching memory obtained by oxygen plasma treatment

An a-SiNx-based resistive random access memory (RRAM) device with a forming-free characteristic has significant potentials for the industrialization of the next-generation memories. We demonstrate that a forming-free a-SiNxOy RRAM device can be achieved by an oxygen plasma treatment of ultra-thin a-SiNx:H films. Electron spin resonance spectroscopy reveals that Si dangling bonds with a high density (1019 cm−3) are distributed in the initial state, which exist in the forms of Si2N≡Si·, SiO2≡Si·, O3≡Si·, and N3≡Si·. X-ray photoelectron spectroscopy and temperature-dependent current analyses reveal that the silicon dangling bonds induced by the oxygen plasma treatment and external electric field contribute to the low resistance state (LRS). For the high resistance state (HRS), the rupture of the silicon dangling bond pathway is attributed to the partial passivation of Si dangling bonds by H+ and O2−. Both LRS and HRS transmissions obey the hopping conduction model. The proposed oxygen plasma treatment, introduced to generate a high density of Si dangling bonds in the SiNxOy:H films, provides a new approach to forming-free RRAM devices.

High-Yield Passive Si Photodiode Array Towards Optical Neural Recording

Emerging fluorescent protein-based sensors allow researchers to monitor neural activities via optical recording of the fluorescence signals. This optical method is able to monitor multiple cell signals with ease in identifying individual cells in dense neurocircuitry. To this end, we demonstrate a high-yield passive Si photodiode array, aiming to establish a miniaturized optical recording device toward in-vivo use. Our fabricated array features a high yield (>90%), low detection limit (32 $\mu {\text{W}}$ /cm2), and high speed (1000 frames per second for scanning up to 100 pixels). Using a fast I–V measurement setup, we examined the device performance in terms of detection limit and speed. A mapping of the light intensity on the entire array manifests its promise as an on-chip fluorescence imager for optical neural recording. The array routinely consumes sub- $10~\mu {\text{W}}$ power, which is suitable for chronic in vivo use.

Surface recombination velocity imaging of wet-cleaned silicon wafers using quantitative heterodyne lock-in carrierography

InGaAs-camera based heterodyne lock-in carrierography (HeLIC) is developed for surface recombination velocity (SRV) imaging characterization of bare (oxide-free) hydrogen passivated Si wafer surfaces. Samples prepared using four different hydrofluoric special-solution etching conditions were tested, and a quantitative assessment of their surface quality vs. queue-time after the hydrogen passivation process was made. The data acquisition time for an SRV image was about 3 min. A “round-trip” frequency-scan mode was introduced to minimize the effects of signal transients on data self-consistency. Simultaneous best fitting of HeLIC amplitude-frequency dependencies at various queue-times was used to guarantee the reliability of resolving surface and bulk carrier recombination/transport properties. The dynamic range of the measured SRV values was established from 0.1 to 100 m/s.

Quantum cascade lasers transfer-printed on silicon-on-sapphire

We demonstrate coupling of the laser mode into a passive waveguide by transfer-printing fully processed mid-infrared quantum cascade lasers onto a silicon-on-sapphire platform. The laser waveguide mode is coupled into a silicon waveguide via an adiabatic taper. The experimentally achieved coupling efficiency of the taper is estimated to be ∼10%, and theoretical calculations show that coupling efficiency over 75% is achievable by reducing the adhesive layer thickness to below 100 nm. Light coupling to silicon waveguides is confirmed by images taken at the output facet of a 3-mm-long passive Si waveguide with a mid-infrared camera. Our technique enables the development of heterogeneous photonic systems integrated with a wide range of fully processed semiconductor laser devices, including buried-heterostructure lasers, which was not previously possible.

Improved performance of Ge n+/p diode by combining laser annealing and epitaxial Si passivation**Project supported by the High Level Talent Project of Xiamen University of Technology, China (Grant No. YKJ16012R).

A method to improve Ge n+/p junction diode performance by excimer laser annealing (ELA) and epitaxial Si passivation under a low ion implantation dose is demonstrated. The epitaxial Si passivation layer can unpin the Fermi level of the contact of Al/n-Ge to some extent and reduce the contact resistance. In addition, the fabricated Ge n+/p junction diode by ELA plus epitaxial Si passivation exhibits a decreased reverse current density and an increased forward current density, resulting in a rectification ratio of about 6.5×106 beyond two orders magnitude larger than that by ELA alone. The reduced specific contact resistivity of metal on n-doped germanium and well-behaved germanium n+/p diode are beneficial for the performance improvement of Ge n-MOSFETs and other opto-electronic devices.