Silicon Carbide Semiconductor Research Articles

Online electrochemical impedance spectroscopy detection integrated with step-up converter for fuel cell electric vehicle

Declining reserves of the crude oil and increasingly serious environmental pollution have emphasized the requirement of a suitable substitute to our actual petroleum-based automobile market. An environmentally-friendly and efficient power generation device based on a sustainable energy source is attractive to settle this issue and realize cleaner production. Proton Exchange Membrane Fuel Cell (PEMFC), which achieves zero emission, modular construction, high energy conversion ratio and etc., has been treated as one of the most promising solution for automobile applications. Nevertheless, many technical restrictions such as relatively short life cycle have still to be conquered before satisfying the requirements of large-scale commercialization.Electrochemical Impedance Spectroscopy (EIS) is an effective technique for fault detection of electrochemical system. This paper presents an on-line EIS detection strategy based on the proposed fuel cell stack connected step-up converter. No additional equipment is required compared with conventional detection process. Furthermore, the proposed 6-phase Interleaved Boost Converter (IBC) based on Silicon Carbide (SiC) semiconductors and inverse coupled inductors has achieved low input current ripple, high efficiency, high voltage gain ratio, high compactness and high redundancy. Benefiting from these advantages, the lifespan of fuel cell stack can be extended. The proposed online EIS detection has been realized and the results have been compared with theoretical analysis.

Radiation environment in the I2S-LWR concept: Part I – Radial distribution and its impact on vessel fluence, neutron detectors placement, and radial reflector gamma heating

The neutron and gamma environment surrounding the Integral Inherently-Safe Light Water Reactor (I2S-LWR) core was characterized to ensure safe operation over the 100-year lifetime of the plant with respect to important design parameters. To demonstrate that all requirements were met, a detailed shielding model was developed in the Scale6.1 code package and used with the MAVRIC shielding sequence. The neutron fluence to the reactor vessel at the end of the plant lifetime was shown to be almost two orders of magnitude below levels that would lead to neutron embrittlement (due to a wide downcomer region despite the increased plant lifetime and higher power density). Additionally, the feasibility of placing radiation-hardened high-temperature silicon carbide semiconductor detectors within the pressure vessel was demonstrated showing that flux levels could be monitored covering all ranges from startup (“source range”) through full-power operations. Furthermore, the gamma heating distribution within the radial neutron reflector directly outside of the core was determined and used to guide the design of cooling channels in order to remove the 6.6 MW of energy deposited in the reflector.

Design and Manufacturing of the SiC-Based Power Supply System for Resistive-Wall-Mode Control in JT-60SA

In JT-60SA, the control of resistive-wall-mode (RWM) instabilities will also be realized with a dedicated active control system based on 18 in-vessel sector coils. Each coil will be fed independently by a dedicated fast inverter. Due to the outstanding dynamic performance required, new insulated-gate bipolar transistor modules based on silicon carbide (SiC) have been adopted. Being capable to switch at 30 kHz, these components, together with a very fast control system, allow reaching the required high dynamic performance with the simple and compact H-bridge topology. The RWM-PS will be the first power supply system for fast control of plasma instabilities in fusion experiments adopting SiC semiconductors. This paper gives an overview of the final design of the RWM-PS, with particular emphasis on its special features and the solutions implemented to satisfy the critical requirements. The issues related with the high switching frequency and the peculiar nature of the load will be treated in detail.

DEVELOPING RADIATION RESISTANT THERMAL NEUTRON DETECTORS FOR THE E_LIBANS PROJECT: PRELIMINARY RESULTS.

Radiation-resistant, gamma-insensitive, active thermal neutron detectors were developed to monitor the thermal neutron cavity of the E_LIBANS project. Silicon and silicon carbide semiconductors, plus vented air ion chambers, were chosen for this purpose. This communication describes the performance of these detectors, owing on the results of dedicated measurement campaigns.

A hierarchy of hydrodynamic models for silicon carbide semiconductors

Abstract The electro-thermal transport in silicon carbide semiconductors can be described by an extended hydrodynamic model, obtained by taking moments from kinetic equations, and using the Maximum Entropy Principle. By performing appropriate scaling, one can obtain reduced transport models such as the Energy transport and the drift-diffusion ones, where the transport coefficients are explicitly determined.

An Energy Transport Model Describing Electro-Thermal Transport in Silicon Carbide Semiconductors

ABSTRACTBy taking the moments of the coupled Boltzmann transport equations for electrons and phonons, an extended hydrodynamic model describing the electron transport in silicon carbide semiconductors has been obtained. This model is coupled with the heating of the crystal lattice. All the transport coefficients and the constitutive equations are determined by using the maximum entropy principle of extended thermodynamics. By using this model with a suitable limit, thermoelectric effects in silicon carbide devices are investigated.

Alpha radiation induced space charge stability effects in semi-insulating silicon carbide semiconductors compared to diamond

Although the use of semi-insulating silicon carbide material for radiation detection purposes has been previously demonstrated, its use in practical applications has been inhibited by space charge stability issues caused by defect concentrations within the material, the so called polarisation effect, by which the count rate and resultant spectrum changes with irradiation time.This is a result of the charge carriers generated during irradiation filling deep level defects within the material, causing space charge buildup and de-activating that trap level until the trapped charge is re-emitted. Consequently, the time dependence of the polarisation effect has been determined by a combination of parameters that can be influenced during operation, namely the incident radiation intensity, ambient light, temperature and bias. The material properties have also been considered through the use of materials with different defect capture cross sections, concentrations and energy level.A thorough characterisation of the alpha irradiation induced polarisation phenomenon in semi-insulating silicon carbide has been conducted to demonstrate that stable operation detectors are in fact possible with this material. The effects were compared to single crystal diamond and polycrystalline diamond, which are known to exhibit similar polarisation issues.The polarisation rate as an effect of incident flux, bias and temperature was determined, with the depolarisation rate as a function of ambient light and bias also demonstrated. Consequently it has been shown that stable operation can be maintained for detectors made from semi-insulating SiC material of active thickness 350μm at incident alpha radiation fluxes of <0.7 alphas per second per mm2 with high operating biases (>±400V). Furthermore, polarisation can be suitably managed or reduced through the use of light illumination and elevated temperatures (373K).

Evaluation of High Temperature Joining Technologies for Semiconductor Die Attach

Abstract The development of novel high temperature die attach methods for semiconductor packaging enables use in harsh environments and unique opportunities for demanding industrial applications such as controls and monitoring for next generation engine and airframe platforms. Traditional die attach materials including lead solders and conductive adhesives cannot meet requirements of operation temperatures up to and exceeding 300°C due to their limited melting and glass transition temperatures [1]. The Manufacturing Technology Centre Ltd (MTC) has evaluated a range of high temperature die attach materials and processes for silicon and silicon carbide (SiC) semiconductors. Assembly processes were explored for bonding components with and without a back metallisation and with capability to support electrical back contact if required. Die attach methods evaluated include:Sinterable silver materials for back metallised semiconductor componentsSilver glass for non-back metallised semiconductor componentsGold-silicon near eutectic preforms for non-back metallised semiconductor components Two types of substrates were selected including high temperature co-fired ceramic (HTCC) packages and gold or silver plated Kovar substrates. Test assemblies were subjected to accelerated life tests consisting of thermal ageing at 400°C and thermal cycling of −40°C to 200°C. These tests enabled the evaluation of the die attach materials after accelerated conditions of use. Reliability performance of the die attach materials was assessed using visual and X-ray inspection, mechanical shear testing and microstructure analysis. For sinterable silver materials, the test assemblies constructed using HTCC packages showed no significant reduction in shear strength after 1,008 hours ageing at 400°C. However shear strengths of the test assemblies constructed using Kovar substrates reduced by 95% of the initial values after ageing at 400°C for 336 hours. All test assemblies showed no significant reduction in adhesion after thermal cycling of −40°C to 200°C for 1,000 cycles. In addition, no apparent differences in shear strengths could be detected for sintered silver interconnections for gold and silver metallised semiconductor components. Gold-silicon bonding as performed using a near eutectic preform had limited performance as aged at 400°C. Silver glass test assemblies constructed using HTCC packages showed a 50% reduction in shear strength compared to the initial values after thermal ageing at 400°C for 1,000 hours. A similar reduction in adhesion was presented after thermal cycling of −40°C to 200°C for 1,000 cycles.

Investigation on Electrochemical Discharge Micro-Machining of Silicon Carbide

Electrochemical discharge machining (ECDM) process has great potential to machine hard, brittle and electrically non-conducting materials in micron range. The objective of this paper is to investigate into electrochemical discharge micro-machining on electrically semi-conductor type silicon carbide (SiC) material so as to study the effects of applied voltage, electrolyte concentration and inter-electrode gap on material removal rate (MRR) and radial overcut (ROC) of micro-drilled hole. Experiments were conducted based on L9 array of Taguchi method with stainless steel µ-tool of 300µm diameter using NaOH electrolyte. An attempt has been made to find out the single as well as multi-objective optimal parametric combinations for maximum MRR and minimum ROC. The single-objective parametric combinations were selected as 45V/20wt%/20mm and 25V/20wt%/40mm for maximum MRR and minimum ROC respectively whereas multi-objective optimal parametric combinations was found as 25V/20wt%/40mm. Further mathematical models have been developed between the above machining parameters and characteristics.

Sol-gel membrane modification for enhanced photocatalytic activity

Abstract Novel materials comprising titanium dioxide (TiO2), silicon dioxide (SiO2) and silicon carbide (SiC) semiconductors, were deposited over silicon-carbide substrates to develop photocatalytic membranes. The synergistic effect between TiO2 obtained by sol–gel process, Degussa P25 and silicon carbide nanoparticles were tested in terms of photocatalytic degradation of methylene blue and their influence over porosity. The surface of the photocatalyst layers developed were characterized by scanning electron microscopy (SEM) showing that the immobilization was carried out successfully whereas the contact angle measurements revealed improved hydrophilic properties. Different surface properties were obtained depending on the different coating compositions applied. Several photocatalytic experiments were conducted and reproducibility was tested using the most promising membranes in terms of photodegradation potential that reached up to 72% degradation of methylene blue. Comparison of UV degradation efficiency between unmodified and modified substrates revealed a synergistic effect when TiO2 and SiC were combined. The most promising membrane in terms of photocatalytic effectiveness and reusability was modified with SiO2 obtained by sol-gel combined with Degussa TiO2 nanoparticles. This membrane was used in a dead-end filtration system combined with UV light. Results confirmed the photocatalytic activity of the membrane combined with filtration, showing that the modified membranes have a high potential to degrade organic contaminants.

Metallic TIM Testing and Selection for IC, Power, and RF Semiconductors

Metallic TIM Testing and Selection for IC, Power, and RF Semiconductors

The Design and Evaluation of an Integrated Wire Bond-less Power Module using a Low Temperature Co-fired Ceramic Interposer

This article presents the plan and initial feasibility studies for an Integrated Wire Bond-less Power Module. Contemporary power modules are moving toward unprecedented levels of power density. The ball has been set rolling by a drastic reduction in the size of bare die power devices owing to the advent of wide bandgap semiconductors such as silicon carbide (SiC) and gallium nitride. SiC has capabilities of operating at much higher temperatures and faster switching speeds compared with its silicon counterparts, while being a fraction of their size. However, electronic packaging technology has not kept pace with these developments. High-performance packaging technologies do exist in isolation, but there has been limited success in integrating these disparate efforts into a single high-performance package of sufficient reliability. This article lays the foundation for an electronic package designed to completely leverage the benefits of SiC semiconductor technology, with a focus on high reliability and fast switching capability. The interconnections between the gate drive circuitry and the power devices were implemented using a low temperature cofired ceramic interposer.

(Invited) Vertical GaN High Voltage Transistors: Comparison with SiC Switches

Wide bandgap (WBG) semiconductor high-voltage power switching devices, especially those made on silicon carbide (SiC) and gallium nitride (GaN), promise transformative advances in electrical power switching systems because of superior electrical and thermal properties of these materials compared to the semiconductor silicon [1]. Both SiC and GaN semiconductors contain a high density of crystal defects and the role of defects on the performance and reliability of electrical power switching devices under extreme operating environment is not clear. The approach and results for achieving wide bandgap semiconductor (GaN) based high voltage “vertical” switches is reported. The GaN and the related ternaries, AlGaN and InGaN are the materials of choice due to their superior properties. While the performance of the current generation of GaN devices is limited by material and reliability issues, the promise still remains an elusive goal. The results reported in the present work address the issues of performance and reliability for future GaN and related compound power devices, and will enable the development a new class of devices based on V-HEMTS and Trench HFETs to exceed the state of the art of 2.5 kV for silicon and SiC devices for blocking voltages up to 10 kV. We report results which include the design, fabrication and testing of structures exploiting HEMT GaN/AlGaN structures as well as a new and unique GaN Trench MOS design shown in Figure 1. In this comparison, we review the key reliability issues facing SiC High Voltage MOSFETS, as well as the role of threading edge dislocations and threading screw dislocations affecting SiC MOSFET reliability. These issues are compared to similar defect related limitations for GaN vertical devices as well. Material-device-performance correlation methodology ensures that the reliability is designed in through the physics of failure approach. The research results reported also assesses other novel structures with blocking voltages in excess of 10kV as well as the evaluation of the reliability of these devices under system environments. We note that crystallographic defects when present in active areas of SiC-based devices have a negative influence on device performance, reliability and reproducibility. Micropipes are well-known as device killers while the detrimental influence of Basel Plane Dislocations (BPDs) on device performance is also established [2]. For the present work we have investigated a vertical 4H-SiC Junction Barrier Schottky (JBS) diode where a slightly higher doped n-type buffer layer is used to constrict the spreading of the space-charge region beyond the lightly doped n- - type drift-region. The diode was subjected to increasing reverse voltage stress starting at the rated 600V. The reported experimental data for high-voltage SiC semiconductor strongly suggests that material defects have profound impact on its characteristics under extreme environments. Since GaN semiconductor has even higher density of material defects, this problem may be further exacerbated. REFERENCES [1] K. Shenai et al, IEEE Trans. Electron Devices 36, 1811-1823, 1989. [2] R. L. Myers-Ward, D. K. Gaskill, R. S. Stahlbush, N. A. Mahadik, V. D. Wheeler, L. O. Nyakiti, and C. R. Eddy, Jr., Electro Chemical Society Transactions, vol. 50, no. 3, ISBN 978-1-62332-002-7, pp. 103-108, Oct. 2012.

(Invited) Methods for Dynamic Analysis and Stability Assurance of Power Modules with Wide Bandgap Devices

This paper addresses the problems that have been widely reported with the dynamic behavior of application circuits using wide bandgap devices of both common semiconductor types, i.e., silicon carbide and gallium nitride. It is now common to see recommendations to the effect that advanced wide bandgap transistors need advanced packaging to realize reliable operation and expected benefits. This thinking is so prevalent that at least one manufacturer of GaN transistors does not supply their devices in packaging. While this is hardly the view of most manufacturers, it does highlight that wide bandgap transistors have succeeded so well in demonstrating new capabilities in high voltage, high current, and/or high frequency that the design methodology for integrating these devices into power electronics applications needs to be rethought. But what should this thinking be? Since fast switching is an essential part of the value of wide bandgap devices, it is imperative that the designers of high-power modules using these devices have modeling and simulation tools to manage the near RF dynamic behavior of the system in order to preclude instability and to manage electromagnetic emission. Fortunately, the well established rules of stability in electronic circuits should apply, but during analysis of power electronic applications they need to be augmented with model features omitted with silicon power semiconductors. But as a practical matter, the additions to the model need to be as simple as possible while achieving a level of confidence that a power module design containing SiC or GaN transistors integrated with a particular gate drive will perform with assurance of stability and with acceptable dynamics. An example of acceptable dynamics is compliance with electromagnetic interference certification requirements. But what are the means available? The current literature primarily addresses the issue quantitatively with what might be called the finite element method. This involves trying to experimentally measure or estimate through simulation the lumped element parasitics connecting all devices to each other and to drain, source, and gate buses leading to the external contacts of the power package and continuing to the gate drive. These parasitics are usually lumped series inductances and resistances, and shunt capacitances to surfaces of common potential so that common-mode interference can also be understood. This method has been shown to be successful in identifying the impedance-based mode changes from parasitic “ringing” to periodic oscillations. The former is considered to be a relatively unavoidable nuisance that dissipates the energy stored in parasitic components during ­one switching cycle of a commutated power pole. The latter is unacceptable as it converts energy from a main energy supply, such as the DC bus feeding a half-bridge circuit, into recurring oscillations. An impedance based method known as the concept of negative resistance oscillators is shown to be quantitatively successful at predicting the mode change from stable to unstable in a circuit with a single discrete device. But for the case of a multi-chip power package, with much greater complexity in the number of active semiconductor devices and the number of interconnections and shunt paths defining the parasitic degrees of freedom, a more systematic method is needed that is still behavioral in nature to keep the methodology computationally tractable. This paper describes a novel blend of the approaches used by two engineering communities that integrate power devices into application specific packaging. The impedance method of the lumped-element negative resistance oscillator representing the method of the power electronics engineering community is extended to the power package containing wide bandgap devices with the use of the S-parameter approach that dominates the microwave engineering community. A commercial simulation tool, such as ADS by Agilent, is shown to easily extract S-parameters of arbitrary package design using physics based modeling and simulation. The resulting comprehensive description of the parasitic properties of the power package captured by the multi-port S-parameter behavioral model is combined with the channel-modulation model of the transistors to form a negative resistance description of the root cause of poor dynamics and instability. The result is a new approach for specifying acceptable dynamic performance and stability assurance of multi-chip integrated power modules containing wide bandgap semiconductors.

Ion implantation technology for silicon carbide

Abstract Ion implantation is a key process technique for semiconductor materials, in particular silicon, for local tailoring of the semiconductor properties. The wide bandgap semiconductor silicon carbide (SiC) features outstanding material properties for high power and high temperature electronic devices, but the properties of SiC also make it difficult to manufacture and process the material. The development of implantation technology for SiC has therefore necessitated several changes from mainstream silicon implantation technology. This paper will discuss the difficulties with implantation of SiC for manufacturing of electronic devices and also describe how the problems have been overcome, for instance by implantation at elevated temperatures and using high temperature post-implant annealing.

Design of a Low Inductance Power Module Based on Low Temperature Co-fired Ceramic

Abstract Efficient, compact, and reliable power electronic modules are building blocks of modern day power electronic systems. In recent times, wide bandgap semiconductor devices, such as, silicon carbide (SiC) and gallium nitride (GaN), are widely investigated and used in the power electronic modules to realize power dense, highly efficient, and fast switching modules for various applications. For high power applications is it required to parallel and series several devices to achieve high current and high voltage specifications, which results in larger current conducting traces. One of the major obstacles in using these wideband gap power semiconductor devices are the internal module stray inductance that is associated with these current conducting traces. With increasing demand for higher switching frequency, the internal module parasitic inductance must be reduced to as minimum as possible in order to utilize the full potential of the wide bandgap devices. A multi-layer approach of low-temperature co-fired ceramic (LTCC) to package the wide bandgap devices is investigated. The multi-layer design freedom by using LTCC can be utilized to reduce the footprint of the overall power module, electrical interconnects, hence, reducing the package parasitic inductance. LTCC also facilitates high temperature operations and has a coefficient of thermal expansion matching with wide bandgap devices. In this paper, we report on a LTCC based power module design where LTCC is utilized as an isolation layer between the source and the drain of the power devices. A simulation based parasitic inductance analysis and electro-thermal-mechanical study is performed using ANSYS Workbench Tools to investigate the feasibility of this LTCC based design.

The Design and Evaluation of an Integrated Wire-Bondless Power Module (IWPM) using Low Temperature Co-fired Ceramic Interposer

Abstract This paper presents the plan and initial feasibility studies for an Integrated Wire Bondless Power Module (IWPM). Contemporary power modules are moving toward unprecedented levels of power density. The ball has been set rolling by a drastic reduction in the size of bare die power devices themselves owing to the advent of wide band gap semiconductors like silicon carbide (SiC) and gallium nitride (GaN). SiC has capabilities of operating at much higher temperatures and faster switching speeds as compared with its silicon counterparts, while being a fraction of their size. However, electronic packaging technology has not kept pace with these developments. High performance packaging technologies do exist in isolation, but there has been limited success in integrating these disparate efforts into a single high performance package of sufficient reliability. This paper lays the foundation for an electronic package which is designed to completely leverage the benefits of SiC semiconductor technology, with a focus on high reliability and fast switching capability.

碳化硅MOS器件氧化层界面附近碳存在形式的理论研究进展

由于材料自身的优异物理电学性质，宽带隙半导体碳化硅(SiC)高功率MOSFETs器件可以大幅度降低电力系统的能耗，成为电力电子器件领域的关注热点。然而SiC MOSFET器件中SiC/SiO2的界面态密度比Si/SiO2界面态密度高两个数量级左右，导致器件沟道迁移率较低，致使器件性能严重退化。碳元素的存在是过高界面态产生的关键因素，研究SiC MOSFET器件中SiC/SiO2界面附近碳的存在形式，可以更好的指导碳化硅氧化工艺，更好的发挥碳化硅器件优势。本文首先分析了SiC/SiO2高界面态的根本原因，接着结合国内外最新的理论研究进展，对碳元素的扩散及固定模型、氧化后碳元素的存在形态等模型建模及理论研究进行了综述，为改善SiC器件氧化工艺提供基础理论指导。 Wide band-gap semiconductor silicon carbide (SiC) high-power MOSFET can greatly reduce the energy consumption of the electric power system owing to the excellent material properties, which make it be the focus in the field of power electronics devices. However, the interface state density of SiC/SiO2 in the MOSFET SiC device is two orders higher than that of the Si/SiO2 interface, which leads to the low channel mobility, resulting in the degradation of the performance of the device. The existence of carbon element is the key factor of the high interface states. Research of the existing forms of carbon near the SiC/SiO2 interface in MOSFET SiC devices can better guide the oxidation process. In this paper, the basic reasons of high SiC/SiO2 interface states are analyzed. Then, the model and the theory study of the diffusion, fixed and the existence model of carbon element are summarized combined with the latest research progress. This research can provide basic theoretical guidance to the optimized oxidation process of SiC devices.

MCNPX simulations of the silicon carbide semiconductor detector response to fast neutrons from D–T nuclear reaction

Silicon Carbide (SiC) has been long recognized as a suitable semiconductor material for use in nuclear radiation detectors of high-energy charged particles, gamma rays, X-rays and neutrons. The nuclear interactions occurring in the semiconductor are complex and can be quantified using a Monte Carlo-based computer code. In this work, the MCNPX (Monte Carlo N-Particle eXtended) code was employed to support detector design and analysis. MCNPX is widely used to simulate interaction of radiation with matter and supports the transport of 34 particle types including heavy ions in broad energy ranges. The code also supports complex 3D geometries and both nuclear data tables and physics models. In our model, monoenergetic neutrons from D–T nuclear reaction were assumed as a source of fast neutrons. Their energy varied between 16 and 18.2 MeV, according to the accelerating voltage of the deuterons participating in D–T reaction. First, the simulations were used to calculate the optimum thickness of the reactive film composed of High Density PolyEthylene (HDPE), which converts neutral particles to charged particles and thusly enhancing detection efficiency. The dependency of the optimal thickness of the HDPE layer on the energy of the incident neutrons has been shown for the inspected energy range. Further, from the energy deposited by secondary charged particles and recoiled ions, the detector response was modeled and the effect of the conversion layer on detector response was demonstrated. The results from the simulations were compared with experimental data obtained for a detector covered by a 600 and 1300 [Formula: see text]m thick conversion layer. Some limitations of the simulations using MCNPX code are also discussed.

Influence of the common mode impedance paths on the design of the EMI filters used with SiC-buck converter

This paper deals the design of EMI filter associated with buck converter using fast semiconductors silicon carbide SiC (diode and transistor JFET). To comply with EMC standards, a filter design method based on an equivalent electrical circuit is proposed. The aim is to identify the different values of the EMI filter elements but also to obtain the limits values of the parasitic elements of the passive components which have a major influence on the attenuation of the filters. The purpose is to study the influence of the modification of the common mode propagation paths before and after the installation of the filter. A solution is also proposed to reduce the conducted disturbances that occur at high frequency caused by the fast SiC components.The comparison of the simulation results with the measurements data carried out on a DC-DC converter without and with the EMI filter, shows the effectiveness of the proposed design approach.