Semiconductor Fabrication Equipment Research Articles

Cost-Effective Formation of Ti/Ni/Ti/Au Ohmic Contacts to n-type SiC Using SiO2 Encapsulation Layer during Phosphorous Implant Activation

The purpose of this research is to develop a cost-effective formation of ohmic contacts to n-type SiC through ion implantation and activation. Although Nitrogen is commonly used as an n-type dopant, especially for in-situ doping during epitaxial growth, Phosphorus was chosen as dopant for this work due to the following reasons: Phosphorus has higher solubility than Nitrogen. Thus, it is easier to achieve higher concentration locally through ion implantation, which is needed for quality ohmic contact.Phosphorous has a higher activation rate at lower activation temperature, which could be beneficial if the availability of furnace equipment and cap layer material is limited.Phosphorus-implanted doping profile can be accurately detected through SIMS analysis against a constant in-situ doped nitrogen background doping of the n-type epi layer. Phosphorus was implanted using the implantation series shown in Table 1. As indicated, the three multiple energy implants, with the highest energy of 200keV and the lowest energy of 50keV, will form a 200-nm-deep box profile against a n- epitaxial layer (0.4μm, 2×1017cm-3) used as a RESURF layer for device fabrication (see Figure 1 and 2). Obtaining a good box profile with high doping concentration is necessary in achieving quality ohmic contact with low contact resistance.After ion implantation, the dopants must be thermally activated, and crystal damage must be recovered through annealing at high temperature between 1400~1700°C. The process of ion implantation and activation is shown in Figure 1. Traditionally, cap layers, such as pyrolyzed negative photoresist and AlN, have been used during implant activation to prevent surface deterioration. But using pyrolyzed negative photoresist as a cap layer requires a complex furnace setup, where inert gasses, such as Ar or N2, are needed to prevent the cap layer from oxidizing and evaporating. The deposition of a thick AlN layer requires a DC sputtering system where a 3-inch AlN sputtering target could cost over $500~. The AlN cap layer also requires KOH etch for removal after activation, which can also etch the SiC layer underneath. Because of the above reasons, we propose the use of 1µm thick SiO2 to encapsulate the front and back of implanted sample using PECVD deposition. The SiO2 encapsulation layer withstands temperature up to ~1500°C in air ambient, and the activation temperature and the ambient are set to these values for evaluation and analysis. As shown in Figure 3, if there is sufficient thickness (>1µm) of SiO2, the surface is protected from the deterioration caused by high temperature, and surface roughness is suppressed to the minimum as summarized in Table 2.Ti/Ni/Ti/Au (20nm/90nm/5nm/120nm) were deposited using e-beam evaporation system and annealed at 1050℃ for 2min using Heatpulse 610 RTA (Rapid Thermal Annealing) system in N2 ambient. This unique metal contact stacks are effective in forming quality ohmic contacts even when oxidation during annealing is inevitable. It has been widely understood that only Ni layer is necessary to form nickel silicide during thermal formation of ohmic contacts, but when oxygen is present from incomplete inert gas ambient or poor vacuum conditions, contact layer surface starts to oxides, forming a green NiO (nickel oxide) layer. This unwanted layer significantly deteriorates current conduction. The Ti layer (5nm) over the Ni layer in the proposed metal stacks reacts with oxygen easily, preventing further oxidation inward and achieving quality ohmic contact through effective nickel silicide formation. Even when state-of-the-art semiconductor fabrication equipment is unavailable, the proposed ohmic metal contact stacks will still be effective.Two-contact two-terminal patterns using the above ohmic metal stacks were initially fabricated for the confirmation of activation process. The plots in Figure 5 show the current conduction capability of evaluation pattern with an activation temperature of 1300°C and 1500°C, compared with a non-implanted epitaxial layer. As shown in the figure, with 1300°C annealing, the activation ratio is only ~20% and negative effects from the epi layer degradation dominates over carrier activation. Whereas, with 1500°C annealing, the activation ratio is roughly 70% and current conduction increases by a factor of 4 through the dopant activation process.The specific contact resistance ρC is significantly improved through N+ implant with an obtained value of 2.461×10-5 Ω·cm2 from the TLM evaluation plot in Figure 6. While the N+ implant is effective in reducing contact resistance, the high temperature activation annealing still slightly deteriorates the conductivity of the drift layer, where increase in sheet resistance RS is observed.The proposed ohmic metal stacks and SiO2 encapsulation enable cost-effective formation of ohmic contacts to n-type SiC where complex fabrication equipment setup is unavailable. Figure 1

Stress tensor mesostructures for deterministic figuring of thin substrates

Accessing the immense value of freeform surfaces for mass-sensitive applications such as space optics or metaform optical components requires fabrication processes that are suited to figuring thin substrates. We present stress tensor mesostructures for precisely correcting figure errors, even after microstructures or coatings have been applied to the optical surface. These mesostructures can be fabricated using standard semiconductor fabrication equipment. We introduce three different mesostructure types that each spatially control the three required stress tensor components over the surface of thin substrates, each offering relative advantages. We patterned all three mesostructures on the backsides of silicon wafers to demonstrate freeform figure generation and correction. Stress tensor mesostructures can enable low-cost accurate figuring of the thin substrates that will become increasingly important for lightweight and metasurface optics.

Use of Optical Emission Spectroscopy Data for Fault Detection of Mass Flow Controller in Plasma Etch Equipment

To minimize wafer yield losses by misprocessing during semiconductor manufacturing, faster and more accurate fault detection during the plasma process are desired to increase production yields. Process faults can be caused by abnormal equipment conditions, and the performance drifts of the parts or components of complicated semiconductor fabrication equipment are some of the most unnoticed factors that eventually change the plasma conditions. In this work, we propose improved stability and accuracy of process fault detection using optical emission spectroscopy (OES) data. Under a controlled experimental setup of arbitrarily induced fault scenarios, the extended isolation forest (EIF) approach was used to detect anomalies in OES data compared with the conventional isolation forest method in terms of accuracy and speed. We also used the OES data to generate features related to electron temperature and found that using the electron temperature features together with equipment status variable identification data (SVID) and OES data improved the prediction accuracy of process/equipment fault detection by a maximum of 0.84%.

IOT-based in situ condition monitoring of semiconductor fabrication equipment for e-maintenance

PurposeThe purpose of this paper is to demonstrate industrial Internet of Things (IIoT) solution to improve the equipment condition monitoring with equipment status data and process condition monitoring with plasma optical emission spectroscopy data, simultaneously. The suggested research contributes e-maintenance capability by remote monitoring in real time.Design/methodology/approachSemiconductor processing equipment consists of more than a thousand of components, and unreliable condition of equipment parts leads to the failure of wafer production. This study presents a web-based remote monitoring system for physical vapor deposition (PVD) systems using programmable logic controller (PLC) and Modbus protocol. A method of obtaining electron temperature and electron density in plasma through optical emission spectroscopy (OES) is proposed to monitor the plasma process. Through this system, parts that affect equipment and processes can be controlled and properly managed. It is certainly beneficial to improve the manufacturing yield by reducing errors from equipment parts.FindingsA web-based remote monitoring system provides much of benefits to equipment engineers to provide equipment data for the equipment maintenance even though they are physically away from the equipment side. The usefulness of IIoT for the e-maintenance in semiconductor manufacturing domain with the in situ monitoring of plasma parameters is convinced. The authors found the average electron temperature gradually with the increase of Ar carrier gas flow due to the increased atomic collisions in PVD process. The large amount of carrier gas flow, in this experimental case, was 90 sccm, dramatically decreasing the electron temperature, which represents kinetic energy of electrons.Research limitations/implicationsSemiconductor industries require high level of data security for the protection of their intellectual properties, and it also falls into equipment operational condition; however, data security through the Internet communication is not considered in this research, but it is already existing technology to be easily adopted by add-on feature.Practical implicationsThe findings indicate that crucial equipment parameters are the amount of carrier gas flow rate and chamber pressure among the many equipment parameters, and they also affect plasma parameters of electron temperature and electron density, which directly affect the quality of metal deposition process result on wafer. Increasing the gas flow rate beyond a certain limit can yield the electron temperature loss to have undesired process result.Originality/valueSeveral research studies on data mining with semiconductor equipment data have been suggested in semiconductor data mining domain, but the actual demonstration of the data acquisition system with real-time plasma monitoring data has not been reported. The suggested research is also valuable in terms of high cost and complicated equipment manufacturing.

Silicon Near-Infrared Sensor Using Trench Photodiode Array

In this paper, we report a method of increasing the sensitivity of a silicon near-infrared sensor. The sensor is realized by forming multiple trench-type photodiodes in a silicon chip. The trench photodiodes can be formed using conventional semiconductor fabrication equipment. The device structure allows the depletion layer to be spread over the entire sensor chip even at a bias voltage of 10 V or less. The sensor chip can thereby extend the collection area of photoelectrons to the maximum. At a chip thickness of 540 μm, the conversion efficiency for near-infrared wavelengths between 940 and 1020 nm is more than 80% at room temperature. In addition, the electrical characteristics and response performance of the fabricated 2.4 mm ×2.4 mm test chips are reported. Since the proposed method can achieve a high conversion efficiency at low voltage without cooling in silicon semiconductors, it is expected to provide a low-cost and compact solution for various near-infrared receiver devices such as these for Internet of Things (IoT) applications.

Robust Microfabrication of Highly Parallelized Three-Dimensional Microfluidics on Silicon

We present a new, robust three dimensional microfabrication method for highly parallel microfluidics, to improve the throughput of on-chip material synthesis by allowing parallel and simultaneous operation of many replicate devices on a single chip. Recently, parallelized microfluidic chips fabricated in Silicon and glass have been developed to increase the throughput of microfluidic materials synthesis to an industrially relevant scale. These parallelized microfluidic chips require large arrays (>10,000) of Through Silicon Vias (TSVs) to deliver fluid from delivery channels to the parallelized devices. Ideally, these TSVs should have a small footprint to allow a high density of features to be packed into a single chip, have channels on both sides of the wafer, and at the same time minimize debris generation and wafer warping to enable permanent bonding of the device to glass. Because of these requirements and challenges, previous approaches cannot be easily applied to produce three dimensional microfluidic chips with a large array of TSVs. To address these issues, in this paper we report a fabrication strategy for the robust fabrication of three-dimensional Silicon microfluidic chips consisting of a dense array of TSVs, designed specifically for highly parallelized microfluidics. In particular, we have developed a two-layer TSV design that allows small diameter vias (d < 20 µm) without sacrificing the mechanical stability of the chip and a patterned SiO2 etch-stop layer to replace the use of carrier wafers in Deep Reactive Ion Etching (DRIE). Our microfabrication strategy allows >50,000 (d = 15 µm) TSVs to be fabricated on a single 4” wafer, using only conventional semiconductor fabrication equipment, with 100% yield (M = 16 chips) compared to 30% using previous approaches. We demonstrated the utility of these fabrication strategies by developing a chip that incorporates 20,160 flow focusing droplet generators onto a single 4” Silicon wafer, representing a 100% increase in the total number of droplet generators than previously reported. To demonstrate the utility of this chip for generating pharmaceutical microparticle formulations, we generated 5–9 µm polycaprolactone particles with a CV < 5% at a rate as high as 60 g/hr (>1 trillion particles/hour).

Analysis of Temperature and Gas Flow Distribution in Chamber with Wafer Batch

ABSTRACTWafer temperature distribution and gas flow inside a tube of a chemical vapor deposition chamber, which is a semiconductor fabrication equipment, were analyzed. The control volume was assumed to be a two-dimensional space, and calculation program was developed based on a MATLAB code. The program is divided into two parts – heat transfer and gas flow analyses. The results of the calculation and the temperature test agreed well with each other. Heat loss was observed at both ends of the wafer batch, and gas convection momentum was not enough for the flow to invade into the wafer spacing. Thus, the flow rate and the temperature of the wafer needed to be increased to make the film thickness uniform. To increase the wafer temperature, the radiation adiabatic pedestal was considered. Low emissivity made the pedestal almost adiabatic, which increased the temperature of the wafer batch. To increase the flow rate in the wafer spacing, the eccentric wafer batch was proposed.

Calibration of the straightness and orthogonality error of a laser feedback high-precision stage using self-calibration methods

An ultra high-precision 3-DOF air-bearing stage is developed and calibrated in this study. The stage was developed for the transportation of a glass or wafer with x and y following errors in the nanometer regime. To apply the proposed stage to display or semiconductor fabrication equipment, x and y straightness errors should be at the sub-micron level and the x–y orthogonality error should be in the region of several arcseconds with strokes of several hundreds of mm. Our system was designed to move a 400 mm stroke on the x axis and a 700 mm stroke on the y axis. To do this, 1000 mm and 550 mm bar-type mirrors were adopted for real time Δx and Δy laser measurements and feedback control. In this system, with the laser wavelength variation and instability being kept to a minimum through environmental control, the straightness and orthogonality become purely dependent upon the surface shape of the bar mirrors. Compensation for the distortion of the bar mirrors is accomplished using a self-calibration method. The successful application of the method nearly eliminated the straightness and orthogonality errors of the stage, allowing their specifications to be fully satisfied. As a result, the straightness and orthogonality errors of the stage were successfully decreased from 4.4 μm to 0.8 μm and from 0.04° to 2.48 arcsec, respectively.

Nonlinear iterative learning control applied to an aerostatic X–Y planar motion stage

The planar motion stage with multiple degrees of freedom, positioning in large travel ranges, has been widely used in high-accuracy applications such as semiconductor fabrication equipment and advanced scientific instruments. To achieve precision motion control, iterative learning control has been regarded as an effective means. However, linear iterative learning control techniques attenuate recurring disturbances while amplifying the non-recurring, suffering a fixed trade-off between convergence rates and noise amplification. In the present paper, an amplitude-based nonlinear iterative learning control is proposed with learning gain continuously updated to improve the control performance of the planar motion stage. For error levels beyond a predefined threshold, additional learning gain will be effectively used to diminish the low-frequency tracking error. Below the threshold, the original low gain value is maintained to avoid high-frequency noise amplification. Performance assessment on the developed non-contact planar motion stage shows that the amplitude-based nonlinear iterative learning strategy can realize a remarkable performance which includes micrometer positioning over large travel ranges, and provides a more desirable means to deal with the convergence rate and noise amplification.

A Newly Developed X-Y Planar Nano-Motion Table System with Large Travel Ranges

Precision motion control technology has been widely used in high accuracy applications such as advanced scientific instruments and semiconductor fabrication equipment. In particular, the nano-motion control system with multiple degrees of freedom positioning in large travel ranges has been required in the field of precision engineering. In order to realize such a system, it is necessary and indispensable to develop a planar motion table system based on a new design concept. This paper presents a newly developed X-Y planar nano-motion table system with large travel ranges. This system is composed of a fine motion table and a coarse motion mechanism. The fine motion table is supported by porous aerostatic bearings and driven by voice coil motors with a laser interferometer feedback in a perfect non-contact condition. In addition, the table is driven at the center of gravity during the X-Y planar motion. The coarse motion mechanism has the frame structure with the coils of voice coil motors for the fine motion table. In order to enlarge the table travel ranges, the coarse motion mechanism follows the fine table motion. Performance evaluation results confirm that the developed table system has a remarkable performance which includes nanometer positioning capability over large travel ranges.

A study on the thermoelectric properties of chemical vapor deposited SiC films with temperature and diluent gases variation

Chemical vapor deposited (CVD) silicon carbide (SiC) provides many advantages over other materials due to its high thermal, chemical and mechanical stability at high temperature. For these reasons, CVD SiC has replaced Si in components for semiconductor process. For application of CVD SiC to semiconductor fabrication equipment, thermoelectric properties controls are important. Therefore, we have studied the effects of different diluent gases, deposition temperatures and microstructures of deposited SiC on change of thermoelectric properties. The electrical conductivity of SiC which used N2 diluent gas was larger than SiC deposited with H2 diluent gas. Electrical resistivity varied by an order of 102 for different diluent gases at the same deposition temperature, and Seebeck coefficient also depended on the gas used. Additionally, SiC deposited with H2 showed n-type semiconductor behavior while that deposited with N2 showed p-type characteristics.

Adaptive sliding mode control of a high-precision ball-screw-driven stage

High-precision position control has been widely used in scientific instruments and semiconductor fabrication equipment. Traditionally, controllable displacements with sub-micron and nano-level resolution are usually achieved by piezoelectric actuators because of their high bandwidth and ease of control. However, the travel range of piezoelectric actuator is usually small. In this paper, the ball-screw-driven system is studied to provide long-range and high-precision performance for positioning and tracking control. In such a system, the friction dynamics are divided into the static and the dynamic regimes to describe the dynamic behavior of a conventional ball-screw-driven x-y stage. The same form of adaptive sliding mode controllers are designed in the static and dynamic regimes to obtain the precision performance for controlled stage. A proportional-integral switching surface is proposed to make it easy to assign the performance of the systems in the sliding mode motion and the controller is robust without knowing the bound of disturbance in advance. An illustrative example is included to demonstrate that the system achieves high precision (10 nm) and long-range (10 cm) positioning performance with repeatability and robustness by the proposed control approach.

The Role of Voluntary Industry Standards in Environmental Supply‐Chain Management

SummaryOur article uses a new institutional economics (NIE) framework to explore the role of voluntary industry standards in the development and implementation of environmental supplier‐management programs in the computer industry. We examine two different voluntary standards, one for the management of design for environment (DfE) in the semiconductor fabrication equipment sector and the other for assessing the implementation and use of environmental management systems throughout the computer industry supply chain. We compare and contrast the two standards to explain why the former was widely adopted and has helped integrate DfE into buyer‐supplier relations among adopters, whereas the latter failed to gain acceptance. In line with NIE logic, both standards aimed to lower transaction and customization costs by setting “rules of the game” for interfirm transactions that would help simplify and routinize novel environmental supply‐chain programs and activities. Their differential success can be elucidated in terms of how well each met the NIE criteria for remediableness and legitimacy. We conclude that voluntary standards have the potential to play an important role in promoting DfE in industrial supply chains. We further conclude that NIE provides a conceptual framework of great value to industrial ecologists who analyze how industry standards and other institutions help firms move toward more sustainable supply‐chain management practices.

Automated malfunction diagnosis of semiconductor fabrication equipment: a plasma etch application : Gary S. May and Costas J. Spanos. IEEE Transactions on Semiconductor Manufacturing, 6(1), 28 (1993)

Automated malfunction diagnosis of semiconductor fabrication equipment: a plasma etch application : Gary S. May and Costas J. Spanos. IEEE Transactions on Semiconductor Manufacturing, 6(1), 28 (1993)

Automated malfunction diagnosis of semiconductor fabrication equipment: a plasma etch application

A general methodology for the automated diagnosis of integrated circuit fabrication equipment is presented. The technique combines the best aspects of quantitative algorithmic diagnosis and qualitative knowledge-based approaches. Evidence from equipment maintenance history, real-time tool data, and incline measurements are integrated using evidential reasoning. This methodology is applied to the identification of faults in the Lam Research Autoetch 490 automated plasma etching system located in the Berkeley Microfabrication Laboratory.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>