Semiconductor-insulator Interface Research Articles

Mapping orientational order of charge-probed domains in a semiconducting polymer.

Structure-property relationships are of fundamental importance to develop quantitative models describing charge transport in organic semiconductor based electronic devices, which are among the best candidates for future portable and lightweight electronic applications. While microstructural investigations, such as those based on X-rays, electron microscopy, or polarized optical probes, provide necessary information for the rationalization of transport in macromolecular solids, a general model predicting how charge accommodates within structural maps is not yet available. Therefore, techniques capable of directly monitoring how charge is distributed when injected into a polymer film and how it correlates to structural domains can help fill this gap. Supported by density functional theory calculations, here we show that polarized charge modulation microscopy (p-CMM) can unambiguously and selectively map the orientational order of the only conjugated segments that are probed by mobile charge in the few nanometer thick accumulation layer of a high-mobility polymer-based field-effect transistor . Depending on the specific solvent-induced microstructure within the accumulation layer, we show that p-CMM can image charge-probed domains that extend from submicrometer to tens of micrometers size, with markedly different degrees of alignment. Wider and more ordered p-CMM domains are associated with improved carrier mobility, as extracted from device characteristics. This observation evidences the unprecedented opportunity to correlate, directly in a working device, electronic properties with structural information on those conjugated segments involved in charge transport at the buried semiconductor-dielectric interface of a field-effect device.

Model of the behavior of MOS structures under ionizing irradiation

A quantitative model describing the behavior of MOS structures under ionizing irradiation is developed. The model is based on the capture of holes by hydrogen-containing traps. Some traps are charged and thus form a positive space charge in the insulator. The other traps decay to release positive hydrogen ions. These ions migrate in the insulator electric field to the insulator-semiconductor interface, where they depassivate surface states. The charging of surface states both under irradiation and during measurement of the threshold voltage is taken into account.

Air-Exposure-Induced Gas-Molecule Incorporation into Spiro-MeOTAD Films.

Combined photoemission and charge-transport property studies of the organic hole transport material 2,2',7,7'-tetrakis(N,N-di-p-methoxyphenylamine)-9,9'-spirobifluorene (spiro-MeOTAD) under air exposure and controlled environments of O2, H2O + N2, and N2 (1 atm and under dark conditions) reveal the incorporation of gas molecules causing a decrease in charge mobility. Ultraviolet photoelectron spectroscopy shows the Fermi level shifts toward the highest occupied molecular orbital of spiro-MeOTAD when exposed to air, O2, and H2O resembling p-type doping. However, no traces of oxidized spiro-MeOTAD(+) are observed by X-ray photoelectron spectroscopy (XPS) and UV-visible spectroscopy. The charge-transport properties were investigated by fabricating organic field-effect transistors with the 10 nm active layer at the semiconductor-insulator interface exposed to different gases. The hole mobility decreases substantially upon exposure to air, O2, and H2O. In the case of N2, XPS reveals the incorporation of N2 molecules into the film, but the decrease in the hole mobility is much smaller.

Low Frequency Noise Analysis of Monolithically Fabricated 4H-SiC CMOS Field Effect Transistors

Low frequency noise in 4H-SiC lateral p-channel metal oxide semiconductor field effect transistors (PMOSFETs) in the frequency range from 1 Hz to 100 kHz has been used to investigate the relationship between gate dielectric fabrication techniques and the resulting density of interface traps at the semiconductor-dielectric interface in order to examine the impact on device performance. The results show that the low frequency noise characteristics in p-channel 4H-SiC MOSFETs in weak inversion are in agreement with the McWhorter model and are dominated by the interaction of channel carriers with interface traps at the gate dielectric/semiconductor interface.

25th Anniversary Article: Microstructure Dependent Bias Stability of Organic Transistors

Recent studies of the bias-stress-driven electrical instability of organic field-effect transistors (OFETs) are reviewed. OFETs are operated under continuous gate and source/drain biases and these bias stresses degrade device performance. The principles underlying this bias instability are discussed, particularly the mechanisms of charge trapping. There are three main charge-trapping sites: the semiconductor, the dielectric, and the semiconductor-dielectric interface. The charge-trapping phenomena in these three regions are analyzed with special attention to the microstructural dependence of bias instability. Finally, possibilities for future research in this field are presented. This critical review aims to enhance our insight into bias-stress-induced charge trapping in OFETs with the aim of minimizing operational instability.

Solvent-type-dependent polymorphism and charge transport in a long fused-ring organic semiconductor

Crystalline polymorphism of organic semiconductors is among the critical factors in determining the structure and properties of the resultant organic electronic devices. Herein we report for the first time a solvent-type-dependent polymorphism of a long fused-ring organic semiconductor and its crucial effects on charge transport. A new polymorph of 5,11-bis(triethylsilylethynyl)anthradithiophene (TES ADT) is obtained using solvent-assisted crystallization, and the crystalline polymorphism of TES ADT thin films is correlated with their measured hole mobilities. The best-performing organic thin film transistors of the two TES ADT polymorphs show subthreshold slopes close to 1 V dec(-1), and threshold voltages close to zero, indicating that the density of traps at the semiconductor-dielectric interface is negligible in these devices and the observed up to 10-fold differences in hole mobilities of devices fabricated with different solvents are largely resultant from the presence of two TES ADT polymorphs. Moreover, our results suggest that the best-performing TES ADT devices reported in the literature correspond to the new polymorph identified in this study, which involves crystallization from a weakly polar solvent (such as toluene and chloroform).

Effect of reduction of trap charge carrier density in organic field effect transistors by surface treatment of dielectric layer

In this work, we have studied the effect of surface treatment of SiO2 dielectric layer on the reduction of the trap charge carrier density at dielectric/semiconducting interface by fabricating a metal–insulator–semiconductor (MIS) device using α, ω-dihexylcarbonylquaterthiophene as semiconducting layer. SiO2 dielectric layer has been treated with 1,1,1,3,3,3-hexamethyldisilazane (HMDS) to modify the chemical group acting as charge traps. Capacitance-voltage measurements have been performed on MIS devices fabricated on SiO2 and HMDS treated SiO2. These data have been used for the calculation of trap charge carrier density and Debye length at the dielectric-semiconductor interface. The calculated trap charge carrier density has been found to reduce from (2.925 ± 0.049) × 1016 cm−3 to (2.025 ± 0.061) × 1016 cm−3 for the MIS device with HMDS treated SiO2 dielectric in comparison to that of untreated SiO2. Next, the effect of reduction in trap charge carrier density has been studied on the performance of organic field effect transistors. The improvement in the device parameters like mobility, on/off ratio, and gate leakage current has been obtained with the effect of the surface treatment. The charge carrier mobility has been improved by a factor of 2 through this treatment. Further, the influence of the treatment was observed by atomic force microscope and Fourier transform infrared spectroscopy techniques.

Hybrid Nanodielectrics for Low‐Voltage Organic Electronics

Nanoscale hybrid dielectrics composed of an ultra‐thin polymeric low‐κ bottom layer and an ultra‐thin high‐κ oxide top layer, with high dielectric strength and capacitances up to 0.25 μFcm−2, compatible with low‐voltage, low‐power, organic electronic circuits are demonstrated. An efficient and reliable fabrication process, with 100% yield achieved on lab‐scale arrays, is demonstrated by means of pulsed laser deposition (PLD) for the fast growth of the oxide layer. With this strategy, high capacitance top gate (TG), n‐type and p‐type organic field effect transistors (OFETs) with high mobility, low leakage currents, and low subthreshold slopes are realized and employed in complementary‐like inverters, exhibiting ideal switching for supply voltages as low as 2 V. Importantly, the hybrid double‐layer allows for a neat decoupling between the need for a high capacitance, guaranteed by the nanoscale thickness of the double layer, and for an optimized semiconductor–dielectric interface, a crucial point in enabling high mobility OFETs, thanks to the low‐κ polymeric dielectric layer in direct contact with the polymer semiconductor. It is shown that such decoupling can be achieved already with a polymer dielectric as thin as 10 nm when the top oxide is deposited by PLD. This paves the way for a very versatile implementation of the proposed approach for the scaling of the operating voltages of TG OFETs with very low level of dielectric leakage currents to the fabrication of low‐voltage organic electronics with drastically reduced power consumption.

Electrical Comparison of ${\rm HfO}_{2}$ and ${\rm ZrO}_{2}$ Gate Dielectrics on GaN

A low-temperature atomic layer deposition technique for high-κ dielectric films on GaN templates was investigated for MOS applications. This improved growth method produced capacitance densities and a field effect mobility approaching 375 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /Vs for ZrO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> and 250 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /Vs for HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> films on GaN. Furthermore, the low density of dielectric-semiconductor interface traps confirmed a reliable cohesion between the high-κ and GaN. The improved gate dielectric deposition technique has the capabilities to improve the overall quality of GaN-based MOSFETs.

Evaluation of Intrinsic Charge Carrier Transport at Insulator-Semiconductor Interfaces Probed by a Non-Contact Microwave-Based Technique

We have successfully designed the geometry of the microwave cavity and the thin metal electrode, achieving resonance of the microwave cavity with the metal-insulator-semiconductor (MIS) device structure. This very simple MIS device operates in the cavity, where charge carriers are injected quantitatively by an applied bias at the insulator-semiconductor interface. The local motion of the charge carriers was clearly probed through the applied external microwave field, also giving the quantitative responses to the injected charge carrier density and charge/discharge characteristics. By means of the present measurement system named field-induced time-resolved microwave conductivity (FI-TRMC), the pentacene thin film in the MIS device allowed the evaluation of the hole and electron mobility at the insulator-semiconductor interface of 6.3 and 0.34 cm2 V−1 s−1, respectively. This is the first report on the direct, intrinsic, non-contact measurement of charge carrier mobility at interfaces that has been fully experimentally verified.

Surface polaritons at the magnetized semiconductor-dielectric interface

Conditions for the existence of a surface polariton at the semiconductor-dielectric interface have been analyzed. With allowance for the gyrotropy and the resonance frequency dispersion of the semiconductor, which manifests itself in an external magnetic field, the dispersion relation, the characteristic frequencies determining the existence region of a surface polariton, the wave fields, and the energy flux distribution in each of the interfacing media have been obtained. A numerical analysis of the influence of the external field and absorption, which lead to the manifestation of nonreciprocal properties of the polariton and to a substantial reconstruction of the spectrum, has been performed.

Quasi-stationary electron and ion processes in dielectric films and diagnostics of films

The principle of quasi-equilibrium in the study of the structures that contain semiconductors and insulators, in particular, dielectric films in the metal-insulator-semiconductor (MIS) structures is discussed. A possibility of the simultaneous measurements of the averaged convection currents in an insulator and the current flows through the semiconductor-insulator interface in the MIS structures is considered. The methods for the measurement of the concentration of mobile ions in a dielectric film are analyzed.

Electrical Properties and Charge Transport in the Pd/Al2O3/InGaAs MOS Structure

The paper presents the results of a study focused on electrical properties and determination of transport mechanism through dielectric layer in Pd/Al2O3/In0.53Ga0.47As/InP MOS system. We found the current to be governed by Fowler-Nordheim tunneling in case of electron injection from the metal electrode for all dielectric thicknesses and of injection from the semiconductor for 10 nm Al2O3 thickness. The potential barrier for electrons at the metal-dielectric interface equals to 2.40±0.10 eV. The conduction band offset at the dielectric-semiconductor interface equals to 2.50±0.06 eV. The optimal value for Al2O3 oxide thickness among the MOS structures under study is proposed to be 10 nm. Increase of the Al2O3 thickness results in increase of fixed positive charge in the dielectric and probably extension of transition layer between the dielectric and semiconductor.

Capacitance-voltage characterization of interfaces between positive valence band offset dielectrics and wide bandgap semiconductors

A photo-assisted capacitance voltage (C-V) characterization technique for interfaces between positive valence band offset dielectrics (Al2O3, SiO2) and wide bandgap semiconductors is presented. It is shown that the valence band barrier for holes at the interface affects the measurement and a method to extract border trap and interface state density values from the measured C-V curves is suggested. Dielectric-semiconductor interface characterization has been well studied for silicon but the characterization techniques are not transferable to wide bandgap semiconductors, such as GaN and SiC, due to the low minority carrier generation rate. Multiple dielectrics deposited by various techniques have been employed in these devices; but in order to ascertain the most suitable dielectric, an effective characterization technique that works well with dielectrics on wide-bandgap semiconductors is required.

Driving Scheme Using MIS Photosensor for Luminance Control of AMOLED Pixel

This paper presents a new driving scheme utilizing an in-pixel metal-insulator-semiconductor (MIS) photosensor for luminance control of active-matrix organic light-emitting diode (AMOLED) pixel. The proposed 3-TFT circuit is controlled by an external driver performing the signal readout, processing, and programming operations according to a luminance adjusting algorithm. To maintain the fabrication simplicity, the embedded MIS photosensor shares the same layer stack with pixel TFTs. Performance characteristics of the MIS structure with a nc-Si:H/a-Si:H bilayer absorber were measured and analyzed to prove the concept. The observed transient dark current is associated with charge trapping at the insulator-semiconductor interface that can be largely eliminated by adjusting the bias voltage during the refresh cycle. Other factors limiting the dynamic range and external quantum efficiency are also determined and verified using a small-signal model of the device. Experimental results demonstrate the feasibility of the MIS photosensor for the discussed driving scheme.

Electronic properties of ZnO nanorod MIS structure

Recently, there has been substantial interest in the study on the electronic properties of hybrid structures. In particular, ZnO nanorods are a good n-type material that can be formed at low temperature using solution deposition techniques complementing the availability of numerous p-type organic semiconductors. Furthermore, there is evidence suggesting that ZnO nanorods can act as efficient electron injectors making them ideally suitable for use in opto-electronic devices such as the light-emitting diodes and transistors. This work examined the electronic properties of ZnO nanorods deposited using spin coating and hydrothermal techniques as an n-type layer and we measured the carrier density and mobility using thermoelectric and Hall measurements. In the context of a hetero-structure device, we used the ZnO nanorods to form metal–insulator-semiconductor (MIS) diodes and measured the capacitance–voltage (C–V) characteristics. Our results suggested that the semiconductor-insulator interface was in depletion at equilibrium and moved away from depletion at both positive and negative (gate) biases. The computed carrier density based on the C–V measurements was essentially the same as what was found in the thermoelectric measurements leading to the argument that charge flow in the MIS structures had been primarily along the long axes of the nanorods. The dynamic C–V characteristics also suggested that there could be substantial (negative) charge states at the insulator-semiconductor interface that readily supplied electrons to the depletion layer.

Characterization of Metal–Insulator–Semiconductor Capacitor with Poly(methyl methacrylate):Titanium Dioxide as Insulator

The electrical characteristics of metal–insulator–semiconductor (MIS) capacitor employing nanocomposite poly(methyl methacrylate):titanium dioxide (PMMA:TiO2) as insulator and zinc oxide (ZnO) as the semiconductor were discussed. The capacitance of the MIS devices was found to be 0.42 and 0.29 nF at frequency of 1 kHz and 1 MHz respectively. Meanwhile, the dielectric loss values are constant (∼60×10-3) in the frequency range from 100 Hz to 100 kHz. Current–voltage (I–V) results for MIS are much higher than MIM is due to there is a trapped holes/electron located at the semiconductor–insulator interface which contributes to high leakage current in the MIS device. We conclude, although interposing the PMMA:TiO2 nanocomposite insulator layer between the semiconductor and Al electrodes degrades the MIS device performance, nevertheless, they remain sufficiently good for use in organic electronic devices.

Electrical stress in CdS thin film transistors using HfO2 gate dielectric

During thin film transistor (TFT) operation, gate dielectric is under a bias stress condition. In this work, bias stress effect for CdS TFT using HfO2 as gate dielectric is analyzed. Threshold voltage, Ion/Ioff ratio, and subthreshold slope were studied in order to understand changes produced at the dielectric semiconductor interface. We observed that threshold voltage shift is related with negative charge trapping in the dielectric/semiconductor interface and for this phenomenon we propose a trapping charge model. Finally, the TFT output characteristic was modeled considering a shift in the threshold voltage for each gate voltage curve.

Charge transport analysis of poly(3-hexylthiophene) by electroreflectance spectroscopy

The charge transport in organic semiconductors is still not completely understood. We use electroreflectance spectroscopy to investigate charge transport in organic field effect devices in order to obtain optical information on the charges within the charge accumulation layer at the organic semiconductor-insulator interface. Here, the reflectance geometry allows an analysis of devices prepared on opaque substrates. The recorded spectra were analyzed based on optical layer stack simulations to extract quantitatively the change of the dielectric function due to the charge injection of the accumulation layer in poly(3-hexylthiophene) (P3HT). For the simulation the anisotropic optical response of spin-coated P3HT layers is experimentally determined by spectroscopic ellipsometry. Using the developed theoretical approach the characteristic change of three different preparations of the organic semiconductor-insulator interface is analyzed. Laterally resolved measurements close to an injecting contact have revealed characteristic spectral changes in dependence of the preparation conditions, and significant spectral changes within the first $90\phantom{\rule{0.28em}{0ex}}\ensuremath{\mu}\mathrm{m}$ from the contact were found, which were attributed to an energetic relaxation of charges during the charge transport process.

Photo stability of solution-processed low-voltage high mobility zinc-tin-oxide/ZrO2 thin-film transistors for transparent display applications

We report solution-processed low-voltage zinc-tin-oxide (ZTO)/zirconium-oxide thin-film transistors (TFTs) possessing a field-effect mobility of ∼10 cm2/Vs, a threshold voltage of 0.1 V, and an on-off current ratio of ∼1 × 109. These TFTs exhibit very small hysteresis windows in both dark and illuminated conditions. We also investigate the photo stability combined with prolong negative bias in these devices. Large threshold voltage shifts and sub-threshold swing degradation typically observed in ZTO TFTs are not present in our devices. We believe that these device characteristics, which stem from the electronically clean semiconductor-dielectric interface, satisfy the requirement for high quality and low power-consuming transparent displays.