Savings In Power Consumption Research Articles

Investigation on battery thermal management system combining phase changed material and liquid cooling considering non-uniform heat generation of battery

In order to keep the working temperature of lithium-ion battery in desired range under harsh conditions, a novel coupled thermal management with phase changed material (PCM) and liquid pipe was proposed and numerically investigated for prismatic LiFePO4 battery pack. The verified non-uniform heat generation model of the battery was employed to simulate the real temperature distribution on battery surface. The effects of coolant velocity, pipe position and ambient temperature on cooling performance of coupled system were analyzed. Cycle test under harsh conditions was conducted to evaluate the thermal performance of the system. Simulation results showed that the coupled system exhibited good cooling performance even at ambient temperature of 45 °C, which suppressed the maximum temperature and temperature difference of battery pack to 47.6 °C and 4.5 °C, respectively. In addition, the system removed the heat stored in PCM and improved the liquid fraction of PCM effectively, especially in the area close to the electrode tabs. In cycles, properly reducing the coolant velocity during charge was feasible in saving power consumption of liquid cooling while keeping the cooling capacity. These results might be helpful for the application of PCM and liquid cooling in battery thermal management system for better cooling performance and lower power consumption under harsh conditions.

On the issue of increasing operational energy efficiency of eight-axle passenger DC electric locomotives

Mass of a passenger train and, accordingly, number of cars in its composition is selected based on the amount of passenger traffic on the section, determined by the seasonal demand for transportation in each direction. In one direction of the section serviced by an electric locomotive, the mass of a passenger train may differ several times from the opposite direction, which depends on the destination station of the train and the period of its circulation. At present, in addition to 6-axle electric locomotives of the ChS2T and EP2K series, more powerful 8-axle electric locomotives of the ChS7 series operate in the same schedule for traction of passenger trains on railway sections electrified with direct current with a voltage of 3 kV catenary. All three series of the considered electric locomotives are designed for a maximum operating speed of up to 160 km/h. In this regard, there is a situation with the underutilization of the maximum speed and excess power of the ChS7 electric ocomotives, especially when operating with passenger trains of medium and low weight and a limited speed of 120 km/h. The comparative data on the specific power consumption of the EP2K 6-axle electric locomotives and the ChS7 8-axle electric locomotives operating in the same schedule, presented in the article, indicate the need to find additional reserves for saving the specific power consumption when servicing passenger trains of medium and low weight with ChS7 electric locomotives. The electric locomotive power system includes traction and auxiliary electric machines. The article discusses ways to turn off part of traction motors, which can be carried out with a standard electric locomotive circuit. However, when one section of the electric locomotive is turned off, the power of the four traction motors remaining in operation is not always sufficient to drive a passenger train according to the schedule. Therefore, a variant of improving the power circuit of an electric locomotive in the process of carrying out its overhaul is proposed. This option represents the modernization of the power circuit of the ChS7 electric locomotive when operating on a series-parallel connection with a pair of traction motors disconnected. As a result, the power circuit of the 8-axle electric locomotive operates similarly to the circuit of 6-axle DC electric locomotives with a collector traction drive. The expected savings in specific power consumption can reach 15% in comparison with the operation of an 8-axle electric locomotive ChS7 in normal mode. Switching off one section of the electric locomotive and further running the train on four traction electric motors will reduce the specific power consumption by up to 25%.

Novel design and performance analysis of WSN node using NRF and ATmega328

Designing an efficient wireless sensing network (WSN) node over a remote location is a challenging task in the heterogeneous environment. The two implementation challenges are – first, large distance with comparatively signal coverage and second, power consumption for devices. It is observed that the use of energy harnessing techniques by the research communityhas proven successfully redemption in power consumption for circuits involving antenna, microcontroller and sensor. In present work, a novel schematic design of a low power wireless sensing node has been discussed which is used for connecting different sensors such as moisture and temperature sensor. The design considered the wireless sensor node with a power module, a NRF, an Atmega-328 microcontroller and a GSM module to upload data over the cloud. NRF facilitates long-range communication up to a range of 1000m by using a maximum current consumption of 15mA. The wireless sensor node are key elements in implementing Internet of Things. The performance in terms of power consumption is analyzed for long range communication. Experiment has been designed to transmit with an interval of 15 sec and interval of 60 sec. At the receiver end, the central node GSM sim800A module is used to upload data over the cloud platform Thingspeak. In comparative study with different microcontroller development boards & wireless methods it has been found that the designed WSN node is effective in saving power consumption. The node can act as master or slave and can communicate with several other nodes also.

Investigations on the soot combustion performance enhancement of an improved catalytic gasoline particulate filter regeneration system under different electric heating powers

The high pollutant emissions during the cold start of gasoline engines have aggravated the greenhouse effect and environmental pollution problems. In order to better control the pollutant emissions during cold start and save power consumption, an improved catalytic gasoline engine particulate filter regeneration system (C-GPFs) with electric heating is proposed, and its combustion performance is studied. In this work, firstly, the soot oxidation rate is introduced as an evaluation index of the combustion performance, and the suitable electric heating power is defined. Secondly, the combustion performances of traditional and improved electric heating C-GPFs are compared and analyzed. The results show that when the electric heating power is the same, the length and volume of the improved C-GPFs are smaller, and the soot oxidation rate is higher. Then, the effects of critical filter structure parameters on the combustion performance and electric energy consumption of the improved electric heating C-GPFs is studied by numerical simulation. The results show that when the filter cell density increases from 250 cpsi to 400 cpsi, the filter wall thickness decreases from 0.45 mm to 0.35 mm, the α ratio decreases from 3:2 to 2:3, and the filter diameter increases from 90 mm to 110 mm, the electric energy consumption when reaching the suitable electric heating power is reduced by 17%, 13.2%, 30.4%, and 21%, respectively. Finally, this work provides a reference value for improving the pollutant emission control effect and saving power consumption during the cold start of the gasoline engines.

The Light and the Heat: Productivity Co-Benefits of Energy-Saving Technology

We study the adoption of energy-efficient LED lighting in garment factories around Bangalore, India. Combining daily production line–level data with weather data, we estimate a negative, nonlinear productivity-temperature gradient. We find that LED lighting raises productivity on hot days. Using the firm's costs data, we estimate that the payback period for LED adoption is less than one-third the length after accounting for productivity co-benefits. The average factory in our data gains about $2,880 in power consumption savings and about $7,500 in productivity gains.

Thermal Efficiency Enhancement of an R-32 Air Conditioner and the Ultrasonic Wave Technique

This work presents a technique to improve the thermal performance of an R-32 air conditioner by using ultrasonic waves. Two 1-TR air conditioners — one with and one without 40[Formula: see text]kHz/50[Formula: see text]W ultrasonic generators — were tested under controlled conditions in a 3.6[Formula: see text]m [Formula: see text][Formula: see text]m [Formula: see text][Formula: see text]m room. The air temperature and humidity conditions entering the condenser and evaporator coils were controlled under 12 conditions to mimic the climate of Thailand. The testing results indicated that the average energy efficiency ratio (EER) of the modified ultrasonic R-32 air conditioner unit was 3.685[Formula: see text]kWth/kWe and the normal R-32 unit without the ultrasonic generators was 3.375[Formula: see text]kWth/kWe. The testing conditions also indicated that the cooling efficiency of the modified system could be increased by approximately 7.69%. Moreover, the convective heat transfer coefficient of the modified ultrasonic R-32 unit was approximately 17.36% higher than that of the normal R-32 unit without the ultrasonic generators because the ultrasonic waves could increase the turbulence in the refrigerant flow and decrease the condensed water at the fan coil unit. In terms of economic results, the payback period of the modified unit based on the climate of Thailand ranged from 0.8–1.2 y, leading to a savings in power consumption of approximately 400–620[Formula: see text]kWh/y.

Faithfully Truncated Adder-Based Area-Power Efficient FIR Design with Predefined Output Accuracy

To solve the area and power problems in Finite Impulse Response (FIR) implementations, a faithfully truncated adder-based FIR design is presented in this paper for significant area and power savings while the predefined output accuracy can still be obtained. As a solution to the accuracy loss caused by truncated adders, a static error analysis on the utilization of truncated adders in FIRs was performed. According to the mathematical analysis, we show that, with a given accuracy constraint, the optimal truncated adder configuration for an area-power efficient FIR design can be effortlessly determined. Evaluation results on various FIR implementations by using the proposed faithfully truncated adder designs showed that up to 35.4% and 27.9% savings in area and power consumption can be achieved with less than 1 ulp accuracy loss for uniformly distributed random inputs. Moreover, as a case study for normally distributed signals, a fixed 6-tap FIR is implemented for electrocardiogram (ECG) signal filtering was implemented, in which even with the increased truncated bits up to 10, the mean absolute error (Ē) can be guaranteed to be less than 1 ulp while up to 29.7% and 25.3% savings in area and power can be obtained.

SmartVLC: Co-Designing Smart Lighting and Communication for Visible Light Networks

Visible Light Communication (VLC) based on LEDs has been a hot topic investigated for over a decade. However, most of the research efforts assume the intensity of LED light is constant. This hypothesis is not true when Smart Lighting is introduced to VLC, which requires LEDs to adapt their brightness based on the intensity of natural ambient light. Smart lighting saves power consumption and improves user comfort. However, intensity adaptation severely affects the throughput performance of data communication. In this paper, we propose SmartVLC , a system that can maximize the throughput (benefit communication) while still maintaining the LEDs’ illumination function (benefit smart lighting). A novel Adaptive Multiple Pulse Position Modulation (AMPPM) scheme is proposed to support fine-grained dimming levels to avoid flickering while maximizing the throughput under each dimming level. SmartVLC is implemented on off-the-shelf commodity hardware. Several real-life challenges in both hardware and software are addressed to make it a robust real-time system. Comprehensive experiments are carried out to evaluate the system performance under multifaceted scenarios. Experimental results demonstrate that SmartVLC supports a communication distance up to 3.6m, and improves the throughput achieved with two state-of-the-art approaches by 40 and 12 percent on average, respectively, without bringing any flickering to users.

A 112 Gb/s PAM-4 RX Front-End With Unclocked Decision Feedback Equalizer

The implementation of an unclocked DFE (UC-DFE) architecture for high-speed PAM-4 signals is investigated in this brief. Instead of clocked slicers and flip-flops, data-decision and feedback delay control are performed by saturated analog delay chains. As a result, the UC-DFE, previously exploited for NRZ signals, saves power consumption and silicon area while the simple implementation allows operation at high data-rate. A receiver front-end comprising a linear equalizer and the proposed 2-tap UC-DFE scheme is designed in 7 nm FinFET technology. From post-layout simulations, the receiver recovers a PAM-4 signal at 112 Gb/s after an 18 dB loss channel with a power efficiency of 0.47 pJ/bit. The receiver also works with NRZ signals at half the bit-rate equalizing 24 dB channel loss with a power efficiency of 0.70 pJ/bit.

EFFICIENCY OF DRYING AND CALCINING OF WELDING ELECTRODES IN FURNACES USING RADIATION FROM NANOSTRUCTURED FUNCTIONAL CERAMICS (NFC)

This article presents the results of research on the influence of various methods of drying and calcining welding electrodes coated with acid-rutile type standard technology in electric furnaces and in furnaces using nanostructured functional ceramics (NFC) radiation on the welding and technological properties of welding electrodes. According to the results of research, the improvement of welding and technological properties during the drying and calcining of welding electrodes in a furnace using radiation with NFC was revealed. Calcination of welding electrodes using NFC radiation allows to obtain high-quality welding and technological properties of coatings without the use of natural drying after coating the welding wire. This makes it possible to perform heat treatment of welding electrodes with great savings in power consumption and reduced calcination time compared to standard technology.

Energy recovery system in small reverse osmosis desalination plant: Experimental and theoretical investigations

The shortage of potable water, especially in developing countries has attracted researchers to try and overcome this problem. Desalination is one of the most effective methods used to solve this problem. Among desalination techniques, Reverse Osmosis (RO) has higher priority than thermal desalination methods, on account of its comparatively limited energy consumption. Different methods were introduced to enhance the performance of RO desalination plants. This study focused on employing an Energy Recovery System (ERS) to enhance the performance of the small RO plant for remote areas. The unit capacity was 2.4 m3/day, occupied with two double-acting cylinders with their control elements working as an ERS. An experimental setup is used to verify the effectiveness of the proposed ERS. A simulation model is designed and implemented to enable changing system parameters of the plant. The different system pressure experimental and model results were exposed and compared. The obtained results showed good agreement between experimental and simulation model values. The effect of recovery ratio on the power saving is highlighted. The ERS saved power consumption by 80%. The cost analysis of the small RO desalination plant with and without ERS was evaluated and showed a significant reduction in total cost.

Voltage‐mode PAM4 driver with differential ternary R‐2R DAC architecture

A voltage-mode pulse-amplitude modulation 4 (PAM4) driver with differential ternary R-2R DAC architecture is described. The differential ternary R-2R DAC provides three voltage levels with one R-2R branch, whereas the conventional one provides only two. Therefore, much less R-2R branches are required for a given number of output voltage levels. One of the three voltage levels is realised by simply short circuiting a differential input pair, saving power consumption. Implemented in 65 nm CMOS technology, the voltage-mode PAM4 driver occupies 0.073 mm2 active silicon area and consumes 1.97 mW/Gbit/s from 1.0 V supply at 10 Gbit/s.

Analysis of electricity energy savings with Grid-Tie system connected to utility grid

The microgrid consists of at least one energy source that is connected to a load in a relatively small area. In practice, microgrid are divided into two types, off-grid systems or often said to be standalone systems and on-grid systems that are connected to utility networks. The use of renewable energy sources, such as photovoltaic, has become an alternative energy for the problem of electricity energy deficits. This research examines the possibility of saving power consumption from the network using a grid-tie inverter (GTI) power converter in a microgrid configuration so synchronization can be made between renewable energy systems and utility networks. The integration of photovoltaic energy resources with the grid system will increase the value of electricity capacity while reducing the use of fossil fuels, as well as a positive impact where the use of renewable energy can reduce energy use and bills to be paid. Integration of grid tie testing carried out without a load can convert the power generated by almost 90% distributed in the utility network, while testing with a load using a grid tie system, can save power up to 70% of the energy supplied by the utility network.

Fuzzy-Based Thermal Management Scheme for 3D Chip Multicores with Stacked Caches

By using through-silicon-vias (TSV), three dimension integration technology can stack large memory on the top of cores as a last-level on-chip cache (LLC) to reduce off-chip memory access and enhance system performance. However, the integration of more on-chip caches increases chip power density, which might lead to temperature-related issues in power consumption, reliability, cooling cost, and performance. An effective thermal management scheme is required to ensure the performance and reliability of the system. In this study, a fuzzy-based thermal management scheme (FBTM) is proposed that simultaneously considers cores and stacked caches. The proposed method combines a dynamic cache reconfiguration scheme with a fuzzy-based control policy in a temperature-aware manner. The dynamic cache reconfiguration scheme determines the size of the cache for the processor core according to the application that reaches a substantial amount of power consumption savings. The fuzzy-based control policy is used to change the frequency level of the processor core based on dynamic cache reconfiguration, a process which can further improve the system performance. Experiments show that, compared with other thermal management schemes, the proposed FBTM can achieve, on average, 3 degrees of reduction in temperature and a 41% reduction of leakage energy.

MMSE One-Bit Precoding for MU-MIMO Systems With Enhanced Receive Processing

One-bit precoding is a recently proposed scheme that enables significant savings in hardware cost and power consumption for massive multiuser multiple-input–multiple-output systems. In this letter, a new minimum mean-square-error (MMSE) precoder is presented for both single- and multiple-antenna mobile stations with enhanced receive processing (ERP) capability. By exploiting the structure embedded in the formulated nonconvex optimization problem, a new algorithm is developed on the basis of a combination of the alternating minimization method and mathematical programming with equilibrium constraints. An approximate maximum likelihood detector is also proposed to collaborate with the MMSE-ERP precoder. Simulation results verify that our MMSE-ERP precoder can exploit the additional degrees of freedom in the general system model considered, resulting in significant performance gain compared with existing one-bit precoders.

Effect of AMB winding configurations on static and dynamic performances and power consumptions of the AMB-rotor system

Active magnetic bearings (AMBs) bring extraordinary benefits such as free of contact, elimination of lubrication, active control of rotor position, and a built-in monitoring system. In the design of AMBs, the bearing structure is of significance since it has an important impact on bearing performances. However, the effect of winding configurations of AMBs is still obscure. In this paper, the system-level implications of two radial AMB winding configurations termed the Ortho and the Cross types are investigated, including the bearing characteristics, power consumptions and rotor dynamic behaviors. The simulation results demonstrate that the Cross type contributes to larger load capacity in the direction of gravity. In condition of a heavier gravity load (−200 N), the Cross-type winding configuration saves power consumption with a percentage of 17.2% at steady state (20,000 rpm) and 12.7% considering unbalance mass during the run-up process. However, the rotor vibrations of the Cross type in case of external loads and unbalance mass are larger than the Ortho type. The proposed results of this paper provide some useful information for the AMB winding configuration design.

On-Chip CMOS Self-Decoupling Battery Cell System for Security Protection

This article presents an effective on-chip power analysis attack countermeasure based on a new CMOS self-decoupling battery cell system that uses a self-decoupling circuit. The self-decoupling circuit dynamically controls an on-chip virtual power supply point, $V_{\mathrm {ddv}}$ , that can be used to power security-sensitive modules. The circuit automatically decouples an on-chip CMOS battery cell from powering a sensitive module when its voltage level reaches a designed minimum threshold level $V_{\mathrm {dd-min}}$ and connects it for a very short charging cycle to the chip’s main voltage supply, $V_{\mathrm {dd}}$ . The charging cycles for the experiments presented in this article are less than 10 ns and are designed to support the CMOS battery cell size and the minimum designed threshold voltage level $V_{\mathrm {dd-min}}$ . Simulation results of test designs implemented in the 45-nm CMOS technology process show that the proposed countermeasure is efficient when used with battery cell sizes that can power the protected cryptographic module for more than ten data operation cycles before recharging. In addition, using the on-chip self-decoupling battery cell system allows for power consumption savings within the protected module of up to 43 % due to the dynamic voltage scaling generated at the virtual power supply point.

Prolonging smart grid network lifetime through optimising number of sensor nodes and packet length

In the era of internet-of-things (IoT), many applications utilise wireless sensor networks (WSNs) including smart grids (SGs). Designing WSNs to fulfill the SGs requirements imposes some challenges such as limited power and signal propagation impairments, especially, in harsh environments. Consequently, saving power consumption in WSNs-based SGs is among the most significant challenges. The total power required at a certain sensor depends on two main parameters: the packet length and inter-node distance. This paper investigates the optimal packet length and inter-node distance to be utilised in a SG over six different environments aiming at maximising the network lifetime. The investigation is based on a link-layer model using Tmote Sky nodes taking into consideration the six environments impact. A mixed-integer programming (MIP) model is utilised to determine the best packet length and number of nodes for maximising the network lifetime. This model analyses the performance of maximum SG network lifetime over those environments and addresses the inter-node distance effect on the network lifetime maximisation. Simulation results show that decreasing the number of nodes covering a certain area is preferable to prolonging the network lifetime. Furthermore, for the considered models, the longer the packet length is, the longer the network lifetime will be.

A 15ps resolution time-to-digital converter with on-chip PLL counting for LiDAR multi-object sensors

Light detection and ranging (LiDAR), as a kind of depth image processing technology, has a wide range of applications in precise range and range rate equipment (PRARE) and two-dimensional/three-dimensional imaging systems. This paper presents a high resolution time-to-digital converter (TDC) for LiDAR sensors. The count clock provided by the on-chip phase-locked loop (PLL) guarantees high resolution and reliable PVT (process, voltage and temperature) tolerance of the TDC. In particular, a novel structure of a pulse-injection ring oscillator shared by TDC and PLL is proposed to avoid frequency offsets and clock jitter caused by the use of multiple ring oscillators while saving power consumption. To satisfy the LiDAR for adjacent multi-object sensing, a fast digital shift register array is introduced. Other key circuits considered to reduce the non-linearity and bit error of TDC are described in detail. The prototype chip is fabricated in a standard 65 nm CMOS process with an area of 0.056 mm2. Using a 1.2 V supply, the TDC achieves an average power consumption of 3.36 mW. The performance of the TDC has been measured. The maximum differential nonlinearity (DNL) is 13.4ps and the maximum integral non-linearity (INL) is 32.1ps with the help of INL LUT calibration, respectively.

Driver Drowsiness Detection System for Vehicle Safety

Detection of drowsiness of driver is a vehicle safety technology, which helps to put off accidents which caused by the driver being dozy. A variety of studies have recommended that around 20% of all road accidents are due to drowsiness of the driver. The developments of technologies for detecting or preventing drowsiness while driving is a major confront in accident evasion systems. Because of the peril of the tiredness while driving, different new methods need to be developed for counteracting the effect. The paper is based on a example for detection of drowsiness system. The intend of this paper is design of an automated system for safety of driver from improper driving. The system is designed such that it will precisely scrutinize the eye blink. In this paper, the eye blink of the driver is detected by using eye blink sensor which is IR based. The disparity across the eye will vary as per eye blink.The output is high, if the eye is closed or else output is low. It indicates closing or opening position of an eye. TheIR outputis given to circuit to signify the alarm. The controller will send a warning signal so that it is displayed on liquid crystal display screen. The buzzer, which is placed near the driver, will be activated and alters the driver when he falls asleep during driving. The alcohol sensor is also used to detect whether the driver is drunken which avoids accident caused by the drunken drivers. According to the intensity of light, the lights will be ON or OFF inside the vehicle, this saves power consumption. Tilt sensor is also used to detect whether the vehicle met with an accident or not.