RF Output Research Articles

Microwave wireless power transfer system using a dual-dielectric resonator oscillator

Non-radiating wireless power transfer (WPT) systems have found extensive applications in science and technology. This paper reports the design, simulation, and implementation of a compact single-port (DC to RF) WPT system composed of two coupled dielectric resonators (DR). The DR on the transmitter side, in combination with a transistor amplifier and a series feedback circuit, forms a dielectric resonator oscillator for microwave power generation. The DR on the receiver side is coupled to the transmitter DR such that the circuit can be considered as a dual-dielectric resonator oscillator or DDRO. The DDRO is designed for optimum power transfer to the output port. The measured RF output power of the proposed WPT system at 7.5 GHz for a 10 mm spacing between the transmitting and receiving DR is measured to be 13.07dBm at a DC voltage of 3.3 V and a supply current of 32.3 mA, which shows a good agreement with our proposed method of analysis. The available bandwidth at the operating frequency of 7.5 GHz is measured to be 150 MHz which provide a relatively wide bandwidth for simultaneous data transmission.

A 52-to-57 GHz CMOS Phase-Tunable Quadrature VCO Based on a Body Bias Control Technique

This paper presents a 52-to-57 GHz CMOS quadrature voltage-controlled oscillator (QVCO) with a novel I/Q phase tuning technique based on a body bias control method. The QVCO employs an in-phase injection-coupling (IPIC) network comprising four diode-connected FETs for the quadrature phase generation. The I/Q phase error is calibrated by controlling the body bias voltage offset of the QVCO’s four core FETs. This technique effectively covers a wide range of I/Q phase error between −13.4° and +10.7°. It also minimally induces the unwanted variations in the phase noise, current dissipation, and oscillation frequency, which were found to be only 0.4 dB, 0.07%, and 36 MHz, respectively. After the IPIC-QVCO, a phase-tunable two-stage LO buffer employing a 3-bit switched-capacitor bank was added for additional phase tuning, leading to the extension of the phase tuning range up to −22.7–+20.0°. The proposed QVCO is implemented in a 40 nm RF CMOS process. The measured results show that the QVCO covers a frequency band from 52.4 to 57.6 GHz while consuming 26.2 mW. The phase noise and the figure-of-merit of the QVCO are −91.8 dBc/Hz at 1 MHz offset and −172.4 dBc/Hz, respectively. We also realized a fully integrated 55 GHz quadrature RF transmitter employing the phase-tunable QVCO and LO generator. The effectiveness of the proposed phase-tunable LO generator was confirmed by verifying the image rejection ratio (IRR) calibration at the RF output.

Design of high-efficiency circularly polarized wideband energy harvesting rectenna using characteristic mode analysis

This paper presents a compact wideband rectifier system for wireless energy harvesting. The presented rectifier system is completed in two stages. In the first stage, a crescent-shaped wideband circularly polarized antenna (CPA) is designed to receive and transmit RF signals using characteristic mode analysis (CMA). And the CPA consists of a monopole antenna at the top and a slot antenna at the bottom, which control the higher and lower operating bands, respectively. In the second stage, a wideband rectifier is designed using a HSMS-2860 Schottky diode and a three-stage matching network. The HSMS-2860 Schottky diodes improve rectification efficiency at medium-power density, and the three-stage matching network effectively increase the operating bandwidth, filter out the output RF signal, and cancel out and stabilizes the impedance. To validate the proposed rectifier system, a crescent-shaped CP receiving antenna and a rectifier operating in C-band are fabricated, and the rectification performance is measured. The measurement results indicate that the proposed rectifier system harvests RF signals on the broadside and backside of the CPA over a wide input power range (8–13 dBm input power).

A Low-Phase-Noise 8 GHz Linear-Band Sub-Millimeter-Wave Phase-Locked Loop in 22 nm FD-SOI CMOS.

Low-phase noise and wideband phased-locked loops (PLLs) are crucial for high-data rate communication and imaging systems. Sub-millimeter-wave (sub-mm-wave) PLLs typically exhibit poor performance in terms of noise and bandwidth due to higher device parasitic capacitances, among other reasons. In this regard, a low-phase-noise, wideband, integer-N, type-II phase-locked loop was implemented in the 22 nm FD-SOI CMOS process. The proposed wideband linear differential tuning I/Q voltage-controlled oscillator (VCO) achieves an overall frequency range of 157.5-167.5 GHz with 8 GHz linear tuning and a phase noise of -113 dBc/Hz @ 100 KHz. Moreover, the fabricated PLL produces a phase noise less than -103 dBc/Hz @ 1 KHz and -128 dBc/Hz @ 100 KHz, corresponding to the lowest phase noise generated by a sub-millimeter-wave PLL to date. The measured RF output saturated power and DC power consumption of the PLL are 2 dBm and 120.75 mW, respectively, whereas the fabricated chip comprising a power amplifier and an integrated antenna occupies an area of 1.25 × 0.9 mm2.

Thales alenia space 6 th generation digital transparent processor (DTP6G) - a multi-mission, multi-mode versatile product at the heart of telecom solutions

Flexibility and in-flight reconfigurability offered by digital processing have become key features in today's telecom satellite payloads. In recent years, Thales Alenia Space has developed several generations of on-board digital transparent processors (DTP) by introducing the most advanced and disruptive technologies. Thales Alenia Space DTPs are state-of-the-art sub-systems at the heart of payloads using analogue-to-digital (ADC) and digital-to-analogue (DAC) channelizers on their input and output RF accesses and making extensive use of digital processing to support channel routing with fine bandwidth granularity. After several payloads based on 5th generation processors, Space Inspire (INstant SPace In-orbit REconfiguration)) solution uses a 6th generation processors offering another step in flexibility through Digital Beam Forming (DBFN). This latest processor generation leverages DTP3G and 5G assets as well as in-flight heritage and provides many more features. Developped with support of CNES & DGA (French DoD), DTP6G covers Civil but also MilsatCom/GovSatCom missions thanks to high performances and small routing granularity. Its main current usecases are GEO but it is compatible with LEO to MEO orbits. Although DBFN is a key addition of DTP6G, it can still be operated with fixed-beam antennas or with an analog BFN. Another new feature is the embedded High Speed Command/Control link (HiLink) providing high TMTC throughput over several waveforms (Full CCSDS or CCSDS over DVBS2). Internal encryption is proposed (AES) but access to an external encryption unit (NSA-type) is also possible. This C&C link combined with a high-performance/large-storage-capacity processing board ensures fast operability and a high-level of observability. DTP6G processor is also ready for future implementations of a Regenerative companion, Beamhopping and Multi-user scenarios. The paper will present Thales Alenia Space transparent processor roadmap leading to DTP6G, its mission coverage, main features and a status of development & production.

Multi‐band glass‐integrated bandpass filters for new radio (NR) communications

AbstractA class of multi‐band bandpass filters (BPFs) based on glass‐integrated multi‐resonant cells (MRCs) are reported. Each MRC comprises multiple in‐parallel connected series‐type resonators that create passbands in‐between transmission zeros (TZs)—located at the resonators’ resonance. The MRCs can be combined in multi‐stage configurations to create high‐order multi‐band transfer functions or used in the RF input and output ports of a conventional transversal multi‐band BPF to enhance its selectivity by adding poles and TZs without increasing its size. A compact integration concept using high‐Q 3D integrated‐passive devices (IPDs) is used for the realization of sub‐6‐GHz multi‐band BPFs. For practical validation purposes: (1) a tri‐band BPF with passbands centred at 1.58, 2.07, 2.83 Hz and fractional bandwidths (FBWs): 10.9, 9.06, 10% respectively and in‐band insertion loss (IL) between 2 and 2.8 dB and (2) a dual‐band BPF with passbands centred at 2 and 2.9 GHz with FBW 14.9% and 16.14% we manufactured and tested.

On‐chip GaAs‐based dual‐band bandpass filters/isolators (DBPFIs)

AbstractMMIC co‐designed RF components exhibiting the collocated RF signal processing actions of a dual‐band bandpass filter and an RF isolator (DBPFI) are presented. They are based on in‐parallel cascaded bandpass filters/isolators that operate at two different frequencies and two multi‐resonant cells that are added in the RF input and RF output to increase the selectivity and the out‐of‐band isolation of the DBPFI through six added transmission zeros. For proof‐of‐concept demonstration purposes, a DBPFI prototype was designed and manufactured using a commercially available GaAs MMIC process. It exhibited the following RF‐measured characteristics: center frequencies: 8.14 GHz and 10.8 GHz, 3‐dB fractional bandwidth (FBW): 11.1% and 16.4%, |S21|: −3.7 dB and −8.8 dB, isolation >36.6 dB and 16.5 dB, IP1dB: 11.8 dBm and 12.8 dBm, IIP3: 18.2 dBm and 16.5 dBm, and OIP3: 14.2 dBm and 6.7 dBm, respectively, at the lower and the upper band.

A Compact Repetitive Marx Generator for Generating Intense Electron Beams for HPM Sources

A 500 kV, 80 Hz repetition rate compact Marx generator has been designed and developed for producing high intense relativistic electron beams for high-power microwave (HPM) sources. This Marx generator comprises eight bipolar stages (16 stages of unipolar) using energy storage capacitors for achieving improved performance in repetition mode operation. The maximum charging voltage per stage is 50 kV, producing an erected voltage of 800 kV. However, the load voltage will vary according to the impedance of the load connected across the generator. Custom-designed energy storage capacitors were developed to allow voltage reversal of up to 30%–50%, enabling the system to deliver a higher current. A small pulse transformer-based triggering unit with an output voltage of 30 kV was used for triggering the generator. The system’s performance was tested in pulse repetition frequency (PRF) mode with resistive and diode loads and achieved a repetition rate of 80 Hz. An energy density of ~460 J/m3 was achieved in the developed system. A vircator device was connected and tested to benchmark the Marx generator for its repetitive and burst mode operations. The test results show the measured RF output power of 100 MW.

Design, Analysis, and Simulation of a Three-Stage Stagger-Tuned, Clustered-Buncher Cavity Gyroklystron Amplifier

A self-consistent, nonlinear analysis of the three-stage clustered-cavity gyroklystron amplifier has been developed. The investigation has been applied to the previously reported 32.3-GHz, second harmonic, three-cavity conventional gyroklystron amplifier operating at the TE02 mode for its performance enhancement in terms of bandwidth. Using the clustered-cavity analysis, a peak RF output of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\sim $ </tex-math></inline-formula> 310 kW, electronic efficiency <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\sim $ </tex-math></inline-formula> 23%, and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\sim $ </tex-math></inline-formula> 27-dB gain have been obtained at desired 32.3-GHz frequency. The clustered-cavity device bandwidth has been obtained as <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\sim $ </tex-math></inline-formula> 59.5 MHz, which is significantly much higher than the conventional-cavity case, i.e., <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\sim $ </tex-math></inline-formula> 36 MHz. It is observed from the analytical results that the clustered-cavity approach widens the bandwidth with a slight increase in the device gain and efficiency. Furthermore, the effect of stagger-tuning in the clustered cavities on the device performance has also been explained in detail. The results confirmed that the increase in the stagger-tuning parameter to 0.5 further increases the device bandwidth to 103 MHz but with a considerable decrease in the gain parameter. Hence, there should be a tradeoff between the gain and bandwidth in terms of the stagger-tuning parameter. The analytical results obtained are verified further by carrying out the particle in cell (PIC) simulation of the designed gyroklystron amplifier using the 3-D PIC simulation tool CST Particle Studio for different values of stagger-tuning parameters. The simulated results obtained agree with the analytical results within 10%.

166% frequency tuning range power VCO using high-quality off-chip inductor

This work presents a complementary PMOS NMOS voltage-controlled power oscillator (VCO) based on a high quality (Q) factor off-chip inductor in 130 nm CMOS process. The proposed VCO achieves a frequency tuning range of 166% from 393 MHz to 4.17 GHz and this wide tuning range is divided into six bands where each band is also sub-divided into three bands using a single switching voltage. The proposed design takes into consideration the effect of the bond wire that is used to connect the off-chip inductor with the VCO core moreover, the measured SNP files of the off-chip inductors are utilized to ensure accurate results. This technique improves the figure of merit (FoM) by 4–25 dB compared to the conventional inductor VCO. Using six different values of the off-chip inductors, the proposed VCO works in six bands with a tuning range of 166%, and a minimum phase noise of − 127 dBc/Hz @ 1 MHz offset frequency 2.2 GHz carrier. Furthermore, the proposed VCO draws 1.37 mA from 1.1 V supply voltage and has a minimum achieved Figure-of-Merit (FOM) equal to -193 dBc/Hz with a maximum output power of 4.25 dBm. The VCO core area equals 0.07 {mathrm{mm}}^{2}, while the total chip area including RF pads and output buffers is {0.437mathrm{ mm}}^{2}.

Bias Current Modulation of DC and RF Properties of AlmGa1‐m∼GaN Heterojunction IMPATT at Sub‐Millimeter Wave Frequency

AbstractLarge signal RF properties of double drift region (DDR) Impact Avalanche Transit Time (IMPATT) device based on AlmGa1‐m∼GaN heterojunction (HT) are investigated and their variation with bias currents has been presented here. These RF properties and their modulation will significantly validate the acceptability of the particular HT in the sub‐millimeter wave frequency domain. Avalanche noise plays the prime ground for making the IMPATT diode basically noisy and tunneling decays the performance of the device, as we move towards the higher frequency range like the sub‐millimeter frequency. These setbacks can be done with if the homojunction (HM) is replaced by heterojunction. This authenticates the choice of heterojunction over homojunction. Here, the author takes 500 GHz as the frequency of concern in the sub‐millimeter wave range. Here, two complementary heterojunctions of AlmGa1‐m∼GaN is taken with m = 0.4 or the mole fraction of Al in the alloy being 40% and their RF results are compared with two homojunctions of GaN and AlGaN for double drift region (DDR) IMPATT diode. Outcomes indicate that HT diodes surpass the high‐frequency performance of HM diodes if compared on the basis of dc to RF conversion efficiency and output power due to the influence of large amplitude ac signal. It is also observed that with increasing bias voltage dependent current, which is varied from 20 × 108to 40 × 108Am−2, the efficiency of conversion together with the power output increases. These results will be very important for further research in this domain.

Design of High-Speed UTC-PD With Optimization of Its Electron Transit Performance and Parasitic Capacitance

An 1500 nm thick collector layer is adopted in the uni-travelling-carrier photodiode (UTC-PD) to reduce the PD's capacitance, while the PD's diameter is set to be 20 μm for better saturation performance and optical coupling characteristic of a signal from a single mode fiber. By optimizing biasing voltage and input light intensity, the electric field intensity in the collector layer would be controlled to make the photo-generated electron in the UTC-PD transiting at around its peak drift velocity in the collector layer and at the same time to make the UTC-PD obtaining it minimum capacitance. Together with the optimization of the doping distribution in UTC-PD's cliff layer and its collector layer, the UTC-PD's high-speed performance and saturation performance can be further improved. An optimized 20 μm diameter UTC-PD with a simulated 106 GHz 3 dB bandwidth and 21.02 dBm output RF power at 25 GHz is designed. It proposes a discussion to realize high speed, high saturation performance UTC-PD together with high coupling efficiency from a single mode optical fiber by bringing the electric field determined drift velocity performance of its uni-traveling- carrier, the electron, into full play.

Simulation and design of a high-speed and high-power modified uni-traveling carrier photodiode based on the electric field distribution in the depletion region.

A modified uni-traveling carrier photodiode with an electric field control layer is proposed to achieve high-speed and high-power performance at a lower bias voltage. By inserting the 10nm p-type InGaAs electric field control layer between the intrinsic absorption layer and space layer, the electric field distribution in the depleted absorption layer and depleted non-absorption layer can be changed. It is beneficial for reducing power consumption and heat generation, meanwhile suppressing the space-charge effect. Compared with the original structure without the electric field control layer, the 3dB bandwidth of the 20µm diameter novel structure, to the best of our knowledge, is improved by 27.1% to 37.5GHz with a reverse bias of 2V, and the RF output power reaches 23.9dBm at 30GHz. In addition, under 8V bias voltage, the bandwidth reaches 47.3GHz.

High-Power and High-Speed Ge/Si Traveling-Wave Photodetector Optimized by Genetic Algorithm

We experimentally demonstrate a 4-stage and an 8-stage Ge/Si distributed traveling-wave photodetectors (TWPDs) with high RF output powers and large bandwidths. The genetic algorithm is utilized to synergistically optimize multiple relevant design parameters, including the dimension of the coplanar waveguide electrode and the aperiodic arrangement of the PD array. After the genetic algorithm optimization, the 3dB bandwidth of the 4-stage TWPD is improved from 46 GHz to 54 GHz under the constraint that the bandwidth of the unterminated single PD element is 50 GHz. Meanwhile, the 3dB bandwidth of the 8-stage TWPD is improved from 33 GHz to 40 GHz. A good agreement between measured and calculated frequency responses is obtained. The measured maximum RF output powers of the aperiodic 4-stage and 8-stage TWPDs at 30 GHz are 2.5 dBm and 6.3 dBm, respectively. Furthermore, the effectiveness of our design methodology is verified by measurement results of devices fabricated at different silicon photonics foundries.

Silicon-based high-power traveling wave photodetector with inductive gain peaking.

We demonstrate Ge/Si high-power and high-speed distributed traveling wave photodetectors (TWPD) by using the inductive gain peaking technique. Input terminals of TW electrodes are open to enhance RF output efficiencies to output loads. Furthermore, optimized on-chip spiral inductors are incorporated at output terminals of TW electrodes to alleviate bandwidth degradations caused by the absences of matching impedances. A comprehensive equivalent circuit model is developed to calculate the frequency response of this scheme. It is used to optimize the design, and then is validated by measurement results. After inducing on-chip inductors, the bandwidths of 4-stage and 8-stage TWPDs are improved from 32 to 44 GHz and 16 to 24 GHz, respectively. Maximum RF output powers of 4-stage and 8-stage TWPDs with on-chip inductors are measured to be 5.7 dBm and 9.4 dBm at 20 GHz, respectively.

Load-Modulated Balanced Amplifier: From First Invention to Recent Development

The RF power amplifier (PA) is a unit in wireless transmitters that strengthens the signal to combat losses in transmission by converting dc electric power to the added RF output power. Over the past decades, with the rapid development of wireless communications, high-efficiency PA design has become one of the most popular topics in both academic research and industrial development as the PA consumes a high portion of the transmitter energy, and thus its power efficiency directly impacts the system performance. In addition, because the PA is the main source of distortion generated by the transmitter, linearity is another concern in PA design, particularly in wideband systems <xref ref-type="bibr" rid="ref1" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">[1]</xref> .

Gain and Bandwidth Improvement Studies of Millimeter Wave Periodically Dielectric Loaded Gyro-Twystron Amplifier

In this article, the spurious oscillations in the output section of gyro-twystron have been analyzed and the design and modeling of its various subassemblies also been presented. The periodic dielectric loading (PDL) technique has been adapted in the output waveguide section to improve the device gain by suppressing the backward wave oscillations (BWOs). Further, to improve the performance of the amplifier all the cavities were staggered tuned. The particle-in-cell (PIC) simulation of the present PDL gyro-twystron predicted an RF output power of ~120 kW in the fundamental TE01 mode at 94 GHz. The conversion efficiency, 3-dB bandwidth, and saturated gain were calculated as ~34%, ~2.2 GHz, and ~51 dB, respectively. A triode magnetron injection gun (MIG) was designed for 60 kV and 6 A gyrating electron beam and optimized for the velocity spread of ~2.2% with a velocity ratio of 1.6. A single-stage depressed (SSD) collector has also been designed to enhance the efficiency of the amplifier to ~57%. A double-disk window was designed and optimized for the broader bandwidth of ~8 GHz.

Novel "red-bull sign" during cavotricuspid isthmus ablation: Indication of an ablation catheter stuck in the subeustachian pouch.

A subeustachian pouch (SEP) often hinders the completion of a cavotricuspid isthmus (CTI) ablation of typical atrial flutter (AFL) and sometimes causes steam-pops during a power-controlled ablation. We hypothesized that real-time bull's-eye monitoring of the catheter surface temperature might be useful to locate the SEP where the temperature can rise rapidly, and a temperature-controlled ablation might avoid steam pops. This study aimed to demonstrate this hypothesis. A temperature-controlled CTI ablation with a QDOT MICRO™ catheter (n=10) and a conventional power-controlled CTI ablation (n=10) were performed with an output power of 35 W. During the RF application, the bull's eye monitor for monitoring the catheter surface temperatures was assessed. A "red-bull sign" was defined as an entire red-colored bull's-eye monitor, indicating that the catheter-tip temperature of all 6 thermocouples rose rapidly over 47°C. In a total of 115 lesions (12 ± 3 per patient), a "red-bull sign" was observed in 39 (33.9%) lesions where the RF output was reduced to 26 ± 8W. All 39 "red-bull sign" lesions corresponded to the location of the SEP as delineated by ICE before the ablation. The red-bull sign accurately indicated the presence of a SEP with a sensitivity of 84.7% and specificity of 100%. Bidirectional block of the CTI was completed in all patients in either catheter group without any steam-pops. Real-time surface temperature monitoring and a red-bull sign might be useful to detect the SEP. A temperature-controlled CTI ablation with the QDOT MICRO catheter might be safe for avoiding steam pops.

Artificial Neural Network-Based Modeling for Estimating the Effects of Various Random Fluctuations on DC/Analog/RF Characteristics of GAA Si Nanosheet FETs

Advanced field-effect transistors (FETs), such as gate-all-around (GAA) nanowire (NW) and nanosheet (NS) devices, have been highly scaled; therefore, they are critically affected even by a microscopic fluctuation. As the GAA NS device is considered a promising candidate beyond 5-nm technology, it is essential to analyze the effects of these fluctuations on dc and analog/radio frequency (RF) characteristics for future applications. In this article, we for the first time demonstrate that the machine learning (ML)-aided numerical device simulation approach can be used to model the effects of various fluctuations on the characteristics of GAA NS FETs (NSFETs). Among various fluctuations, we mainly focus on work function fluctuation (WKF), random dopant fluctuation (RDF), and interface trap fluctuation (ITF). The independent and combined effects of these fluctuations on the characteristics of NSFETs are studied. Except for transfer and output characteristics, analog and RF parameters, such as gate capacitance, transconductance, cutoff frequency, 3-dB frequency, and transconductance efficiency, are analyzed in detail. The main aim of this work is to show the capability and generality of ML in modeling various electrical characteristics of the explored NSFETs. The results show that the ML-based technique is fast and efficient, which accelerates the overall process and gives engineering acceptable accurate results.

A 2-Bit Voltage-Controlled Oscillator (VCO) for Multiband Wireless Applications

This letter presents a fully-integrated 2-bit CMOS voltage-controlled oscillator (VCO) along with a 2-bit buffer, which delivers the highest RF output power among recently reported state-of-the-art to the best of the authors’ knowledge. The proposed 2-bit VCO is designed and fabricated in a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.18-\mu \text{m}$ </tex-math></inline-formula> CMOS process with a die size of 1.2 mm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times$ </tex-math></inline-formula> 1.2 mm, which covers four frequency bands of interest. Fine-tuning at each of the four frequency bands is also obtained by utilizing two varactors. The proposed 2-bit VCO delivers a single-ended output power of 6.5/6.8/10.6/12.5 dBm at 0.930/1.157/1.436/1.917 GHz, respectively. This 2-bit VCO can cover frequency ranges of 930–1005, 1046–1157, 1248–1436, and 1540–1917 MHz, thus providing a total frequency bandwidth of 751 MHz. The proposed 2-bit VCO at each frequency band demonstrates −99, −93, −90, and −86 dBc/Hz for phase noise, and −150, −150, −160, and −168 dBc/Hz for figure-of-merit (FOM), respectively.