RF Circuits Research Articles

A Sub-μ W Reversed-Body-Bias 8-bit Processor on 65-nm Silicon-on-Thin-Box (SOTB) for IoT Applications

For most Internet-of-Things (IoT) applications, embedded processors typically execute lightweight tasks such as sensing and communication. The typical IoT program senses some information and sends them via a channel, usually a wireless channel with an RF circuit. These IoT nodes often require a system with networking capabilities and a low-power harvester implementation. This brief presents a sub- μW 8-bit processor which is suitable for such IoT applications. The processor implements the Open8 Instruction Set Architecture (ISA) with an 8-bit datapath and 16-bit bus addressing. The chip contains the processor and a 4-KB of Static Random-Access-Memory (SRAM), and is fabricated by the 65-nm Silicon-On-Thin-Box (SOTB) process. The SOTB process is one of the Fully-Depleted Silicon-On-Insulator (FD-SOI) technology. Hence, the ability to control biasing voltages is one of its key advantages to achieve low-power. The experimental results show that the power consumption at the reverse-body bias can reach down to 50-nW with 0.5-V supply voltage and 32-KHz operating clock frequency. The completed microcontroller consists of the Open8 processor, 32-KB of Read-Only-Memory (ROM), 4-KB of SRAM, Serial Peripheral Interface (SPI), SPI programmer, debug module, General-Purpose In-Outs (GPIOs), and UART. The system was tested using an XC7A100T Xilinx Field-Programmable Gate Array (FPGA); it yielded 1.8% of the total FPGA utilization.

Transistor Compact Model Based on Multigradient Neural Network and Its Application in SPICE Circuit Simulations for Gate-All-Around Si Cold Source FETs

Transistor compact model (TCM) is the key bridge between process technology and circuit design. Typically, TCM is desired to capture the nonlinear device electronic characteristics and their high-order derivatives. However, for the novel devices in advanced and future technologies, establishing TCM based on analytical equations and extracting model parameters becomes tedious. The model fitting capability for device outputs’ high-order derivatives is also limited. These drawbacks hinder fast and accurate device to circuit evaluation cycles. We develop a TCM based on multigradient neural network (MNN) using computational graph in the PyTorch framework. This MNN model is able to simultaneously capture the transistor dc/ac characteristics, such as <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I}-{V}/{Q}-{V}$ </tex-math></inline-formula> , their derivatives ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${G}-{V}/{C}-{V}$ </tex-math></inline-formula> ), and higher order derivatives accurately. Moreover, the model architecture can be widely adapted to various device types. Based on this model scheme, software is developed to enable the automated model generation for standard SPICE simulation. Finally, the model and software are validated for novel gate-all-around (GAA) Si cold source field-effect transistors (CSFET), and 19-stage ring oscillator and two-stage operational amplifier circuit simulations have also been demonstrated. This work reduces the cycle of novel device compact model creation and circuit benchmark simulation from months or weeks to hours. In addition, it enables more precise circuit simulation for analog and RF circuits, and it provides a rapid solution for early stage design technology cooptimization (DTCO).

New Associate Editors

It is with great pleasure that I welcome Meng-Fan Chang, Yunzhi Dong, Arun S. Natarajan, and Patrick Reynaert to the editorial board of the IEEE Journal of Solid-State Circuits as new Associate Editors. Chang is an expert on memories and digital circuits. Dong brings expertise in data converters and analog circuits. Natarajan is an expert in RF and mm-wave circuits. Reynaert brings expertise in THz circuits and power amplifiers.

A Monopole Antenna at Quad Band Frequency for Indoor Application

In this paper we concentrate on design of multiband antenna for existing wireless services. At present, the available techniques are modifying the main radiator (bending, folding, meandering and wrapping) which affects the size of antenna. This makes it more complex in implementing on RF circuits. To achieve multiband capability along with compactness in size we go with slotted multiband planar system. Here we design antenna in such a way in works on quad band frequency i.e., GPS, WiMax and WLAN(IEEE 802.11 a,b) for indoor application.

A G-Band High Output Power and Wide Bandwidth Sheet Beam Extended Interaction Klystron Design Operating at TM31 with 2π Mode

In this paper, we propose a high-order mode sheet beam extended interaction klystron (EIK) operating at G-band. Through the study of electric field distribution, we choose TM31 2π mode as the operating mode. The eigenmode simulation shows that the resonant frequency of the modes adjacent to the operating mode is far away from the central frequency, so there is almost no mode competition in our high mode EIK. In addition, by studying the sensitivity of the related geometry parameters, we conclude that the height of the coupling cavity has a great influence on the effective characteristic impedance, and the width of the gap mainly affects the working frequency. Therefore, it is necessary to strictly control the fabrication tolerance within 2 μm. Finally, the RF circuit using six barbell multi-gap cavities is determined, with five gaps for the input cavity and idler cavities and seven gaps for the output cavity. To expand the bandwidth, the stagger tuning method is adopted. Under the conditions of a voltage of 16.5 kV, current of 0.5 A and input power of 0.2 W, the peak output power of 650 W and a 3-dB bandwidth of 700 MHz are achieved without any self-oscillation.

Analog hardware trojan design and detection in OFDM based wireless cryptographic ICs.

Due to Hardware Trojan (HT), trustworthiness of Integrated Circuit (IC) supply chain is a burning issue in Semiconductor Industry nowadays. Over the last decade, extensive research has been carried on HT detection methods for digital circuits. However, the HT issue remains largely unexplored in the domain of Analog Mixed Signal (AMS)/ RF circuit where it is now an appealing target for the attackers. The increasing popularity of Orthogonal Frequency Division Multiplexing (OFDM) based wireless cryptographic ICs in modern communication systems makes it a lucrative target for HT-based attacks which could have a devastating impact on data security. This paper presents a trigger-based Hardware Trojan Threat model that exploits the extended cyclic prefix (ECP) property of the OFDM communication scheme to leak the secret encryption key over low noise Additive White Gaussian Channel (AWGN) and developed a Cyclic Prefix (CP) checker based detection mechanism named “SENTRY” to detect such trojans once it is triggered.

고해상도 파형을 사용하는 소형레이다용 주파수합성기의 진동에 의한 위상잡음 악화 분석

High-resolution compact radar in high-speed aerial vehicles can be exposed to vibration, and vibration can degrade the phase noise of crystal oscillators and other RF circuits. In this study, a laboratory experiment was conducted similar to the actual operating environment using a coherent frequency synthesizer, superheterodyne receiver realized by commercial RF circuits, an optical delay line with a maximum 20 km range delay, and a vibrator. After applying vibration to the frequency synthesizer, the phase noise was measured at each node of the receiver using a signal source analyzer. Consequently, it was confirmed that the effect of the phase noise suppression function depends on the range delay. The suppression function not only degrades the phase noise by frequency multiplication, but also degrades it by vibration. On the other hand, it has been shown theoretically and experimentally that the lower limit can be suppressed by the suppression function is determined by the higher level of the phase noise generated from the oscillator to the intermediate frequency signal or thermal noise. Finally, a transceiver architecture that has the advantage of suppressing phase noise is proposed for compact radar using high-resolution waveforms.

Development of fast-ion collective Thomson scattering diagnostics for the GDT experiment

In this paper, we describe hardware developed for the collective Thomson scattering (CTS) diagnostic for the large open magnetic trap GDT (Budker Institute, Russia) used in fusion researches. The diagnostic utilizes 400 kW/54.5 GHz gyrotron as a source of probe radiation and is aimed at the reconstruction of fast ion distributions over transverse and longitudinal velocities driven by high-power neutral beam injection. Formation and manipulation of the probe beam and collection of the scattered microwave radiation are done with large-aperture quasi-optical mirror systems. The receiving complex consists of two identical channels for simultaneous detection of scattering in two complement geometries. Each channel includes a highly sensitive radiometer/spectrum analyzer with the band of 54.470 ± 0.550 GHz, the noise temperature of 0.35 eV, the sensitivity less than 0.025 eV, the frequency/time resolution of 5–50 MHz/10 μs, and narrow-band notch filter providing at least -40 dB rejection in the band of 25 MHz with a central frequency tunable in 54.470 ± 0.050 GHz for protection of the input RF circuit from a backlight of powerful gyrotron radiation.

Study on Analog/RF and Linearity Performance of Staggered Heterojunction Gate Stack Tunnel FET

Staggered heterostructure gate stack TFET is proposed. The analog, RF, and linearity performance of the device were studied in an ATLAS TCAD device simulator. The high K material HfO2 was used in gate stacking. The impact of the gate stack width on the analog, RF, and linearity performance was investigated. Analog/RF performance of the staggered heterostructure gate stack TFET were analyzed in terms of figure of merits (FOMs) like transconductance (gm), transconductance generation factor (TGF), voltage gain, electric field, cut off frequency (fT), maximum frequency of oscillation (fmax), and gain band width (GBW). Gate stacking architecture in heterostructure staggered TFET improves the Ion/Ioff ratio and reduces drain induced barrier lowering with respect to greater gate stack width (toxh), diminishing the short channel effects. Improvement in gm voltage gain, fT, fmax, and GBW) were observed as the gate stack width thickened. A fair comparison of FOMs such as VIP2, VIP3, IIP3, IMD3, and 1 dB–compression point (P1 dB) were carried out by varying the gate stack width to investigate the linearity performance. The simulation results reveal that staggered heterostructure gate stack TFET can be a reasonable competitor for low-power applications and in the design of RF circuits covering a wide range in frequencies of RF spectrum.

Accelerated numerical modeling of RF circuits using network characteristic mode analysis

AbstractA fast numerical modeling approach based on network characteristic mode analysis (CMA) is presented and investigated for analyzing electrical layouts in miniature RF filters, such as surface acoustic wave filters. In this approach, a generalized eigenvalue decomposition is performed on the Z‐parameters of an electrical layout at one or two sampling frequencies that can be computed and extracted with any numerical full‐wave method. The obtained eigenvalues are used to extract modal resistance, inductance, and capacitance matrices for each eigenmode. The frequency dependence of the modal resistance matrix can be assumed a priori or determined automatically, and the modal inductance and capacitance matrices are assumed frequency independent. These modal matrices are then used to approximate the Z‐parameters at any other frequencies to provide the response of the electrical layout, which can then be combined with the frequency responses of other components, such as resonators, to yield the electrical response of an entire RF filter. Compared with the previously developed analytic extension of eigenvalues, this fast CMA‐based method is less affected by the frequency variation of eigenmodes since the frequency dependences of the eigenmodes are implicitly canceled out in its formulation. The accuracy of this approach is evaluated by comparing with results from full‐wave analyses. For RF circuits whose electrical sizes are small and whose frequency range of interest is relatively small, the proposed CMA‐based fast frequency sweep approach is found to be sufficiently accurate and highly practical for engineering applications.

Towards a Description Synthesis of the Entanglement of the Substrate with the Interconnection Network, for Fast Modeling of 3D RF circuits

3D chip stacking is considered known to overcome conventional 2D-IC issues, using Trough Silicon Via (TSVs) to ensure vertical signal transmission between data. If the electrical behaviour of 3D interconnections (redistribution metal lines and through silicon vias) used in 3D IC stack technologies are to be explored in this paper, the substrate itself is of interest, via Green Kernels by solving Poisson's equation analytically. Using this technique, the substrate coupling and loss in IC's can be analysed. We implement our algorithms in MATLAB. This method has been already used; but, it permits to extract impedances for a stacked uniform layers substrate. We have extended for any numbers of embedded contacts, of any shape. On a second hand, we grasp the background noise between any two points, in the bulk, or at the surface, from a transfer impedance extraction technique. With an analog algorithm, a strength of this work, we calculate unsteady solutions of the heat equation, using a spreading resistance concept. This method has been adapted to stacked layers. With this general tool of impedance field, we investigate on the problems encountered by interconnects, especially the vias, the substrate, and their entanglement. A calculation of thermal mechanical stresses and their effects on substrate crack (max and min stresses), devices (i.e: transistors) and hotspots, are made to track the performance. But, to well understand the interconnection incidence on 3D system performances, it is important to consider the whole electrical context; it seems relevant to consider the possible couplings between vias, not only by the electromagnetic field, but also by any possible energy transfer between interconnects; more generally, one of actual problem is to determine where the energy is really confined in such 3D circuits, before find solutions to limit pollutions coming from electro-magneto -thermal phenomena or background noises.

Extreme Nonreciprocal Near-Field Thermal Radiation via Floquet Photonics.

By using Floquet driving protocols and interlacing them with a judicious reservoir emission engineering, we achieve extreme nonreciprocal thermal radiation. We show that the latter is rooted in an interplay between a direct radiation process occurring due to temperature bias between two thermal baths and the modulation process that is responsible for pumped radiation heat. Our theoretical results are confirmed via time-domain simulations with photonic and rf circuits.

A Quad-Band RF Circuit for Enhancement of Energy Harvesting

Radio frequency energy harvesting is one of the new renewable sources that faces some technical challenges, which limit its performance. This study presents two scenarios to enhance the harvested power. The first scenario introduces a quad-band voltage multiplier circuit with a single receiving antenna and four band-pass filters of elliptic type. In this scenario, four frequencies of the Global System for Mobile communications, Universal Mobile Telecommunications System, and Wireless Fidelity frequency bands have been considered for the study. The second scenario proposes a quad-band voltage multiplier circuit with four receiving antennas at the same frequency bands as the first scenario. High conversion efficiencies were achieved for the two scenarios. The proposed quad-band system developed a harvested power level, sufficient for powering up low power micro-devices with no need for an external power supply.

A High-Current-Density Electron Beam for Millimeter-Wave Amplifiers

We present experimental characterization of a 20-kV, 130-mA thermionic electron gun, which is a component of a ${W}$ -band traveling-wave tube (TWT) power amplifier. The electron beam is strongly focused by a 6.6-kG permanent magnet solenoid, producing a peak current density up to 800 A/cm2. The cathode temperature, focus electrode voltage, and modulating anode voltage are varied to characterize the emitted cathode current and beam transport through the beam tunnel of the TWT RF circuit. We observe the variation of the cathode current from 107 to 155 mA and peak beam transmission of 95% measured at the collector. Experimental results are compared to 2-D simulations with the electron gun and collector design code MICHELLE.

RF network analysis of the WEST TWA mock-up in TITAN

WEST represents the ideal device to test a reactor relevant travelling wave array (TWA) due to its long pulse capability and full metal wall configuration. Moreover, the already installed ICRF high power launchers will allow a direct comparison between a classical in-port antenna and the TWA. The design and exploitation of a high power (2 MW) TWA mock-up to be tested in TITAN represent the first step towards its integration in WEST. This paper presents the progress in the RF characterization of this high power mock-up. An integrated modelling scheme based on the full-wave code HFSS and on Python packages for RF circuit simulations is developed and used to parametrically analyse the response of the mock-up inside TITAN. The sensitivity of the antenna to geometrical deformations, e.g. thermal dilatation or manufacturing tolerances, is analysed. The use of trimmers to compensate those deformations is discussed and results from a manufactured trimmer test-bed are presented. A diagnostic system is proposed to measure electric field and current on the straps. Aspects like sensitivity and calibration are briefly discussed. In conclusion, the next steps of the project are outlined.

Motional heating of spatially extended ion crystals

We study heating of motional modes of a single ion and of extended ion crystals trapped in a linear radio frequency (rf) Paul trap with a precision of phonons s−1. Single-ion axial and radial heating rates are consistent and electric field noise has been stable over the course of four years. At a secular frequency of ω sec = 2π × 620 kHz, we measure phonons s−1 per ion for the center-of-mass (com) mode of linear chains of up to 11 ions and observe no significant heating of the out-of-phase (oop) modes. By displacing the ions away from the nodal line, inducing excess micromotion, rf noise heats the com mode quadratically as a function of radial displacement r by phonons s−1 μm−2 per ion, while the oop modes are protected from rf-noise induced heating in linear chains. By changing the quality factor of the resonant rf circuit from Q = 542 to Q = 204, we observe an increase of rf noise by a factor of up to 3. We show that the rf-noise induced heating of motional modes of extended crystals also depends on the symmetry of the crystal and of the mode itself. As an example, we consider several 2D and 3D crystal configurations. Heating rates of up to 500 ph s−1 are observed for individual modes, giving rise to a total kinetic energy increase and thus a fractional time dilation shift of up to −0.3 × 10−18 s−1 of the total system. In addition, we detail how the excitation probability of the individual ions is reduced and decoherence is increased due to the Debye–Waller effect.

Linearity performance and intermodulation distortion analysis of D-MOS vertical TFET

Recent trend researches provide potential results of tunnel field effect transistors (TFETs) for being used in many electronic circuit applications. This work studies the comparative analyses of n+ pocket vertical TFET and dual MOSCAP (D-MOS) vertical TFET to determine their compatibility in RF applications. Synopsys TCAD simulation result shows a better ION/IOFF ratio (8.43 × 108), steeper sub-threshold swing (18.67 mV/dec) and an enhanced ambipolarity behavior of the proposed D-MOS VTFET. A comprehensive investigation of both the devices under consideration is performed and comparison has been made on their linearity and intermodulation distortion performances. Certain figure of merits of RF performance such as their higher order transconductance characteristics, second- and third-order voltage intercept points (VIP2 and VIP3), third-order input intercept point (IIP3), third-order intermodulation distortion (IMD3), 1 dB compression point and total harmonic distortions have been explored in this work. From the analyses performed, the proposed dual MOSCAP VTFET is found to be comparatively linear where minimum intermodulation distortions and lesser higher order harmonics are guaranteed. Finally, the status of the proposed TFET is highlighted as an efficient device for RF circuit applications.

Research on GaN-Based RF Devices: High-Frequency Gate Structure Design, Submicrometer-Length Gate Fabrication, Suppressed SCE, Low Parasitic Resistance, Minimized Current Collapse, and Lower Gate Leakage

As an important part of wireless communication systems, the technology of RF devices and circuits has been progressing rapidly. For high-frequency and high-power applications, vacuum electronic devices (e.g., traveling wave tubes) have been widely used, although the vacuum tube is large in size and hard to integrate.

Evaluation of a Two-Tier Adaptive Indirect Test Flow for a Front-End RF Circuit

This paper focuses on test cost reduction for RF circuits based on the use of an indirect test strategy. The implementation of a two-tier adaptive test flow is investigated, in which only circuits with a sufficient prediction confidence level are evaluated by the indirect test while others are re-evaluated by specification-based test. A methodology is presented that permits to explore different tradeoffs between test quality and test cost and to make pertinent choices for the efficient implementation of such a test flow. The methodology is applied to a front-end RF circuit designed for WLAN applications and results show that substantial test cost reduction can be achieved without compromising the test quality.

Analysis and Modeling of various Tapered Coplanar Waveguide

This paper proposes the analysis of investigations on various tapered Coplanar Waveguide (CPW) structures to achieve increase in phase shift per unit length and the reduction in line length. The analysis of the tapered CPW is important in order to obtain the characteristic impedance and phase velocity of the transmission line. The step tapered CPW structures proposed have the center conductor, the gap/ground or both the widths varying having constant characteristic impedances for a fixed line length. The conformal mapping method is applied to the proposed tapered CPW structures to obtain the electrical parameters of the transmission line. The obtained impedance can be utilized in the design of RF circuits such as phase shifter using MEMS bridges.