RF Circuits Research Articles

Analytical Equivalent Circuit Extraction Procedure for Broadband Scalable Modeling of Three-Port Center-Tapped Symmetric On-Chip Inductors

This paper presents a new, almost fully analytical methodology for component value extraction of a double- ${\pi }$ equivalent circuit model for three-port on-chip inductors from a given S-parameter dataset. The compact model provides an accurate fit over a wide frequency range from dc to beyond the self-resonance frequency (SRF) to a tabular input ${S}$ -parameter model describing a symmetric center-tapped on-chip inductor. The input dataset may be obtained from a measurement or from an electromagnetic field solver simulation. Using a passive broadband equivalent circuit instead of the original ${S}$ -parameters’ description is advantageous for circuit design, as it facilitates the convergence of transient simulations. The proposed approach carefully considers center-tap parasitics. Hence, the obtained equivalent circuit model fits the input inductor characteristics accurately not only for differential excitation but also in the common-mode and single-ended operation. Due to the fact that the proposed extraction approach is based on physical assumptions and analytical circuit decomposition, the obtained component values are physically meaningful and relate to geometry. Thus, this approach is suitable for the generation of scalable compact models, which can be used to speed-up inductor optimization during the RF circuit design. The proposed methodology has been verified on a three-port inductor realized in a 28-nm CMOS technology and measured up to 60 GHz. The extracted equivalent circuit model exhibits an accurate fit to the measured data over the entire frequency range in all operation modes. Finally, field-solver models are used to verify the scalability.

Non-destructive techniques for evaluating the reliability of high frequency active devices

SiGe and GaN technologies have achieved rapid development over the last two decades. High level of RF circuit integration on Si low cost substrates open the way for large development of SiGe HBTs, while needs for high power density make GaN HEMT a key technology for solid state power modules. As both of these technologies achieve very elevated frequencies, they become strong contenders to GaAs technologies. Then reliability studies are needed to improve the process at the lower technology readiness level scale, and to stabilize the technological process till the final qualification step. To make an efficient diagnostic on the causal origin of the physical root mechanisms involved during the application of a stress, a multi-tool approach is mandatory to secure the diagnostic. In this paper, case studies on SiGe HBT and GaN HEMT stressed devices are proposed through the cross-analysis of low frequency noise spectral densities, of electrical transient measurements, and of TCAD simulations.

High-Frequency Bidirectional Resonant Converter for High Conversion Ratio and Variable Load Operation

Applying RF circuit design techniques to dc–dc resonant converters has enabled switching frequencies well beyond 10 MHz, leading to higher power densities and faster transient response. Synchronous rectification is advantageous for low-voltage high-power applications but is challenging to implement in a high-frequency (HF) dc–dc converter. This article proposes an HF/very HF (VHF) resonant converter structure in which the rectifier and the inverter switches can be driven with the same gate signal. The presented structure enables efficient bidirectional power delivery in the HF/VHF range for applications that require a large voltage conversion ratio. A 64-MHz, 12-W, 36–12-V prototype converter verifies the operation of the structure. This article further explores an interleaved architecture of the same circuit to improve efficiency and transient performance. Finally, a 13.56-MHz 210–30-V prototype converter with 90% peak efficiency at 200 W demonstrates the advantages of the interleaved architecture.

Effective time‐domain approach for the assessment of the stability characteristics and other non‐linear effects of RF and microwave circuits

This study describes a systematic approach for the stability analysis of RF and microwave non-linear circuits in the time-domain and that can be useful also for the verification of other non-linearities, like intermodulation. The time-domain analysis is the most reliable approach for the evaluation of complex non-linear phenomena but, in general, the transient behaviour of non-linear circuits is difficult to verify at high frequencies, where distributed elements are common. The solution here addressed overcomes this limitation and it may be applied, without restrictions, also to monolithic microwave integrated circuits and EM-based designs. Examples of application to hybrid prototypes are provided, and the comparison between simulations and measurements illustrates the accuracy and reliability of the proposed approach.

Beam Transport and Beam-Current Loss in Emittance-Dominated High-Frequency Tubes

Emittance effects are becoming increasingly important in high-frequency electron devices, especially in recent and proposed high-frequency traveling wave tubes and klystrons. The ratio of beam radius to the beam pipe, typically referred to as “fill factor,” is a critical parameter for high-frequency tubes. Fill factors, typical of lower frequency tubes, such as 0.5–0.8, can lead to significant beam current loss in high-frequency tubes when transported over long distances in the beam pipe because the beam in such tubes is more subject to emittance effects. The increased beam loss, in turn, leads to large dissipation of beam power at the RF circuit, damaging the circuit itself and limiting tube’s duty cycle. Traditionally, the beam emittance has been largely studied and measured in linear accelerators (linacs) where emittance effects are larger than space-charge effects at high beam energy. In this paper, we apply the beam physics developed for linacs to high-frequency tubes for the first time. We provide necessary theoretical tools to determine the fundamental limit of the beam pipe sizes for a desired limit of beam interception. Specifically, the effect of both space charge and emittance is incorporated into iterative solution of equilibrium distributions of charge densities in the presence of a uniform focusing axial magnetic field. The numerical solutions and tools provided here can be used to determine the beam pipe size for any beam emittance. The theoretical formulation and results are expected to be particularly useful for devices operating from mm-wave to subterahertz frequency regimes.

Characterization, Optimization, and Fabrication of Phase Change Material Germanium Telluride Based Miniaturized DC–67 GHz RF Switches

This paper presents the characterization, optimization, and fabrication of phase change material (PCM) germanium telluride (GeTe) based RF switches investigating the materials’ aspect and design parameters of the switches and their impact on the RF performance. Surface properties of GeTe thin films are investigated through atomic force microscopy (AFM), scanning electron microscopy (SEM), and cross-wafer resistance mapping measurements. Optimized GeTe thin films exhibit over five orders of resistance change. Various GeTe switch design constraints are studied via cross sectioning of the fabricated device using a focused ion beam (FIB)-SEM. Current-carrying capacity and resistance of microheaters are extracted using electrical characterization. The RF performance of the PCM switches is optimized using diverse design parameters and characterization of PCM thin films. A six-layer microfabrication process is presented for monolithically integrating RF circuits with PCM switches. Methods to reduce parasitic elements in PCM switches are discussed. The RF performance of the optimized PCM based switch is simulated and measured demonstrating better than 0.4 dB of insertion loss and a return loss better than 20 dB from dc to 67 GHz.

A Survey on ESD protection design in different RF circuits

ESD (electrostatic discharge) protection circuits are always needed in any of the RF circuits to protect the circuit from electrostatic discharge. There are different types of ESD protection circuits. It is very important to protect the circuit from CMOS devices. In this review we have discussed ESD protection design in different RF circuits through different papers. In introduction part we have discussed causes of ESD. The problem is also discussed in the paper at the conclusion point.

High-Throughput and Low-Latency Digital Baseband Architecture for Energy-Efficient Wireless VR Systems

This paper presents a novel baseband architecture that supports high-speed wireless VR solutions using 60 GHz RF circuits. Based on the experimental observations by our previous 60 GHz transceiver circuits, the efficient baseband architecture is proposed to enhance the quality of transmission. To achieve a zero-latency transmission, we define an (106,920, 95,040) interleaved-BCH error-correction code (ECC), which removes iterative processing steps in the previous LDPC ECC standardized for the near-field wireless communication. Introducing the block-level interleaving, the proposed baseband processing successfully scatters the existing burst errors to the small-sized component codes, and recovers up to 1080 consecutive bit errors in a data frame of 106,920 bits. To support the high-speed wireless VR system, we also design the massive-parallel BCH encoder and decoder, which is tightly connected to the block-level interleaver and de-interleaver. Including the high-speed analog interfaces for the external devices, the proposed baseband architecture is designed in 65 nm CMOS, supporting a data rate of up to 12.8 Gbps. Experimental results show that the proposed wireless VR solution can transfer up to 4 K high-resolution video streams without using time-consuming compression and decompression, successfully achieving a transfer latency of 1 ms.

(Invited) SOI Technologies for RF and Millimeter Wave Applications

In this paper, an overview of SOI technology for high-frequency telecommunication applications is presented. At the transistor level, thanks to SOI’s low-parasitic architecture and good electrostatics, high oscillation and cut-off frequencies in the range of 400 GHz are achieved. At the RF-IC level, a review is made to reveal the position of SOI for key RF and millimeter wave circuits (switches, LNAs and PAs). Finally, substrate impact is described at RF frequencies. The existing flavors of SOI substrates are reviewed, highlighting substrate requirements at RF, as it seriously impacts parasitic coupling, RF losses, passive quality factor, and non-linear signal distortion. Overall, SOI is shown to be a prime candidate not only for high-performance millimeter wave and 5G applications, but also for low-power RF IoT.

Co-based magnetic nanostructured material for high frequency applications

The RF circuits are difficult to be miniaturized without compromises concerning the technical performances. The inductors and antennas are the major constraints for systems miniaturization, due to the lack of magnetic materials with adequate high frequency properties. The paper presents novel Co-based magnetic nanostructured materials, with improved characteristics which recommend them as potential candidates for transformers and inductors in electronic components: higher level for saturation magnetisation and electric resistivity in comparison with commercial ferrites. The magnetic nanocomposites are prepared by sol-gel route and consist on Co magnetic nanocrystallites, arranged in a crystalline matrix (silicates, for example). The main physical characteristics of the Co/SiO2 nanopowders are developed after appropriate calcination and annealing, being dependent on the SiO2 amount and on the thermal treatment parameters: saturation magnetisation Ms = 81.7 – 130.4 emu/g, coercivity Hc = 21.7 – 26.9 kA/m (273 - 338 Oe) and increased resistivities for the sintered samples, due to the presence of the SiO2 layers.

Performance evaluation of various diagnostics developed for a negative ion based neutral beam injector program in IPR

The characteristics of a negative hydrogen ion (H-) source and its neutralization efficiency determine the performance of a negative ion based neutral beam injector (NNBI). Therefore, for the safe operation of an NNBI system, it is necessary to monitor the performance of the ion source and its beam through a systematic characterization process. A judicious selection of different diagnostics based on electrical, optical and thermal types and including calorimetric techniques are required. In this regard, a number of diagnostics are being developed under the NNBI R&D program in the Indian Test Facility (INTF). These diagnostics are versatile in nature in terms of their working principles and independent prototype experimental efforts have been carried out to establish them and prepare them for operational use. Electrical probes (EP), optical emission spectroscopy and cavity ring down spectroscopy (CRDS) are mainly envisaged for ion source plasma characterization. Additionally, standard electrical measurements in RF and DC power supply circuits are already in regular use in the operational experimental setups, ROBIN and HELEN-I, for monitoring the power supplies. Doppler shift spectroscopy (DSS) and optical emission tomography (TOMO) are developed for beam characterization in terms of divergence, stripping and beam profile. Some of these are characterized on separate prototype experiments and are already integrated and have been tested in the available operational plasma experimental setups: ROBIN and HELEN-I. The DSS system, with multiple lines of sight (LOS) (blue-shifted and red-shifted), is integrated in the ROBIN setup and CRDS is arranged in HELEN-I. The TOMO technique is used to find the beam power density profile from the hydrogen beam emitted Balmer line intensity. The optical brightness profile of a neutral beam due to beam emission radiation is proportional to the beam power density. In this regard, a tomography code based on maximum entropy is developed to reconstruct the 2D optical emissivity profile of the INTF beam by inverting the LOS integral of the brightness of the beam. The code has been validated with the simulated INTF beam power density profile, in terms of the mathematical functions representing it. In the present manuscript, the performance evaluations of these diagnostics are presented.

Guest Editorial

The latest generation of mobile networks, the 5G, is expected to unlock many new services and to provide a platform for growth in many industries. The key requirements for 5G are to provide ubiquitous connections to billions of devices and to enable multi-Gb/s wireless data transmission aiming to achieve 1000 times greater capacity compared with the existing systems. To bring 5G to reality, there are countless challenges lying ahead, ranging from spectral regulation to system architecture through to network management. Many of the most difficult scientific challenges are located at the “physical layer,” due to some fundamental limitations imposed by the nature of the electromagnetic energy used. As a result, significant research is required to enable advanced signal processing, energy-efficient RF and microwave circuits and systems, and smart hardware implementations to achieve a working system, in particular within the transceiver front end.

Preliminary Circuit Analysis of a $W$ -Band High-Power Extended Interaction Oscillator With Distributed Hollow Electron Beam

In this paper, the circuit synthesis concept is applied to support a novel extended interaction RF circuit for generating a high-power millimeter-wave radiation. Its novel configuration is constructed by parallel connecting multiple sheet-beam-extended interaction cavities arranged along the angular direction to form a distributed hollow electron beam (HEB) as a whole. The specific concept endows the proposed circuit features such as: 1) making the diameter of HEB flexible and hence extending the space to set more single-sheet beam cavity in angular direction for increasing power capacity and 2) offering the opportunity to adopt a mutual magnetic focusing system for the distributed HEB, which is critical for the feasibility of the circuit synthesis. The circuit analysis is carried out, and a ${W}$ -band extended interaction oscillator (EIO) based on this concept is proposed to preliminarily demonstrate the capability of circuit synthesis. The distributed HEB is produced with an immersed electron gun using a 0.8 T focusing magnetic field. Simulations using 3-D particle-in-cell (PIC) technology in Computer Simulation Technology (CST) predict a peak output power up to 10.0 kW around 103 GHz with the beam current of 4.2 A at 27 kV.

Enabling the development of accurate intrinsic parameter extraction model for GaN HEMT using support vector regression (SVR)

This study employs support vector regression (SVR) to develop an accurate and reliable intrinsic parameter extraction model for gallium nitride (GaN) high electron mobility transistors (HEMT) using two different geometries of 2 × 200 μm and 4 × 100 µm. The key aspect of the proposed approach is the use of nonlinear Gaussian kernel to transform the input space into a high-dimensional feature space. It then allows the application of learning technique to develop a reliable procedure for parameter extraction. The proposed extraction model of GaN HEMT has been developed for a broad range of frequency, from 1 to 18 GHz, with multi-biasing sets for HEMTs of two different geometries. Moreover, the proposed model is made scalable in terms of geometry parameters and therefore can be used to predict the intrinsic parameters and enumerate scaling efficiency of GaN HEMTs by investigating the geometry parameters. A good agreement is observed between the measured S-parameters and the proposed model for the complete frequency range. It is shown that the proposed approach is simple, novel and can be readily incorporated into computer-aided design tool for an accurate and expedited design process of RF and microwave circuits.

Analog Gross Fault Identification in RF Circuits Using Neural Models and Constrained Parameter Extraction

The demand and relevance of efficient analog fault diagnosis methods for modern RF and microwave-integrated circuits increase with the growing need and complexity of analog and mixed-signal circuitry. The well-established digital fault diagnosis methods are insufficient for analog circuitry due to the intrinsic complexity in analog faults and their corresponding identification process. In this paper, we present an artificial neural network (ANN) modeling approach to efficiently emulate the injection of analog faults in RF circuits. The resulting metamodel is used for fault identification by applying an optimization-based process using a constrained parameter extraction formulation. A generalized neural modeling formulation to include auxiliary measurements in the circuit is proposed. This generalized formulation significantly increases the uniqueness of the faults identification process. The proposed methodology is illustrated by two faulty analog circuits: a CMOS RF voltage amplifier and a reconfigurable bandpass microstrip filter.

Analytical investigation of self-oscillating condition for resonant terahertz extended interaction oscillators

Extended Interaction Oscillators (EIOs) are high-frequency sources of millimeter wave and terahertz radiations. The dimensions of the EIO resonant structure should be smaller to generate higher frequency signals. However, due to the skin effect and decreasing the available beam surface area, the maximum obtainable oscillating frequency of any RF geometry of EIO is limited. Analytical relations for maximum attainable frequencies of resonant EIO geometries in the sense of beam-wave coupling are derived and presented in this paper. They are directly expressed in terms of the standing-wave profile of the RF resonant circuit in this work. The maximum frequencies are expressed in terms of a defined two-variable analytical function U for single-section resonant EIOs. Besides, an algebraic formula is derived for a critical unloaded frequency of an EIO geometry (fcr) in terms of the resonant circuit field distribution. A 4/5 power-law dependency is derived for a maximum oscillating frequency vs a number of periods of the RF circuit. For two completely different EIO geometries, the results of the obtained relations are compared with the outcomes of a particle-in-cell solver, showing acceptable agreement for both the structures. In addition to computational rapidity, the obtained relations present an analytical viewpoint to estimate and improve the high-frequency generation capability of terahertz extended interaction oscillators.

EA-Based LDE-Aware Fast Analog Layout Retargeting With Device Abstraction

As the technology node continuously scales down, layout-dependent effects (LDEs) have been significantly affecting the threshold voltage and mobility of MOSFET transistors and then, in turn, the performance of analog integrated circuits. In this paper, we propose an LDE optimization methodology based on the evolutionary algorithm, which aims to protect analog circuits from the LDE-induced circuit performance degradation. With the aid of a fast analog layout retargeting scheme, our proposed optimization can evaluate the circuit performance with the consideration of detailed physical layouts, tune the device placement and transistor finger number, and modify the layout patterns for the LDE-aware circuit performance preservation. To accelerate the physical layout synthesis, our new retargeting process supports general device abstraction. The experimental results show that our proposed methodology can more effectively preserve analog and even RF circuit performance with higher efficiency than the alternative approaches.

Robustness of PIN Limiter Diodes to an ESD Event Based on VF-TLP Characterization

PIN limiter diodes are primarily used for protection from excess RF power in RF circuits. These diodes are positioned onboard at the I/O lines of the RF circuits. If an ESD event occurs, the first line of protection is offered by the PIN limiter diode. The main questions addressed in this letter are: Can the PIN limiter diode protect the RF circuit against ESD? If yes, then what is their ESD robustness? How do they compare against the standard ESD protection TVS diodes? This knowledge can guide the reader to understand whether or not the PIN limiter diode can help prevent ESD damage. The robustness of the diodes is investigated experimentally using a very fast transmission line pulse tester with a 10 ns pulse width and about 300–400 ps rise time. These diodes are tested for their withstand current, turn-on time at 1 A current, turn-on voltage, voltage clamp at 1 A current, capacitance, signal bandwidth, and effective package inductance. These diode parameters are essential in quantifying the component-level response of a device under test. This letter shows that the PIN limiter diodes are not a suitable replacement for the TVS diodes as an intentional ESD protection device. In case an ESD event occurs, these diodes are robust to ESD current levels up to 2.5-9 A and offer limited protection. They may effectively complement the TVS protection by offering a fast turn-on time and protection up to a certain ESD level, after which the (slower) TVS takes over.

Progress in neural network based techniques for signal integrity analysis–a survey

With the increase in data rates, signal integrity analysis has become more time and memory intensive. Simulation tools such as 3D electromagnetic field solvers can be accurate but slow, whereas faster models such as design equations and equivalent circuit models lack accuracy. Artificial neural networks (ANNs) have recently gained popularity in the RF and microwave circuit modeling community as a new modeling tool. This has in turn spurred progress towards applications of neural networks in signal integrity. A neural network can learn from a set of data generated during the design process. It can then be used as a fast and accurate modeling tool to replace conventional approaches. This paper reviews the recent advancement of neural networks in the area of signal integrity modeling. Key advancements are considered, particularly those that assist the ability of the neural network to cope with an increasing number of inputs and handle large amounts of data.

A novel dual loop adaptive equalizer based on spectrum balancing technique

Inductorless circuits are gaining advantage in RF and high-speed serial link circuits due to the reduced silicon area. This paper presents an inductor-less adaptive equalizer featuring both data rate adaptation and channel loss adaptation. The conventional adaptive equalizers use spectrum balancing technique. The spectrum balancing technique balances the power in low and high frequency components with cutoff frequency of the filters as 0.28Tb (Tb is the minimum bit period of the incoming data stream). The proposed technique removes the necessity of using high pass filter and uses only a programmable low-pass filter in the adaptive equalization loop. This technique leads to the tunability of the equalizer over a wide range of throughput and channel losses. For the proof of concept, the entire equalizer circuit is designed and fabricated in 180 nm mixed mode CMOS technology. The measurements with lossy channels show that the proposed adaptive equalizer is able to work well for the channel losses up to 6 dB and wide throughput of 1–3.125 Gbps. The design is targeted to operate at a maximum data rate of 3.125 Gbps to meet JESD 204 standards. The proposed adaptive equalizer consumes a power of 9.8 mW/Gbps including IO buffers.