Reverse Recovery Current Research Articles

Asymmetric trench SiC MOSFET with integrated channel accumulation diode for enhanced reverse conduction and switching characteristics

A novel asymmetric trench Silicon Carbide Metal Oxide Semiconductor Field Effect Transistor (SiC MOSFET), featuring an integrated channel accumulation diode (CAD-MOS), has been proposed and investigated through numerical simulation. This innovative design aims to mitigate switching losses and eliminate the bipolar degradation of the body diode. The current spreading layer (CSL) channel, strategically positioned in the centre of the dummy gate, offers a low-barrier reverse conduction path. This represents a substantial advancement over the traditional PN body diode, significantly reducing the reverse conduction voltage drop from 2.84 V in the PN body diode to a mere 1.39 V in the CAD-MOS. Meanwhile, the reverse recovery charge of the CAD-MOS is reduced to 0.95 μC/cm2, and the peak reverse recovery current stands at 45 A/cm2. Compared to conventional asymmetrical trench SiC MOSFET (CON-MOS), the CAD-MOS exhibits a 68.1 % reduction in reverse recovery charge and a 63.4 % decrease in peak reverse recovery current. The split-gate design also reduces the device gate to source capacitance (CGS), resulting in a 17.4 % reduction in total switching losses to 3.64 mJ/cm2. CAD-MOS also exhibits a reduced gate turn-on charge and demonstrates an enhancement in high-frequency figure of merit (HF-FOM) by 8.1 %.

A Flyback Converter with a Simple Passive Circuit for Improving Power Efficiency

This paper proposes an effective method to improve the power efficiency of the flyback converter in the continuous conduction mode (CCM). The proposed converter uses a simple passive circuit to reduce the switching power losses. The current through the output diode can be shifted to a new branch where one diode, one inductor, and one auxiliary winding of the transformer are included. The output diode current can be reduced to zero for the zero-current switching of the output diode. The additional inductor is used to control the changing rate of the additional diode current to reduce the reverse-recovery current. Keeping the simplicity of the passive method, the proposed converter improves the power efficiency compared to the conventional converter. The circuit configuration and the operation principle are described. The design considerations are presented, including the simulation verification. The experimental results for a 45 W prototype are discussed to evaluate the performance of the proposed converter. The proposed converter has achieved a power efficiency of 93.5% for the rated load condition, improving the power efficiency. The applications of the proposed converter are also discussed for the future research directions.

Anomalous Electroluminescence Characteristics of Perovskite Modules.

Spatially resolved photoluminescence (PL) and electroluminescence (EL) imaging technologies play a crucial role in evaluating the performance and stability of photovoltaic devices. However, their application in perovskite devices presents unique challenges. In this study, we report a discrepancy between the electrical performance of perovskite solar modules (PSMs) and the EL images. Following the application of a reverse bias voltage, we observed an increase in EL brightness associated with prolonged carrier lifetime and transport length. Furthermore, cross-sectional Kelvin probe force microscopy identified a significant potential increase primarily at the electron-transport layer (ETL) side after reverse bias, suggesting the presence of defective ETL/perovskite interfaces with filled hole traps. To address this EL mismatch, we proposed a mild reverse current recovery method aimed at aligning EL images with the cell performance without compromising device efficiency. This approach effectively mitigates discrepancies, ensuring alignment between the device performance and EL imaging. Our study underscores that caution is required when utilizing EL imaging to monitor spatial homogeneity in PSMs for future industrial production.

Efficiency and PF Improving Techniques with a Digital Control for Totem-Pole Bridgeless CRM Boost PFC Converters

A totem-pole bridgeless boost converter is one of the most promising topologies for the power factor correction (PFC) stage in high-power applications due to its high efficiency and small number of components. However, due to the totem-pole structure of the field-effect transistor (FET), very high switching loss occurs via the reverse recovery current of the body diode. To solve these problems, critical mode (CRM) control is a good solution to achieve the valley switching technique. With valley switching of CRM control, the switching loss decreases drastically with decreasing turn-on voltage. But, although the CRM control enables valley switching, it is hard to make an exact valley switching control with general zero-voltage detection circuits. In addition, when a frequency limitation scheme is applied to prevent a very high frequency, the switch can operate with hard switching at the boundary of the frequency limitation. Furthermore, the CRM boost PFC has a low PF and high total harmonic distortion (THD) under light-load conditions due to the large negative current resulting from resonance between the inductor and parasitic capacitance. It becomes worse at near-zero input voltage since the resonance current becomes larger near zero-input voltage. Therefore, in this paper, a totem-pole bridgeless boost PFC converter with high efficiency, high PF, and low THD is developed using TMS320F28377 by Texas Instruments. Based on the basic digital structure of the totem-pole bridgeless converter, the proposed controls help with exact valley switching, PF and THD improvement, and frequency limitation. The prototype converter is verified using 90–264 VAC input voltages and 450 V/3.3 kW output specifications.

Grid-patterned trench insulated gate bipolar transistor for 1.2 kV hybrid/plug-in hybrid electric vehicle silicon power devices

This paper reports on the newly developed silicon insulated gate bipolar transistor (IGBT) for Toyota’s fifth generation power devices. The designed IGBTs with a grid-patterned trench provide a lower on-state voltage (V ON ) while maintaining a wide mesa width. A successful 15% reduction of V ON was accomplished by enhancement of the two-dimensional hole storage effect. Furthermore, the grid-patterned trench IGBT merged with Schottky and multi-layered anode technology demonstrated a significant improvement in the trade-off curve between the reverse recovery current (I rr ) and V ON in a reverse conducting IGBT without a lifetime control process. As a result, the grid-patterned trench IGBT has contributed to reduce power loss and volume in the new power control units.

A Bidirectional Grid-Tied ZVS Three-Phase Converter Based on DPWM and Digital Control

In this paper, a bidirectional grid-tied ZVS three-phase converter is proposed. The circuit operation principle in both the rectifier and inverter modes was analyzed. The proposed topology could achieve zero-voltage switching in the six main switches and the auxiliary switch both in the rectifier mode and inverter mode. In addition, the reverse recovery current of body diodes in the main switches was also suppressed. Furthermore, in order to realize the ZVS control scheme under the grid-tied bidirectional power flow condition and reduce the number of switchings, a modified carrier-based discontinuous PWM was proposed to fit the bidirectional switching sequence. Finally, a 3 kW prototype was constructed. Some simulation and experimental results are presented to verify the validity of the proposed circuit topology and PWM control scheme.

1 mm2, 3.6 kV, 4.8 A NiO/Ga2O3 Heterojunction Rectifiers

Large area (1 mm2) vertical NiO/β n-Ga2O/n+ Ga2O3 heterojunction rectifiers are demonstrated with simultaneous high breakdown voltage and large conducting currents. The devices showed breakdown voltages (VB) of 3.6 kV for a drift layer doping of 8 × 1015 cm−3, with 4.8 A forward current. This performance is higher than the unipolar 1D limit for GaN, showing the promise of β-Ga2O3 for future generations of high-power rectification devices. The breakdown voltage was a strong function of drift region carrier concentration, with VB dropping to 1.76 kV for epi layer doping of 2 × 1016 cm−3. The power figure-of-merit, VB 2/RON, was 8.64 GW·cm−2, where RON is the on-state resistance (1.5 mΩ cm2). The on-off ratio switching from 12 to 0 V was 2.8 × 1013, while it was 2 × 1012 switching from 100 V. The turn-on voltage was 1.8 V. The reverse recovery time was 42 ns, with a reverse recovery current of 34 mA.

The effect of trapping sites introduced by 1 MeV proton irradiation on the reverse current recovery time in Ga2O3-based Schottky diodes

The reverse current recovery time is an important parameter of diodes, fast rectifiers and transistors which determined their high-frequency properties and area of application. Defects in the structure may sufficiency reduce the cutoff frequency and lead to overheating. The reverse recovery of the low currents in the α- and β-Ga2O3 Schottky diodes was measured and analyzed in this study. The reverse recovery time in the β-Ga2O3-based Schottky diode is limited mainly by the relaxation of the RC-circuit formed by the equivalent diode circuit and can be very low (20 nsec in this case). Irradiation can introduce some defects in the structure, which may act as deep levels and prolong the relaxation. We have demonstrated experimentally that increasing serial resistance of the circuit lead to an increase in the reverse recovery time. But we can point an additional part of relaxation that can be attributed to the emission from deep levels in the forbidden gap of the semiconductor. It is shown that prolongation increases with the reverse recovery time but saturates. In the α-Ga2O3-based structures the reverse recovery time measured after proton irradiation was 6 μsec, twice as high than it can be expected from RC-circuit relaxation time. These deep levels can be associated with interstitial oxygen atoms. The results obtained can be used to improve the technology of crystal growth to produce Schottky diodes with a high boundary frequency.

Analysis and Measurement of the Surge and Gate-Noise Voltages in a 1.7-kV IGBT Module With the Effect of Reverse-Recovery Current

This paper reveals the effect of the reverse-recovery current of a PIN diode on the surge and gate-noise voltage of an insulated-gate bipolar transistor (IGBT) in an inverter. Theoretical analysis reveals that the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$di/dt$</tex-math></inline-formula> of the reverse-recovery current, the switching speed of the IGBT and parasitic inductances affect the gate-noise voltage unlike a Schottky barrier diode (SBD) because resonance does not occur due to junction capacitances. The analysis also indicates that the surge voltage may not occur when the dc voltage is increased even though a large amount of surge voltage occurs in a low dc voltage region. A 1-kV testing setup was designed and constructed using a 1.7-kV 260-A IGBT module, which confirms the validity of the theoretical analysis.

A Nonisolated Single-Switch Coupled Inductor-Based DC-DC Converter with High Voltage Gain for Renewable Power Generation Systems

This article proposed a new structure of nonisolated high step-up DC-DC converter based on a three-winding coupled inductor and voltage multiplier cells (VMCs) for renewable energy systems applications such as PV power generation. Continuous input current with low ripple, common ground between output and input ports, low voltage stress across semiconductors, low number of components, high voltage gain, and high efficiency are the main advantages of the proposed converter. In order to further increase the output voltage, the windings of the coupled inductor are combined with VMC. The combination of coupled inductor and VMC technique leads to a high voltage gain with low duty cycle, and therefore the conduction loss of power switch is reduced. Additionally, the diodes’ reverse recovery currents are reduced which improve the presented topology’s efficiency. On the other hand, the used VMCs clamp the voltage, and the peak voltages across power switch are decreased. The operational modes, steady-state, and efficiency analysis are discussed. Also, to demonstrate the performance of the recommended converter, an experimental prototype with 580 W output power and 400 V output voltage with the switching frequency of 25 kHz is built and the experimental results are presented. Also, another 1 kW, 400 V with the switching frequency of 50 kHz has been implemented and tested.

4H-SiC LDMOS Integrating a Trench MOS Channel Diode for Improved Reverse Recovery Performance.

In this paper, a 4H-SiC lateral gate MOSFET incorporating a trench MOS channel diode at the source side is explored to improve the reverse recovery characteristics. In addition, a 2D numerical simulator (ATLAS) is used to investigate the electrical characteristics of the devices. The investigational results have demonstrated that the peak reverse recovery current is reduced by 63.5%, the reverse recovery charge is reduced by 24.5%, and the reverse recovery energy loss is decreased by 25.8%, with extra complexity in the fabrication process.

Design and analysis of PV fed high-voltage gain DC-DC converter using PI and NN controllers

The entire globe is now focused on generating power using solar photovoltaic (SPV) cells. The SPV is generating the DC power, by using power converters to satisfy the load requirement. In this article, a modified High-Voltage DC-DC converter was explained. The main intention of the modified converter is to decrease the reverse recovery currents and voltage stress across the switch, similarly, it generates high voltage at the converter output. The modified converter contains mainly-one diode, two capacitors, and Coupled Inductor (CI). When the converter switch comes under active state two capacitors are discharged in series, similarly when the converter switch under inactive state those two capacitors are charged in parallel through the coupled inductor (CI) energy so, to get a high voltage at the converter output side. To reuse the leakage-inductor (LI) energy of the CI with the help of a passive clamp circuit for reducing the voltage stress across the switch, similarly switch has less resistance so conduction losses also decreased. In this manner, the converter efficiency was improved and the diode recovery problem also solved. For the converter duty cycle controlling, Proportional-Integral (PI) and Neural Network (NN) controllers were used. The performance and analysis of the modified converter were described in detail with the help of both controllers. Here, 48 V is doubled to 400 V. By modifying the converter's parameters, its behavior is evaluated. In this converter, voltage spikes and reverse recovery currents should be minimal. The converter's switching pulse can be adjusted by PI or NN. The entire system was designed in MATLAB/ Simulink tool.

Significant Improvement of Switching Characteristics in a 1.2‐kV SiC SWITCH‐MOS by the Application of Kelvin Source Connection

Here we show, for the first time, a significant improvement of switching characteristics in a 1.2‐kV SiC Schottky barrier diode‐wall integrated trench MOSFET (SWITCH‐MOS) by the application of a Kelvin source (KS) connection. Turn‐on loss (Eon) was greatly reduced, with superior Eon‐dVDS/dt trade‐off characteristics at a moderate dVDS/dt value of about 10 kV/μs, because the SWITCH‐MOS with KS achieves a more suppressed peak reverse recovery current in embedded Schottky barrier diodes even at a higher dID/dt during the turn‐on operation than a state‐of‐the‐art SiC trench MOSFET with KS. This feature is a peculiarity of the SWITCH‐MOS when the KS connection is applied. Notably, measured and calculated results confirmed that the SWITCH‐MOS with KS had less dissipated turn‐off loss, especially in a second half of turn‐off regions (Region 2), than the SWITCH‐MOS w/o KS. However, owing to a higher negative turn‐off dID/dt, the MOSFET with KS has a larger drain surge voltage. With an optimum gate resistance, the SWITCH‐MOS with KS has 8% less total switching loss than a SWITCH‐MOS without KS, and 29% less than a state‐of‐the‐art SiC trench MOSFET with KS, while keeping a moderately low dVDS/dt of 10 kV/μs and suppressing a drain peak voltage of &lt;720 V. © 2022 Institute of Electrical Engineers of Japan. Published by Wiley Periodicals LLC.

Investigation and Reduction of EMI Noise Due to the Reverse Recovery Currents of 50/60 Hz Diode Rectifiers

Alternating current (ac)/ Direct current (dc) power converters with dc-bus filters can achieve high power density, however, it was found in this article that the reverse recovery currents of the 50/60 Hz diode bridge can lead to significant electromagnetic interference (EMI) noise violating EMI standards above 150 kHz. This article analyzed and quantified the mechanism of the EMI generation due to the reverse recovery currents of the 50/60 Hz diodes. It was found that although the reverse recovery of the 50/60 Hz diode bridge repeats at a frequency of 50/60 Hz, the EMI can be very high above 150 kHz due to the operating principle of electromagnetic compatibility spectrum analyzers. Two techniques were proposed to reduce the EMI due to the reverse recovery of the diode bridge. The analyses were validated by either simulations or experiments.

A Novel Carrier Scheme Combined with DPWM Technique in a ZVS Grid-Connected Three-Phase Inverter

In this paper, a novel switching scheme using discontinuous pulse-width modulation (DPWM) for a zero-voltage switching (ZVS) grid-connected three-phase inverter is proposed. ZVS in the main and auxiliary switches was achieved. Moreover, the reverse recovery currents of the anti-parallel diodes in the main switches were suppressed. A circuit analysis was performed, and a simulation was carried out. Furthermore, a prototype of the ZVS grid-connected three-phase inverter was constructed to verify the effectiveness of the proposed PWM control scheme. Both the simulation and experimental results verified the validity of the proposed PWM control scheme.

Soft-Switching High Static Gain Modified SEPIC Converter

The Modified SEPIC converter is a high performance dc-dc converter with intrinsic high static gain and reduced voltage stress in all semiconductors used in several applications as renewable energy sources, high power factor rectifiers, LED driver, battery chargers and high conversion ratio bidirectional dc-dc converters. However, most part of developments proposed using this topology is based on the hard-switching structure. The reduction of converter losses and electromagnetic interference using a soft-switching technique is important for high power density applications. A simple soft-switching structure is proposed in this paper suitable for the different configurations of Modified SEPIC converter, reducing the switching losses and the diodes reverse recovery current. The theoretical analysis, design procedure and experimental results of a 180 W prototype with 97% of efficiency at nominal output power using the proposed technique are presented in this paper.

High-Gain High-Efficiency DC–DC Converter with Single-Core Parallel Operation Switched Inductors and Rectifier Voltage Multiplier Cell

This paper proposes a high step-up high-efficiency converter, comprised of an active switched coupled-inductor cell. The secondary windings are integrated into a rectifier voltage multiplier cell in a boost-flyback configuration, allowing the operation with high voltage gain with low switches duty cycle and low turn-ratios on the coupled-inductors. Both coupled-inductors are integrated into a single core due to the parallel operation of the switches. The leakage inductances of the coupled-inductors are used to mitigate the reverse recovery currents of the diodes, while regenerative clamp circuits are used to protect the switches from the voltage spikes caused by the leakage inductances. The operation of the converter is analyzed both quantitatively and qualitatively, and the achieved results are validated through experimentation of a 400 W prototype. A 97.1% CEC efficiency is also reported.

A novel SiC trench MOSFET with integrated Schottky barrier diode for improved reverse recovery charge and switching loss

AbstractIn this paper, a novel silicon carbide (SiC) trench metal oxide semiconductor field effect transistor (MOSFET) with improved reverse recovery charge and switching energy loss is proposed and investigated utilising ISE‐TCAD simulations. The proposed structure features an integrated Schottky barrier diode on one side‐wall of the trench below the P‐base region, and an inserted thicker oxide layer between the polysilicon gate and source metal on one side‐wall of the trench. The simulation results show that compared with Infineon's CoolSiC™ Trench MOSFET, the proposed device decreases the gate charge Qg by 29.2%, leading to significantly improved figures of merit (Ron,sp × Qg). The reverse recovery charge Qrr and peak reverse recovery current (IRRM) are reduced by 64.1% and 66.0%, respectively. Meanwhile, the total switching energy loss decreases 36.7% for the dynamic performance.

An Interleaved ZVS High Step-Up Converter for Renewable Energy Systems Applications

A novel zero voltage switching (ZVS) interleaved high step-up converter for renewable energy systems is proposed in this article. By applying a switched capacitor mixed with coupled inductor and built-in transformer, the proposed converter achieves high voltage gain and minimized voltage stress across power switches. Both of the voltage gain and the voltage stress can be adjusted by the turns ratio of the coupled inductor and built-in transformer, which gives an extra degree of freedom for the converter design. Hence, operating at high duty cycles is avoided and low voltage rated semiconductors can be adopted, which reduce conduction losses and improve the circuit performance. Furthermore, an active clamp scheme is utilized to guarantee ZVS turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> for the power <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">MOSFET</small> s and the leakage inductances of the magnetic means help to provide zero current switching of the diodes. In such a case, switching losses are minimized and the reverse current recovery is alleviated. Accordingly, the proposed converter with reduced counterparts is a suitable candidate for high step-up and high power applications. Finally, a 600-W prototype with 24 to 480 V voltage conversion is built to demonstrate the performance of the proposed converter.

Single Input Single Output Two Level Isolated Dc-Dc Converter With Secondary Side Phase Shifting For Solar Applications

The isolated dc–dc converters with primary-side phase shifting (PPS) provides severely narrow soft-switching range for main devices in the primary side leg of full bridge converter. The leakage inductance of the high frequency transformer should be large enough for providing the energy needed for soft switching operations and also the idling power loss due to circulating current in the converter legs under large phase-shift angle, which makes reduction of conversion efficiency and complicated in designing the parameters of transformer. Furthermore, the turn-off diode commutations in the output-side rectifier are performed by hard-switching mode. To overcome all these drawbacks, a secondary side phase shifting (SPS) technique has been developed for two-level isolated DC-DC converter. This scheme provides wider soft switching range and reduced power loss due to elimination of circulating current in the primary side of high frequency transformer. In addition, SPS control also provide no reverse recovery current in diodes and hence no power losses in the secondary rectifier circuit. The control switches operate under soft switching even under rated load and short circuit conditions.&#x0D;