Resistivity Si Research Articles

Ge rich Esaki diodes with high peak to valley current ratios

We report on current voltage characteristics from Ge rich Si/SiGe/Si p +-i-n + interband tunnelling diodes epitaxially grown on highly resistive Si(001) substrates. A maximum peak to valley current ratio of 5.65 was obtained at room temperature for a diode containing a Si 0.55Ge 0.45 alloy layer. The latter value can be further increased to 7.6 at 5 K. A simple estimation of the maximum oscillation frequency demonstrates the potential of these devices as high speed oscillators. The Ge concentration can be further increased by incorporation of self-assembled Ge islands in the intrinsic region. A careful optimization of the intrinsic layer structure leads to a maximum peak to valley current ratio of 2.65 at room temperature. The obtained device parameters are promising for future digital applications.

Coupling between microstrip lines with finite width ground plane embedded in thin-film circuits

Three-dimensional (3-D) interconnects built upon multiple layers of polyimide are required for constructing 3-D circuits on CMOS (low resistivity) Si wafers, GaAs, and ceramic substrates. Thin-film microstrip lines (TFMS) with finite-width ground planes embedded in the polyimide are often used. However, the closely spaced TFMS fines are susceptible to high levels of coupling, which degrades the circuit performance. In this paper, finite-difference time domain (FDTD) analysis and experimental measurements are used to demonstrate that the ground planes must be connected by via holes to reduce coupling in both the forward and backward directions. Furthermore, it is shown that coupled microstrip lines establish a slotline type mode between the two ground planes and a dielectric waveguide type mode, and that the connected via holes recommended here eliminate these two modes.

Transmission Characteristics of Gaussian Monocycle Pulses for Inter-Chip Wireless Interconnections Using Integrated Antennas

Performance of integrated dipole antennas on Si substrates was investigated for inter-chip signal transmission in wireless interconnections for Si ultra-large scale integrated circuits (ULSI). Linear dipole antennas 4 mm long were fabricated on P-type Si substrates with a resistivity of 10 Ω·cm in an inter-chip stacked structure. Inter-chip antenna transmission gains were measured for the dipole antennas at a vertical distance of 2.86 mm and a horizontal distance of 3 mm when Si substrates with a resistivity of 2.29 kΩ·cm were inserted. A transmission gain of -30 dB and no dependence on vertical distance were observed. Gaussian monocycle pulses with a pulse width of 70 psec could be transmitted successfully in the inter-chip stacked structure. Antenna transmission gain and peak-to-peak voltage between Si chips were improved using a high resistivity Si substrate.

AlGaN/GaN/AlGaN DH-HEMTs grown by MBE on Si(1 1 1)

In this paper, we report on the properties of AlGaN/GaN/AlGaN HEMT structures grown by molecular beam epitaxy on resistive Si(1 1 1) substrates. The properties of the AlGaN buffer layer and the AlGaN/GaN HEMTs are presented. Finally, the static performances of long gate length devices demonstrate their interest for power applications.

Microwave loss mechanisms in Ba 0.25Sr 0.75TiO 3 films

Trilayer Au(Pt)/Ba 0.25Sr 0.75TiO 3/(Pt)Au thin film varactors are fabricated on high resistive Si substrate and characterized at dc, rf and microwave frequencies. In the frequency range of 10–45 GHz the varactors reveal relatively low losses, the loss tangent is less than 0.025 at 45 GHz. Due to the thick and highly conductive Pt/Au electrodes the metal losses are less than 10%. However, the loss tangent of the ferroelectric film is still 3–5 times higher than that in Ba 0.27Sr 0.73TiO 3 single crystal. The analysis of the dc field dependent loss tangent and permittivity in a wide frequency range show that these additional losses are mainly due to the charged defects. Extrapolation of measured low frequency (1 MHz) loss tangents to the microwave region using the power law ω 1/3 is in good agreement with the experiment. We assume that the oxygen vacancies within the grain boundaries of ferroelectric film act as charged defects and cause extrinsic microwave losses. The knowledge of the extrinsic loss mechanism and corresponding microstructure defects is useful in optimization of the varactor design, deposition, and/or annealing process and further improvement of the varactor performance.

3D Monte Carlo Analysis of Discrete Dopant Effects on Electron noise in Si Devices

This paper reports for the first time a simulation study of thermal noise in a simple test bed structure (three nanometric Si resistors) using an atomistic model and a continuum one. The 3D Monte Carlo atomistic approach that describes the electron-impurity interaction in the presence of discrete impurities was presented in (Barraud et al., 2002). This model has been successfully used to compute the electron mobility in Si resistors as a function of average doping concentration and to study the effect of impurity position in the channel of 50-nm MOSFET (Dolfus et al., 2004).

Some aspects of atom probe specimen preparation and analysis of thin film materials

Some of the factors in the preparation of atom probe specimens of metallic multilayer thin films have been investigated. A series of Ti/Nb multilayer films were sputtered deposited on n-doped Si [0 0 1] substrates with either 5 or 0.05 Ω cm resistivity. Each wafer was pre-fabricated into a series of 5 μm×5 μm× ≈80 μm island posts by photolithography and reactive ion etching. Once the film was grown on the wafer, a Si post was mounted to either a tungsten or stainless steel fine tip needle that was mechanically crimped to a Cu tube for handling. The specimen was then loaded into a Focus Ion Beam instrument where a sacrificial Pt cap was in situ deposited onto the surface of the film and subsequently annularly ion milled into the appropriate geometry. The Pt cap was found to be an effective method in reducing Ga ion damage and implantation into the film during milling. The multilayers deposited on the high resistivity Si exhibited uncontrolled field evaporation which lead to high mass tails in the mass spectra, a reduction in the mass resolution, high background noise, propensity for “flash-failure”, and a variation in the apparent layer thickness as the experiment elapsed in time. The multilayers deposited on lower resistivity Si did not suffer from these artifacts.

SAW characteristics of AlN films sputtered on silicon substrates

This article is focused on the analysis of the electroacoustic response of surface acoustic wave (SAW) filters made of aluminium nitride (AlN) thin films on various types of Si wafers. AlN films with (0 0 · 2) orientation were deposited by RF reactive sputtering of an Al target in Ar and N 2 admixtures on Si(1 0 0) and (1 1 1) wafers with resistivities ranging between 10 and 2000 Ω cm. The electroacoustic response of SAW filters with an acoustic wavelength of 40 μm was analysed by measuring the S ij parameters with a network analyser. We have determined that the out-of-band loss is directly related to the Si substrate resistivity, varying from 26 dB for 10 Ω cm to 55 dB for 2000 Ω cm. The SAW velocity depends on the orientation of the Si wafer, being approximately 4700 m/s for Si(1 1 1) and 5100 m/s for Si(1 0 0). The electroacoustic responses of the SAW filters were fitted by computations based on a simple circuital model that takes into account parasitic effects such as airborne electromagnetic coupling and conduction through the substrate. This procedure provides accurate values of the electromechanical coupling factor k 2 even for devices with poor characteristics. Good quality SAW filters of AlN on high resistivity Si(1 0 0) wafers with k 2 larger than 0.12% are demonstrated.

Thick film compositions based on titanium silicides for surge resistors

Thick film compositions based on three titanium silicides: TiSi 2, TiSi, and Ti 5Si 3 were prepared and investigated. Resistivities and temperature coefficients of resistance of the layers fired at 850 °C were measured in the temperature range −40 to +160 °C. The resistivities were 0.3–20 Ω per square for the layers containing Pd–Ag addition, fired in air and 20–300 Ω per square for those based exclusively on silicides, fired in nitrogen. Studies of the surge performance of Ti–Si resistors were carried out. The chosen compositions fired in air showed resistivity adequate to print resistors in the rectangular shape, more advantageous for surge resistors than the meander one, low TCR values and small changes in resistivity after high voltage pulsing.

High-quality p–n junction fabrication by ion implantation using the LPCVD amorphous silicon films

A novel technique of manufacturing high electric performance p–n junctions has been investigated in this paper. In the first step, amorphous silicon films (a-Si) with gradually changed thickness of 20, 36, 81.5 and 106nm have been deposited on low and high resistivity Si wafers by the LPCVD method. In the second step, the low energetic boron ions (11B+,10keV, 5×1015cm−2) were implanted. The quality of the fabricated junctions has been investigated.

AlGaN∕GaN HEMTs on Si(111) with 6.6 W∕mm output power density

Al/sub 0.27/Ga/sub 0.73/N/GaN HEMTs have been realised on resistive Si(111) substrates. The epitaxial structure was grown by MBE yielding a channel mobility of 1440 cm/sup 2//Vs (room temperature) and a sheet carrier density of 9.6e12 cm/sup -2/. Large signal evaluation of transistors with gate length of 0.25 /spl mu/m and gate width of 2/spl times/125 /spl mu/m yields up to 1.65 W CW output power at 2 GHz corresponding to a power density of 6.6 W/mm. These results are thought to represent the highest output power density so far achieved for GaN-based HEMTs on silicon substrates.

Coupling between microstrip lines embedded in polyimide layers for 3D-MMICs on Si

Three-dimensional circuits built on multiple layers of polyimide are required for constructing Si/SiGe monolithic microwave/millimetre-wave integrated circuits on CMOS (low resistivity) Si wafers. However, the closely spaced transmission lines are susceptible to high levels of coupling, which degrade circuit performance. In this paper, finite difference time domain (FDTD) analysis and measured characteristics of novel shielding structures that significantly reduce coupling between embedded microstrip lines are presented. A discussion of the electric and magnetic field distributions for the coupled microstrip lines is presented to provide a physical rationale for the presented results.

MBE growth of ALGaN/GaN HEMTS on resistive Si(1 1 1) substrate with RF small signal and power performances

In this paper, we report on the properties of GaN films and AlGaN/GaN HEMT structures grown by molecular beam epitaxy on resistive Si(1 1 1) substrates. The properties of the GaN buffer layer and the AlGaN/GaN HEMTs are presented. Finally, both static and high-frequency performances of sub-micron gate length devices are analyzed demonstrating their RF power capability.

AlGaN/GaN HEMTs on Resistive Si(111) Substrate: From Material Assessment to RF Power Performances

In this paper, we report on the properties of GaN films and AlGaN/GaN HEMT structures grown by molecular beam epitaxy on resistive Si(111) substrates. The properties of the GaN buffer layer and the AlGaN/GaN HEMTs are presented. Finally, both static and high frequency performances of submicron gate length devices are analysed demonstrating their RF power capability.

High transmission gain integrated antenna on extremely high resistivity Si for ULSI wireless interconnect

We have demonstrated the highest transmission gain integrated dipole antenna on Si reported so far, to use as an integrated antenna for the purpose of ULSI on-chip wireless interconnection. A 2-mm long and 10-/spl mu/m wide dipole antenna pair at a distance of 1 cm shows a transmission gain of -36.5 dB at 18 GHz, which is 20 dB higher than the previously reported gain. This large increase in gain is achieved by proton implantation on the Si substrate, which increased the resistivity from 10 /spl Omega/-cm to 0.1 M/spl Omega/-cm. It is also found that transmission gain can be maximized for a given resistivity by optimizing the Si substrate thickness or by inserting a low-k dielectric layer below the substrate.

AlGaN∕GaN HEMTs on resistive Si(111) substrate grown by gas-source MBE

Al0.3Ga0.7N/GaN high electron mobility transistor (HEMT) structures have been grown on resistive Si(111) substrate by molecular beam epitaxy (MBE) using ammonia (NH3). The use of an AlN/GaN intermediate layer allows a resistive buffer layer to be obtained. High sheet carrier density and high electron mobility are obtained in the channel. A device with 0.5 μm gate length has been realised exhibiting a maximum extrinsic transconductance of 160 mS/mm and drain-source current exceeding 600 mA/mm. Small-signal measurements show ft of 17 GHz and fmax of 40 GHz.

Radiation hard detectors from silicon enriched with both oxygen and thermal donors: improvements in donor removal and long-term stability with regard to neutron irradiation

Detectors made on the silicon wafers with high concentration of thermal donors (TD), which were introduced during the high temperature long time (HTLT) oxygenation procedure, have been investigated in the study of radiation hardness with regard to neutron irradiation and donor removal problems in irradiated high resistivity Si detectors. Two facts have been established as the evidence of radiation hardness improvement of HTLT(TD) Si detectors irradiated below ∼10 14 n/cm 2 compared to detectors made on standard silicon wafers: the increase of space charge sign inversion fluence (of 1 MeV neutrons) due to lower initial Si resistivity dominated by TD, and the gain in the reverse annealing time constant τ favourable for this material. Coupled with extremely high radiation tolerance to protons observed earlier (“beta zero” behaviour in a wide range of fluence), detectors from HTLT(TD) Si may be unique for application in the experiments with multiple radiations. The changes in the effective space charge density ( N eff) in as-irradiated detectors as a function of neutron fluence have been fitted using three different models. It has been shown that a new model with a universal donor removal rate for both materials, and considering the contribution of non-removable TD to the N eff provides good fit to the experimental data. A defect level related to TD has been observed in DLTS spectra of HTLT Si(TD) near T∼75 K. The physics of donor removal in irradiated silicon detectors is discussed.

Fabrication of very high resistivity Si with low loss and cross talk

We have used proton and As/sup +/ implantation to increase the resistivity of conventional Si (10 /spl Omega/-cm) and Si-on-quartz substrates, respectively. A high resistivity of 1.6 M/spl Omega/-cm is measured that is close to intrinsic Si and semi-insulating GaAs. Very low loss and cross coupling of 6.3 dB/cm and -79 dB/cm (10 μm gap) at 20 GHz are measured on these samples, respectively. The very high resistivity and improved rf performance are due to the extremely fast /spl sim/1 ps carrier lifetime stable even after a 400/spl deg/C annealing for 1 h. Little negative effect on gate oxide integrity is also observed as evidenced by the comparable stress-induced leakage current and charge-to-breakdown for 30 /spl Aring/ oxides.

Fabrication of sub-10nm Si-tip array coated with Si 3N 4 thin film for potential NSOM and liquid metal ion source applications

A nanosize Si tip array for various purposes has been fabricated on the n-type (100) low resistive (0.05 ohm-cm) Si wafers using electron beam direct writing method. The Si pillars with diameter less than 0.1 μm can be potentially utilized for a near field optical microscope tip or a liquid metal ion source application. SiO 2 layers with different thicknesses of 500nm and 1.5μm were initially thermally grown and followed by the fabrication of the 500nm dot array pattern with an electron beam(EB) resist SAL60. The oxide etch-mask layers with two different thicknesses of 500nm and 1.5μm were patterned with a magnetic field enhanced reactive ion etcher. The 500nm EB resist layer (SAL601) was used as an etch-mask for pattern formation during oxide etching. The complete removal of the EB resist and the erosion of the 1.5μm thick oxide dot-patterns resulted from the ∼270 second etching period was observed. On the other hand, no erosion of the oxide mask with the EB resist remaining was found after 90 sec. oxide etching by scanning electron microscope. The two step RIE processes on the sample with a 500nm oxide etch mask were carried out with an isotropic SF 6 etching followed by the anisotropic (Cl 2 + He) etching in order to fabricate tall Si-pillar arrays with ∼4 μm height. Finally, the 35nm Si 3N 4 coated Si-tip array using a low pressure chemical vapor deposition (LPCVD) was fabricated. The LPCVD Si 3N 4 coated Si-tip array will be micromachined into sub-100nm metal aperture for the potential near field optical sensor or into a sub-10nm Si or Si 3N 4 aperture for liquid metal ion source.

Improved microwave performance on low-resistivity Si substrates by Si/sup +/ ion implantation

Microwave characteristics of spiral inductors on low-resistivity Si substrates have been improved by implanting Si/sub 28//sup +/ ions. Spiral inductors fabricated on these implanted substrates demonstrate better Q-value and microwave performance. The Q-value of inductor enhanced 60% on the implanted substrates than that of low resistivity Si substrates. An equivalent circuit model of inductor has been evaluated to discuss the effect of substrate loss.