Resistive Random Access Memory Characteristics Research Articles

Enhancing high-speed digital systems: MVL circuit design with CNTFET and RRAM

Multiple Value Logic (MVL) circuits in high-speed digital systems can represent significantly more information than traditional binary logic circuits. The increasing demand for enhanced data storage capacity has driven the adoption of MVL circuits. However, designing MVL circuits presents challenges, particularly in achieving improved performance aligned with the desired threshold voltage. To address this challenge, harnessing carbon nanotube field-effect transistors (CNTFETs) has been instrumental in designing MVL circuits. CNTFETs offer distinct advantages due to their large resistors. Furthermore, substituting these resistors with Resistive Random Access Memory (RRAM) to implement Ternary logic circuits enhances storage capacity by enabling multiple resistance states within a single cell. This paper presents a novel MVL circuit design that leverages the unique characteristics of CNTFETs and RRAM. Additionally, gate implementation is explored using a Recurrent Neural Network − Long-Short Term Memory (RNN-LSTM) based Tasmanian Devil Optimization algorithm. The practical implementation uses Synopsis HSPICE software with CNTFET technology at 32 nm. A comprehensive performance analysis compares this approach with state-of-the-art solutions regarding delay, area, and power consumption. Significant reductions in area, power consumption, and transistor count are revealed with the proposed approach.

Resistive random access memory characteristics of NiO, NiO0.95, and NiO0.95/NiO/NiO0.95 thin films

Resistive random access memory characteristics of NiO, NiO0.95, and NiO0.95/NiO/NiO0.95 thin films

Effect of oxygen vacancy concentration on the resistive random access memory characteristics of NiOx (x = 1, 0.97, 0.94) thin films

Effect of oxygen vacancy concentration on the resistive random access memory characteristics of NiOx (x = 1, 0.97, 0.94) thin films

Effect of heat treatment on resistive switching memory characteristics of NiO nanodots of tens of nanometers shattered by AFM tips

The characteristics of resistive random access memory (RRAM) at the nanometer scale are increasingly important for RRAM cells with further miniaturization. We report the RRAM characteristics of NiO nanodots in the order of tens of nanometers. NiO nanodots of approximately 70 nm were created on a single-crystal Nb-doped SrTiO3 (Nb:STO) substrate by dip-pen nanolithography. For comparison, a NiO thin film was also deposited on the Nb:STO substrate by spin coating. To reduce the size of NiO nanodots, they were shattered by an atomic force microscope tip, obtaining nanodots of approximately 10 nm. Using a conductive atomic force microscope, we characterized the current according to the applied electric field of the NiO nanodots on the Nb:STO substrate with a capacitor configured of Pt/NiO/Nb:STO substrate. When compared with the NiO thin film, the forming voltage of the NiO nanodots decreased. In addition, the shattered NiO nanodots exhibited unipolar switching characteristics, and the forming and set/reset voltages decreased with the reduction in nanodot size. Furthermore, the NiO nanodots exhibited a substantially reduced forming and set/reset voltages after heat treatment in vacuum. We suggest that the oxygen-depleted layer formed on the surface of NiO nanodots by heat treatment plays a crucial role in the reduction of the forming and operation voltages.

Sol-Gel-Processed Y2O3-Al2O3 Mixed Oxide-Based Resistive Random-Access-Memory Devices.

Herein, sol-gel-processed Y2O3-Al2O3 mixed oxide-based resistive random-access-memory (RRAM) devices with different proportions of the involved Y2O3 and Al2O3 precursors were fabricated on indium tin oxide/glass substrates. The corresponding structural, chemical, and electrical properties were investigated. The fabricated devices exhibited conventional bipolar RRAM characteristics without requiring a high-voltage forming process. With an increase in the percentage of Al2O3 precursor above 50 mol%, the crystallinity reduced, with the amorphous phase increasing owing to internal stress. Moreover, with increasing Al2O3 percentage, the lattice oxygen percentage increased and the oxygen vacancy percentage decreased. A 50% Y2O3-50% Al2O3 mixed oxide-based RRAM device exhibited the maximum high-resistance-state/low-resistance-state (HRS/LRS) ratio, as required for a large readout margin and array size. Additionally, this device demonstrated good endurance characteristics, maintaining stability for approximately 100 cycles with a high HRS/LRS ratio (>104). The HRS and LRS resistances were also retained up to 104 s without considerable degradation.

Sol-Gel-Processed Y2O3 Multilevel Resistive Random-Access Memory Cells for Neural Networks.

Yttrium oxide (Y2O3) resistive random-access memory (RRAM) devices were fabricated using the sol-gel process on indium tin oxide/glass substrates. These devices exhibited conventional bipolar RRAM characteristics without requiring a high-voltage forming process. The effect of current compliance on the Y2O3 RRAM devices was investigated, and the results revealed that the resistance values gradually decreased with increasing set current compliance values. By regulating these values, the formation of pure Ag conductive filament could be restricted. The dominant oxygen ion diffusion and migration within Y2O3 leads to the formation of oxygen vacancies and Ag metal-mixed conductive filaments between the two electrodes. The filament composition changes from pure Ag metal to Ag metal mixed with oxygen vacancies, which is crucial for realizing multilevel cell (MLC) switching. Consequently, intermediate resistance values were obtained, which were suitable for MLC switching. The fabricated Y2O3 RRAM devices could function as a MLC with a capacity of two bits in one cell, utilizing three low-resistance states and one common high-resistance state. The potential of the Y2O3 RRAM devices for neural networks was further explored through numerical simulations. Hardware neural networks based on the Y2O3 RRAM devices demonstrated effective digit image classification with a high accuracy rate of approximately 88%, comparable to the ideal software-based classification (~92%). This indicates that the proposed RRAM can be utilized as a memory component in practical neuromorphic systems.

Modeling the conduction mechanisms of intrinsic multi-level states in HfOx-based resistive random access memory

Multi-level cell storage technology based on resistive random access memory (RRAM) with multi-level state characteristics is more attractive in achieving low-cost ultra-high-density nonvolatile memory. Although a large number of literatures have reported the multi-level state characteristics of RRAM, so far there is no unified model that can well explain the intrinsic reasons for the existence of intermediate resistance state (IRS) and the switching mechanism between different resistance states. Multi-level state characteristics are observed by I–V characteristic measurements on RRAM with TiN/HfOx/barrier layer/TiN stacks fabricated using a commercialized 28 nm CMOS process. Compared to other published resistive switching models, the proposed model based on trap-assisted tunneling is more consistent with the measured. The model can reproduce the multi-level state characteristics based on the mechanism that interaction between defects and oxygen vacancies at the interface of HfOx and TiN electrode, resulting in the formation of multiple weak conductive filaments. Furthermore, the wide spread of high resistance state (HRS) and the switching between HRS and IRS are determined by the distance of tunneling gap. As HfOx-based RRAM will soon be commercialized, it is becoming very urgent to clarify the switching mechanisms of multi-level state characteristics and propose a universal model. Consequently, this work satisfied the current demand and significantly advanced the understanding and development of commercialized, cost-effective, high-density multi-bit HfOx-based RRAM technology.

Hybrid Precision in Resistive Memory-Based Convolutional Kernel for Fault-Resilient Neuromorphic Systems

As simple convolution computation is intensively and iteratively performed to extract features from input images, cross-point arrays with resistive random access memory (RRAM) serving as a kernel weight can accelerate the relevant mathematical operations in hardware. However, considering actual RRAM characteristics, either variability or unexpected permanent failure from the filamentary switching mechanism is observed, degrading recognition performance. This study investigates the impact of fault in a conventional kernel structure, where two adjacent columns in the array represent a single weight, on feature extraction using MATLAB. First, the fault types of HfO <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{\textit{x}}$</tex-math> </inline-formula> -based multilevel RRAM is categorized. The results reveal that the unidirectional fault of RRAM primarily worsens the accuracy of image recognition. This is because the subtraction of negative weights from positive ones is crucial for identifying the edges of images through convolution operations. Therefore, we exploit a kernel structure, in which a single column dedicated to negative weights is located next to a matrix of positive weights. In addition, we reduce the weight precision for negative weights, while quantizing positive weights to higher bits. By mitigating the subtraction errors achieved by the kernel structure with hybrid precision, we improved fault tolerance, minimizing accuracy degradation.

Low power highly flexible BiFeO3-based resistive random access memory (RRAM) with the coexistence of negative differential resistance (NDR).

We demonstrated the resistive random access memory characteristics for Cu (top contact)/BFO/PMMA (active layer)/ITO (bottom electrode)/PET sheet as a flexible substrate device configuration. The device showed non-volatile bipolar resistive switching characteristics with good repeatability and the coexistence of NDR for 100 cycles or more with 0.28/3.43 mW power consumption for 1st/100th cycles. The device retains its read state for 104 s or more and switches from LRS to HRS or vice versa for 103 cycles with a pulse width of 100 ms for a write-read-erase-read pulse without affecting the memory characteristics. The Weibull distribution suggests that a set state is more stable than the reset state with shape factor β = 25.20. The device follows Ohmic behavior for the lower applied external field and Child square and Schottky emission for the higher external fields. The Joule heating, Sorets, and Fick's forces are responsible for the formation and rupturing of ionic filament. The coexistence of resistive switching and flexible strength of the device sustains the bending curvature of infinity, 0.2 cm, 1 cm, 1.7 cm, and 2.2 cm. The memory characteristics are retained under tensile conditions for 100 cycles or more. More interestingly, the power consumption for sustaining the NDR region with bending (19 μW) is much lower than without bending (0.19 mW). Thus, this study provides the possibility of integrating BFO with flexible substrates suitable for hybrid organic/inorganic memory structures.

Studies on Oxygen Permeation Resistance of SiCN Thin Film and RRAM Applications

In this study, a silicon carbon nitride (SiCN) thin film was grown with a thickness of 5~70 nm by the plasma-enhanced chemical vapor deposition (PECVD) method, and the oxygen permeation characteristics were analyzed according to the partial pressure ratio (PPR) of tetramethylsilane (4MS) to the total gas amount during the film deposition. X-ray photoelectron spectroscopy (XPS), Fourier transform infrared spectroscopy (FT-IR), and X-ray reflectivity (XRR) were used to investigate the composition and bonding structures of the SiCN film. An atomic force microscope (AFM) was used to examine the surface morphology of the SiCN films to see the porosity. The analysis indicated that Si-N bonds were dominant in the SiCN films, and a higher carbon concentration made the film more porous. To evaluate the oxygen permeation, a highly accelerated temperature and humidity stress test (HAST) evaluation was performed. The films grown at a high 4MS PPR were more susceptible to oxygen penetration, which changed Si-N bonds to Si-N-O bonds during the HAST. These results indicate that increasing the 4MS PPR made the SiCN film more porous and containable for oxygen. As an application, for the first time, SiCN dielectric film is suggested to be applied to resistive random access memory (RRAM) as an oxygen reservoir to store oxygen and prevent a reaction between metal electrodes and oxygen. The endurance characteristics of RRAM are found to be enhanced by applying the SiCN.

Exploiting Read Current Noise of TiOx Resistive Memory by Controlling Forming Conditions for Probabilistic Neural Network Hardware

Conductance variations of resistive random-access memory (RRAM) are significant challenges that hinder the accurate inference of neural network (NN) hardware. In this study, we exploit the read noise of the RRAM as an active computational enabler for implementing probabilistic NN. As electrical characteristics of RRAM are directly related to the properties of conductive filament (CF), we statistically explore read current of TiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> -based RRAM with different forming conditions and explain the results by linking the CF model. In addition, an array mapping scheme to transfer weights to one transistor-one RRAM (1T1R) array is experimentally demonstrated. Through NN simulations, we verify that the probabilistic NN shows promising results on nonlinear classification problem avoiding overconfidence compared with deterministic NN.

FangTianSim: High-Level Cycle-Accurate Resistive Random-Access Memory-Based Multi-Core Spiking Neural Network Processor Simulator.

Realization of spiking neural network (SNN) hardware with high energy efficiency and high integration may provide a promising solution to data processing challenges in future internet of things (IoT) and artificial intelligence (AI). Recently, design of multi-core reconfigurable SNN chip based on resistive random-access memory (RRAM) is drawing great attention, owing to the unique properties of RRAM, e.g., high integration density, low power consumption, and processing-in-memory (PIM). Therefore, RRAM-based SNN chip may have further improvements in integration and energy efficiency. The design of such a chip will face the following problems: significant delay in pulse transmission due to complex logic control and inter-core communication; high risk of digital, analog, and RRAM hybrid design; and non-ideal characteristics of analog circuit and RRAM. In order to effectively bridge the gap between device, circuit, algorithm, and architecture, this paper proposes a simulation model—FangTianSim, which covers analog neuron circuit, RRAM model and multi-core architecture and its accuracy is at the clock level. This model can be used to verify the functionalities, delay, and power consumption of SNN chip. This information cannot only be used to verify the rationality of the architecture but also guide the chip design. In order to map different network topologies on the chip, SNN representation format, interpreter, and instruction generator are designed. Finally, the function of FangTianSim is verified on liquid state machine (LSM), fully connected neural network (FCNN), and convolutional neural network (CNN).

Fabrication of Zinc Oxide Resistive Random-Access Memory on a Flexible Polyimide Substrate with Different Thicknesses

In this study, a resistive random-access memory (RRAM) with a metal-insulator-metal structure was fabricated on polyimide substrates with different thicknesses, and the insulating layer was deposited with zinc oxide material by the sol-gel method. The electrical properties of the RRAM devices were evaluated using bending tests. In the bending tests, the operating electric field increased and the retention time decreased; nevertheless, the electrical properties of the device with a thicker polyimide substrate were less affected. The results of this study will help improve the characteristics of RRAMs on soft boards.

RRAM for Compute-in-Memory: From Inference to Training

To efficiently deploy machine learning applications to the edge, compute-in-memory (CIM) based hardware accelerator is a promising solution with improved throughput and energy efficiency. Instant-on inference is further enabled by emerging non-volatile memory technologies such as resistive random access memory (RRAM). This paper reviews the recent progresses of the RRAM based CIM accelerator design. First, the multilevel states RRAM characteristics are measured from a test vehicle to examine the key device properties for inference. Second, a benchmark is performed to study the scalability of the RRAM CIM inference engine and the feasibility towards monolithic 3D integration that stacks RRAM arrays on top of advanced logic process node. Third, grand challenges associated with in-situ training are presented. To support accurate and fast in-situ training and enable subsequent inference in an integrated platform, a hybrid precision synapse that combines RRAM with volatile memory (e.g. capacitor) is designed and evaluated at system-level. Prospects and future research needs are discussed.

Resistive random access memory characteristics of NiO thin films with an oxygen-deficient NiO0.95 layer

Herein, we characterize resistive random access memory (RRAM) devices containing an oxygen-deficient layer. The RRAM devices consist of multiple layered NiO thin films that consist of an oxygen-deficient NiO0.95 layer, within a NiO/NiO0.95/NiO layer structure. The NiO thin-film layers were deposited on Pt/Ta/SiO2/Si substrates by radio frequency magnetron sputtering. The stoichiometry and thickness of the NiO triple-layer thin films were determined by Auger electron spectroscopy. We fabricated RRAM capacitors with a structure of Pt/NiO/NiO0.95/NiO/Pt to investigate the resistive switching characteristics. The presence of an oxygen-deficient layer significantly lowers the forming and SET/RESET voltages compared to a Pt/NiO/Pt RRAM capacitor. This reduces the energy required to form conducting filaments in the oxygen-deficient layer. Moreover, the forming and SET/RESET voltages exhibit reduced dispersion due to the relatively high oxygen vacancy density in the oxygen-deficient NiO0.95 layer.

Insight into interface behavior and microscopic switching mechanism for flexible HfO2 RRAM

A high-performance flexible HfO2 resistive random access memory (RRAM) device is fabricated herein on a polyimide (PI) substrate, and the effect of different top electrodes (TE) on RRAM characteristics were investigated with the same TiN bottom electrode. Compared with Al or Ni TEs, the switching characteristics of devices with indium tin oxide (ITO) TEs are improved, producing a low power consumption (50 µA@0.5 V for SET and 15 µA@-0.2 V for RESET) and high DC endurance cycles (>3 × 105). The flexible devices show stable resistive properties under different bending radii of up to 4 mm, and over 1.5 × 105 writing/erasing cycles are confirmed after bending the device 1,000 times. The switching mechanism based on ITO/HfO2 interfacial reactions is constructed, and the microscopic oxygen vacancies distribution under directional external biases is elaborated according to the C-V test under various frequencies, HRTEM and XPS data. Furthermore, it is revealed that the interface layer between the TE and the switching layer is the key role, which can maintain switching behaviors and improve electronic properties with the presence of a mechanical stress because of the stable interfacial reactions caused by Sn4+ in ITO film.

Electric field control of magnetization reversal in conducting filament nanostructures in NiO resistive random access memory

Abstract Magnetic nanostructures are attracting attention for use in magnetic storage applications because of the magnetization reversal that occurs when information is read and written. Here, we reveal that conducting filament (CF) nanostructures undergo magnetization switching on NiO thin film. We fabricated epitaxial NiO thin films deposited on a single-crystal Cu substrate through the pulsed laser deposition method. The resistive random access memory characteristics indicated that the current-voltage properties of the Au/NiO/Cu capacitor showed unipolar resistive switching behavior. Using conducting atomic force microscopy (CAFM), various CF nanostructures, i.e., nanodots, nanorods, and nanorings, were formed on the NiO thin film. We studied the reversal in the direction of the magnetization induced by the electric field in the CF nanorods and nanorings on the NiO thin film by using the tip of the CAFM. The CF nanostructures on the NiO thin film have ferromagnetic properties. The coercive field of the nanorings is larger than that of the nanorods, based on Ampere’s law. Our results showed that the magnetic field induced by applying voltage to the tip of the CAFM enables magnetization switching in the nanorods and nanorings.

Resistive Memory‐Based In‐Memory Computing: From Device and Large‐Scale Integration System Perspectives

In‐memory computing is a computing scheme that integrates data storage and arithmetic computation functions. Resistive random access memory (RRAM) arrays with innovative peripheral circuitry provide the capability of performing vector‐matrix multiplication beyond the basic Boolean logic. With such a memory–computation duality, RRAM‐based in‐memory computing enables an efficient hardware solution for matrix‐multiplication‐dependent neural networks and related applications. Herein, the recent development of RRAM nanoscale devices and the parallel progress on circuit and microarchitecture layers are discussed. Well suited for analog synapse and neuron implementation, RRAM device properties and characteristics are emphasized herein. 3D‐stackable RRAM and on‐chip training are introduced in large‐scale integration. The circuit design and system organization of RRAM‐based in‐memory computing are essential to breaking the von Neumann bottleneck. These outcomes illuminate the way for the large‐scale implementation of ultra‐low‐power and dense neural network accelerators.

Overview of Resistive Random Access Memory (RRAM): Materials, Filament Mechanisms, Performance Optimization, and Prospects

Because conventional nonvolatile memory is limited by process technology and physical size, resistive random access memory (RRAM) gradually enters the field of view due to its simple structure, fast program/erase speed, low power consumption, and so on. This review article summarizes the materials, filament mechanisms, performance optimization, and application prospects of RRAM structures to provide readers with a reference for future investigation. The filament mechanisms, which involve the electrochemical metallization mechanism (ECM), valence change mechanism (VCM), and thermochemical mechanism (TCM), of RRAM devices are particularly highlighted. The parameters that determine the RRAM characteristics such as operating voltages, ON/OFF ratio, endurance, and data retention are improved by incorporating the three methods: 1) “interface engineering”, 2) element doping of functional materials, and 3) introduction of low‐dimensional materials. In the last section, a brief introduction to the future RRAM application prospects and challenges is provided.

Comprehensive numerical modeling of filamentary RRAM devices including voltage ramp-rate and cycle-to-cycle variations

The equilibrium ON and OFF states of resistive random access memory (RRAM) are due to formation and destruction of a conducting filament. The laws of thermodynamics dictate that these states correspond to the minimum of free energy. Here, we develop a numerical model that, through the minimization of free energy at a given voltage, determines the filament parameters and thus the electric current. Overall, it simulates the current-voltage (I-V) characteristics of RRAM. The model describes mutual transformations of RRAM states through SET (ON→OFF) and RESET (OFF→ON) processes. From the modeling perspectives, these states and processes constitute four programing modules constructed here in COMSOL multiphysics software tackling the electrodynamic and heat transfer equations and yielding RRAM energy and I-V. Our modeling uniquely reproduces the observed I-V varying with voltage ramp-rates. This is achieved by accounting for the ramp-rate dependent activation energy of conduction. The underlying mechanism is due to the deformation interaction caused by the double well atomic potentials universally present in amorphous materials and having exponentially broad distribution of relaxation times. As another unique feature, our modeling reproduces the observed cycle-to-cycle variations of RRAM parameters attributed to the lack of self-averaging in small ensembles of double well potentials and electronic states in geometrically small (nano-sized) RRAM structures.