Reflow Profile Research Articles

“Drop-in” Conventional Reflow Oven Sinter-Able Pressure-Less Silver Paste for Die-Attach Assembly Mass Production

Abstract During the experiment, pressure-less silver sintering pastes that can sinter using a conventional reflow oven for die-attach applications were developed. This development makes it possible to produce die-attach assemblies in a continuous and high throughput fashion for mass production. Different reflow profiles such as “ramp-up and peak” and “ramp-up and plateau” types were tested and high shear strength joints with no voids were obtained. For each sample, the sintering time was around twelve minutes or less, which is about one order of the magnitude that is presently used for box oven sintering time. Two sintering pastes, A and B, were developed. Paste A has been used to study the relationship between processing conditions (reflow oven sintering temperature and atmosphere such as air vs nitrogen) and the die-attach structures (with varied substrate materials such as copper or active metal brazing (AMB) and surface metallization such as copper, silver, or gold). Under the same combined conditions of sintering temperature, atmosphere, and substrate type, the Ag metalized substrate gave the strongest joint shear strength. In comparison, Au metalized substrate displayed the weakest strength because of the formation of a “depletion layer” as a result of the diffusion of silver on gold surface, leaving behind a weak connection between sintered silver and Ag-Au layer. For the above noble metal metallized surfaces, sintering in air normally results in stronger joint shear strength than that in a nitrogen atmosphere. On the bare Cu metallized surface with nitrogen sintering, increasing the sintering temperature and changing to paste B are two ways to increase joint shear strength. Sintering on an AMB substrate displays around 10Mpa higher shear strength than that on a Cu substrate, indicating the importance of surface morphology. When sintering at 250°C in air, oxygen can help accelerate the inter-diffusion between Cu substrate and sintered Ag and enhance interfacial adhesion, increasing the shear strength. A higher sintering temperature reduces the adhesion due to the formation of large amounts of copper oxide; therefore, control of the optimum temperature range is key to obtaining a strong joint in air.

Strain Rate Sensitivity of Mixed SAC-SnBi Solder Joints

Abstract As the electronics industry continues to evolve a concerted effort has developed to implement lower melting point solders. The ability to minimize the thermal exposure that an assembly is subjected to affords significant benefits with respect to both the reliability and the materials that can be used. One of the most popular low melt solder alloys currently being investigated by the industry is the Bi-Sn eutectic system, which has a melting point of 139°C. The BiSn system itself is not particularly novel as it was posited as a SAC alternative during the initial shift from Pb based solders. While a body of knowledge currently exists regarding this system, and the near eutectic variant BiSnAg, there are still concerns regarding its ductility, especially as a function of thermal exposure and strain rate. Bismuth is widely acknowledged as a brittle element and its presence in such quantities raises concerns of not just Cu6Sn5 embrittlement but also solder fragility in high strain rate types of environments. A challenge with regards to near term implementation is that most packages are not available with BiSn solder bumps. Therefore, it will be necessary to use components already balled with SAC 305 solder. This means that the resulting solder interconnect, reflowed below conventional SAC reflow temperatures, will form a type of mixed hybrid microstructure. This non-equilibrium microstructure will be composed of two regions, one Bi-rich region which is well past saturation and a second region which is Bi-deficient. It is of specific industrial interest then to not just investigate the BiSn solder system but also within the context of a realistic mixed interconnect. Recent work by several researchers has shown that this hybrid microstructure is unstable and quite active with respect to the movement and localized concentration of the Bismuth. The degree of mixing of these two regions has been shown to be highly dependent upon reflow temperature and the paste to ball volume ratio. Mixed SAC-BiSn solder joints were formed by placing SAC 305 spheres on BiSn paste deposits for a paste to ball volume ratio of .18. These samples were then reflowed at either 175°C or 200°C. SAC 305 control samples were also made using a conventional Pb-free reflow profile with a peak temperature of 247°C. A 22 mil Cu-OSP pad on a 1.0 mm thick FR4 substrate was used for all samples. A selection of the solder joints were then isothermally aged at 90°C for 200 hours. Using a joint level micromechanical tester, ball shear tests were conducted at a range of strain rates for samples in the as-reflowed and aged state. Using this information, the strain rate sensitivity of the interconnects was mapped and correlated with the observed failure modes. Investigations into the fracture mechanisms were conducted by examining the shear fracture surface with optical and scanning electron microscopy. Additionally, the evolution of the microstructure was characterized. Results showed a clear transition from ductile solder failure to a brittle separation failure at the higher strain rates.

Selective Soldering on Printed Circuit Boards with Endogenous Induction Heat at Appropriate Susceptors

In this work, methods for the endogenous heating of printed circuit boards (PCBs) by means of inductive losses in built-in susceptors are presented. Two basic types of inductive heating were studied, the heating in the transversal field and the heating in the longitudinal field. Elementary test stands were constructed and characterized for both field geometries. These setups were then used to analyze various susceptor materials like copper and aluminum for the transversal field heating and nickel and iron for the longitudinal field heating. To demonstrate the soldering processes by means of inductive heating, exemplary processes were conducted on both test stands by emulating a standard solder reflow profile. The limitations of using induction heating on printed circuit boards are illustrated by component lead frames, which also heat up in the inductive field and can hence be damaged.In short, this paper presents a selective heating method, based on induction heating, for printed circuit boards. Furthermore possible setups for implementing this heating method are described.

Fluxes Effective in Suppressing Non-Wet-Open at BGA Assembly

Abstract With the advancement in miniaturization, the die is getting thinner and the solder bump is getting smaller for BGAs. Consequently, the thermal warpage is getting more severe due to coefficient of thermal expansion mismatch between die and molding compound, and often resulted in non-wet-open (NWO) at BGA assembly. NWO has been ailing the industry for a long time, and costly rework is required to remove the problem. In this study, a “cold-welding barrier” method has been developed in suppressing NWO. At BGA assembly, after printing solder paste onto PCB, the BGA bumps are dipped into creamy flux prior to placing onto paste printed. This flux pickup will effectively suppress NWO by serving as cold-welding barrier. A low activity flux is considered having as wider reflow profile window than a medium activity flux. Alternatively, the solder bump of BGA can be pre-coated with solid flux at packaging house. The effect of solid-flux coating is equally effective in suppressing NWO. As cold welding barrier, both no-clean flux and water soluble flux are considered physically effective. However, a water soluble flux should not be used together with a no-clean solder paste based on compatibility and reliability consideration. Furthermore, only no-clean solid flux is recommended for solder bump coating purpose, mainly based on moisture pickup issue associated with water soluble flux.

Real-time profiling of reflow process in VPS chamber

PurposeThis paper aims to present a new method of real-time monitoring of thermal profiles applied in vapour phase soldering (VPS) reflow processes. The thermal profile setting is a significant variable that affects the quality of joints. The method allows rapid achievement of a required thermal profile based on software control that brings new efficiency to the reflow process and enhanced joint quality, especially for power electronics.Design/methodology/approachA real-time monitoring system based on computerized heat control was realized in a newly developed laboratory VPS chamber using a proportional integral derivation controller within the soldering process. The principle lies in the strictly accurate monitoring of the real defined reflow profile as a reference.FindingsVery accurate maintenance of the required reflow profile temperature was achieved with high accuracy (± 2°C). The new method of monitoring and control of the reflow real-time profiling was verified at various maximal reflow temperatures (230°C, 240°C and 260°C). The method is feasible for reflowing three-dimensional (3D) power modules that use various types of solders. The real-time monitoring system based on computerised heat control helped to achieve various heights of vapour zone.Originality/valueThe paper describes construction of a newly developed laboratory-scale VPS chamber, including novel real-time profiling of the reflow process based on intelligent continuously measured temperatures at various horizontal positions. Real-time profiling in the laboratory VPS chamber allowed reflow soldering on 3D power modules (of greater dimensions) by applying various flux-less solder materials.

Evaluating the Effect of SMT Material & Process Variables on Voiding Under QFNs

Abstract Voiding under bottom terminated components (BTCs), such as quad-flat no-lead (QFN) components, is a problem which many circuit board assembly houses face on a daily basis. Such components have become very popular in circuit board assembly due to many of their benefits, including their small form factor, excellent thermal and electrical performance, easy PCB trace routing, and reduced lead inductance. Outgassing of flux in the solder paste used to attach QFNs to the PCB during reflow causes voiding under the components, as the gasses cannot escape because there is virtually no standoff under the QFNs. Voiding can have several serious effects on the performance of QFNs including reduced mechanical strength of the solder joint and hot spots under the QFN thermal pad because the voids do not conduct heat well. There are many process methods which are utilized in an attempt to mitigate the voiding issue, such as windowpane stencil designs and reflow profile. In this study, we will evaluate the effect of several other variables on voiding under QFNs, including solder paste powder mesh size, PCB surface metallization, and the reflow environment.

Alternative Metallurgies for MEMS Lid Seal

Abstract MEMS devices are a segment of the electronics industry enjoying explosive growth. With the advent of the internet of things (IoT), the trajectory for growth will continue to be steep and price pressures on both the devices and packaging will be intense. Current MEMS packaging schemes rely heavily on an architecture that employs a metal-can or laminate “lid” attached to the device package with a solder ring. This ring serves to connect the package elements together mechanically and to protect the device from noise (electronic or acoustic) and environmental damage. Like most modern electronic devices, MEMS devices are subject to the challenges imposed by the requirement for lead-free packaging. As with many devices, solder connections formed within the package have a similar composition, and therefore a similar reflow profile, to the solder used to attach the packaged components to a substrate. Devices that yield well at the manufacturer are thus susceptible to field failure at the assembly site induced by remelting of the solder within the package during assembly reflow. Unlike in SIP packages where the solder joints in the module are often encased in mold compound, the ring seal in MEMS devices is exposed and unreinforced resulting in failures such as lid shift, solder flow or flux contamination in the device cavity, and package deconstruction - particularly during rework. These type of post-fabrication yield losses can be very costly. Transient liquid phase (TLPS) sintering paste compositions are a new class of solder replacement materials that can be processed at typical reflow temperatures, but which do not remelt when subjected to subsequent thermal excursions. TLPS pastes combine solder alloy particles and reactive metal particles in proportions such that the solder ‘thermosets’ during a typical solder reflow cycle. This ‘thermosetting’ behavior results in a joint that does not remelt at the original reflow temperature, and thus enables the highly reliable electrical interconnect essential for assemblies that will undergo subsequent reflow excursions. TLPS pastes are similar to solders in many respects. The electrical, thermal and mechanical performance is similar to conventionally used tin-based solders. The TLPS pastes are stored and applied like solder pastes. The reflow cycles used to form the TLPS paste joints are also similar to those for forming solder joints. However, unlike solder, TLPS materials do not change shape during reflow or wet substrates beyond the deposition footprint. Also unlike solder, the metals within the bulk of the TLPS interconnect react with one another resulting in a stable interconnect with a thermally robust bonding structure to joining surfaces, even after subsequent thermal cycles. These attributes present both unique opportunities and unique challenges for addressing MEMS lid seal applications. This paper will explore the key material and engineering challenges for implementation of TLPS paste in MEMS lid seal applications.

Wettability study of lead free solder paste and its effect towards multiple reflow

Nowadays, wafer bumping using solder paste has come into focus as it provides a low cost method. However, since the industries are moving towards lead-free electronic packaging, a new type of no-clean flux was produced specifically for lead-free solder paste. Therefore, this study is used to evaluate the wettability of two different types of no-clean flux onto copper substrate. Besides, its effect towards multiple reflow was also studied. Reflow soldering was conducted for both types of solder paste that contained different type of no-clean flux for up to double reflow. Two different reflow profile was used. The results showed that the Flux A exhibit better soldering performance after first and second reflow soldering. In addition, type of intermetallic compound (IMC) found after first reflow remain the same even after second reflow which was Cu-Sn based. This is shows that Flux A manage to control the diffusion process which will finally leads to a better solder joint performance. Nevertheless, mechanical testing should be carried out in order to evaluate the solder joint strength.

Modeling of moisture over-saturation and vapor pressure in die-attach film for stacked-die chip scale packages

Die-attach film failure during soldering reflow is of particular concern for reliability of 3D ultra-thin stacked-die chip scale packages (CSPs), as extremely high vapor pressure can be generated from vaporized moisture to cause severe damages. Under rapid heating, pressure-driven moisture vapor flow could become as significant as concentration-driven diffusion, and should be included in moisture transport models. In this study, a convection–diffusion (CD) model is presented for analyzing vapor pressure and moisture behavior of soft die-attach films for 3D CSPs, with both vapor flow and the effect of temperature on saturated moisture content considered. By using a 1D model according to experimental observations, the over-saturation phenomenon in the thin film and vapor pressure evolution are investigated. It is found that the reflow profiles and substrate thickness could have great impact on the magnitude of vapor pressure, which agrees well with the experimental results. Sensitivity analyses show that a high vapor permeability and a large porosity could lead to low vapor pressure. Being a vapor pressure-based model, the CD model is suitable to study multiple-material systems without discontinuity issue at the material boundary. It is concluded that the CD model could serve as an effective method for predicting vapor pressure and moisture behaviors during soldering reflow for 3D stacked-die CSPs.

Realistic warpage evaluation of printed board assembly during reflow process

Purpose – This paper aims to develop an estimation tool for warpage behavior of slim printed circuit board (PCB) array while soldering with electronic components by using finite element method. One of the essential requirements for handheld devices, such as smart phone, digital camera, and Note-PC, is the slim design to satisfy the customers’ desires. Accordingly, the printed circuit board (PCB) should be also thinner for a slim appearance, which would result in decreasing the PCB’s bending stiffness. This means that PCB deforms severely during the reflow (soldering) process where the peak temperature goes up to 250°C. Therefore, it is important to estimate PCB deformation at a high temperature for thermo-mechanical quality/reliability after reflow process. Design/methodology/approach – A numerical simulation technique was devised and customized to accurately estimate the behavior of a thin printed board assembly (PBA) during reflow by considering all components, including PCB, microelectronic packages and solder interconnects. Findings – By applying appropriate constraints and boundary conditions, it was found that PBA’s warpage can be accurately predicted during the reflow process. The results were also validated by warpage measurement, which showed a fairly good agreement with one and another. Research limitations/implications – For research limitations, there are many assumptions regarding numerical modeling. That is, the viscoplastic material property of solder ball is ignored, the reflow profile is simplified and the accurate heat capacity is not considered. Furthermore, the residual stress within the PCB, generated at PCB manufacturing process, is not included in this paper. Practical implications – This paper shows how to calculate PBA warpage during the reflow process as accurately as possible. This methodology helps a PCB designer and surface-mount technology (SMT) process manager to predict a PBA warpage issue and modify PCB design before PCB real fabrication. Practically, this modeling and simulation process can be easily performed by using a graphical user interface (GUI) module, so that the engineer can handle an issue by inputting some numbers and clicking some buttons. Social implications – In a common sense manner, a numerical simulation method can decrease time and cost in manufacturing real samples. This PCB warpage method can also decrease product development duration and produce a new product earlier. Furthermore, PCB is a common component in all the electronic devices. So, this PCB warpage method can have various applications. Originality/value – Because of an economic advantage, the development of a numerical simulation tool for estimating the thin PBA warpage behaviour during reflow process was attempted. The developed tool contains the features of detailed modeling for electronic components and contact boundary conditions of the supporting rails in the reflow oven.

Assessment of Constitutive Properties of Solder Materials Used in Surface-Mount Devices for Harsh Environment Applications

To perform a thermomechanical simulation of surface-mount devices (SMD), relevant solder constitutive properties are needed. This paper reviews some promising Pb and Pb-free solders that are candidates to harsh environment applications. It presents the discrepancy in their common mechanical properties reported in the literature. The mechanical test systems, solder microstructure under test, and the test conditions (temperature and strain rate) are among the major causes for the discrepancy. The use of such variations in the solder thermomechanical properties as input data for simulation studies may cause reliability prediction less meaningful. A novel and reliable test methodology to extract relevant solder properties for surface mount applications is presented in this paper. To fulfill the methodology requirements, lap shear tests with accurate control of the reflow profile and dimensionally accurate solder joint thickness need to be conducted to reproduce the SMD solder joint microstructures for determining solder joint properties for elastic, plastic, and creep model simulations. Two case studies with high-Pb and Pb-free solders are presented. Time-independent yield strength and ultimate tensile strength data obtained from our studies were found to be higher than the reported literature data. This methodology can be extended for other solder material systems with any surface finish plating materials.

Model for Inverse Determination of Process and Material Parameters for Control of Package-on-Package Warpage

Package-on-package (PoP) assemblies may experience warpage during package fabrication and later during surface mount assembly. Excessive warpage may result in loss of coplanarity, open connections, misshaped joints, and reduction in package board-level reliability under environmental stresses of thermal cycling, shock, and vibration. Previous researchers have shown that warpage may be influenced by a number of design and process factors including underfill properties, mold properties, package geometry, package architecture, board configuration, underfill and mold dispense and cure parameters, and package location in the molding panel. A comprehensive inverse model incorporating a full set of design and process parameters and their effect on PoP and PoP assembly warpage is presently beyond the state of the art. In this paper, data have been gathered on multiple PoP assemblies under a variety of assembly parameters. The packages have been speckle coated. The warpage of the PoP assemblies have been measured using a glass-top reflow oven using multiple cameras. Warpage measurements have been taken at various temperatures of the reflow profile between room temperature and the peak reflow temperature. Finite-element models have been created, and the PoP warpage predictions have been correlated with the experimental data. The experimental data set has been augmented with the simulation data to evaluate configurations and parameter variations, which were not available in the experimental data set. Statistical models have been developed to capture the effect of single and multiple parameter variations using principal component regression and ridge regression. The best subset variables obtained from stepwise methods have been used for model development. The developed models have been validated with the experimental data using a single factor design of the experimental study and are found to accurately capture material and geometry effects on part warpage. The results show that the proposed approach has the potential of predicting both single and coupled factor effects on warpage.

Focus on software and semiconductor equipment

Focus on software and semiconductor equipment

Sequential Reflow-Process Optimization to Reduce Die-Attach Solder Voids

Solder voids are detrimental to the thermal, mechanical, and reliability performance of integrated circuit (IC) packages and must be controlled within certain specifications. A sequential method of optimizing solder-reflow process to reduce die-attach solder voids in power quad flat no-lead (QFN) packages is presented. The sequential optimization consists, in turn, of theoretical prediction, heat transfer comparison, and experimental validation. First, the theoretical prediction uses calculations to find the optimal pause location and time for a lead frame strip (with dies bonded to it by solder paste) to receive uniform heat transfer during the solder-reflow stage. Next, reflow profiles at different locations on the lead frame strip are measured. Heat transfer during the reflow stage at these locations is calculated from the measured reflow profiles and is compared to each other to confirm the theoretical prediction. Finally, only a minimal number of actual trials are conducted to verify the predicted and confirmed optimal process. Since the theoretical prediction and heat transfer comparison screens out most of the unnecessary trials which must be conducted in common design of experiment (DoE) and trial-and-error methods, the sequential optimization method saves significant time and cost.

Experimental and numerical investigation of 3D gas flow temperature field in infrared heating reflow oven with circulating fan

This study presents the experimental and numerical analysis of the thermal process for laboratory scale desktop lead-free reflow oven and discusses a 3D CFD model of radiation heating with forced-air convection from circulating stainless steel fan. The experiments were carried out to determine the temperature boundary condition of infrared heating element. In addition, the RPM of the rotating fan was measured using HT50 tachometers. To validate the spatial temperature of the oven, a set of industrial standard thermocouples was employed in various positions. The device was accessed throughout all stages of temperature reflow profile. The profile setting of the oven is in accordance to standard JSTD-020D. The desktop reflow oven was then numerically simulated using the computational model and the advanced user-defined functions (UDFs) were developed to model the thermal profile. The study reveals the temperature distribution of the desktop reflow oven is dependent on the air circulation in the oven at various positions. The temperature contour and air circulation in the oven chamber were demonstrated in the numerical simulation. The experimental and simulation results are useful for further improvement of temperature uniformity within the oven chamber for a convective IR heating reflow oven. The temperature results show a satisfactory agreement with both experiment and simulation.

Reflow Optimization Process: Thermal Stress Using Numerical Analysis and Intermetallic Spallation in Backwards Compatibility Solder Joints

This study applies the reflow optimization process to investigate the phenomenon of spalling in aerospace backward compatibility solder joints when utilized with a Ni substrate [electroless nickel immersion gold, printed circuit board surface finish, and ball grid array (BGA) pads]. The backward compatibility assembly comprised a lead-free tin–silver–copper (96.5Sn3.0Ag0.5Cu/SAC 305 alloy) solder ball assembled with tin–lead paste. The soldering of the lead-free BGA was conducted using two reflow temperature profiles and two conveyor speeds under a nitrogen atmosphere in a full convection reflow oven. The optimized reflow profile has peak temperatures ranging from 237.06 to 237.09°C for 68.94–69.36 s. Scanning electron microscope reveals intermetallic compound formation with maximum thicknesses which are lower than 12 μm as per aerospace requirement. Intermetallic compound spalling of solder ball interface components was not observed. However, spalling between printed circuit board and solder bulk was noted. Nevertheless, at both reflow temperature profiles, the composition and phase distribution of the lead-free BGA ball and tin–lead solder paste were fairly uniform across all joints. This work also presents a finite element-based simulation of backward compatibility assembly in reflow process. A growing number of manufacturers are changing their components to lead-free types without notifying customers. If an aerospace production line is still running a tin–lead-based process, understanding how these lead-free components are processed with tin–lead solder becomes essential. This paper will serve as a reference for manufacturing engineers, particularly those involved in surface mount technology application.

Optimisation of Reflow Profile of Surface Mount Assembly Using Taguchi Design of Experiments

A major source of concern in the electronic manufacturing industry is the reliability of solder joints produced by lead-free solders pastes. Research has shown that solder joint produced with a thin layer of intermetallic compounds (IMC) during the reflow process has a higher reliability. The focus of this paper is on the development of a deeper understanding of the lead-free reflow soldering process and to optimise the reflow profile using Taguchi Design of Experiments (DOE). The optimum parameters are those that yield lower IMC layers. The experiment was designed to consider the effect of the following reflow soldering parameters: soak temperature, time above liquidus, soak time and time to peak temperature. The eight (8) reflow profiles studied were derived from the Taguchi DOE which also included three factorial interactions. A stencil with three (3) holes of diameters 3.1 mm, 3.7 mm and 4.3 mm was used in the solder printing process, after which the samples were reflowed. The samples were then thermal cycled, cross-sectioned and finally the IMC image captured and analysed using an optical electron microscope. The analysis of variance (ANOVA) carried out on the results indicate the soak time to be the most significant factor in achieving a solder joint with a thin IMC layer. The next most significant factor was the time above liquidus, and the most significant interaction was found to be the interaction between the soak temperature and time above liquidus. The results indicate a soak time of 60 seconds and time above liquidus of 60 seconds is preferred to achieve a thin IMC layer. The recommended time to peak temperature is 240 seconds and the soak temperature is 150°C. The results can be very useful to researchers and scientists in the surface mount technology (SMT) field, providing an understanding of the effect of the four reflow parameters studied. In addition, the DOE methodology used in this research can be adopted by other process improvement engineers or scientists involved in the optimisation of a process or product.

Influence of the Hybrid BGA Residual Stress after Reflow on the Thermal Cycling Reliability

Thermal cycle reliability in Sn3.0Ag0.5Cu lead-free solder joints of ball grid array(BGA) package assembled with eutectic SnPb paste is investigated under the residual stress induced by reflow soldering. According to the mixed BGA package, the finite element model of lead-free and mixed BGA package is established. The residual stress and strain of BGA solder bumps are obtained after loading the different reflow profiles. The peak temperature ranges from 220 ℃ to 265 ℃, while the cooling rate is from 1 ℃/s to 6 ℃/s. The thermal cycling loads are applied on the BGA package model with the 243 ℃ peak temperature and 3 ℃/s cooling rate. The solder joint lifetime is calculated based on the equation of Coffin-Manson. In the reflow analysis, the cooling rate has a greater influence to the residual stress which increases from 27.9 MPa to 32.5 MPa with the cooling rate adding, while the highest temperature in the reflow curve has obvious impact on the residual strain. In the thermal recycle analysis, the most dangerous locationis is the upper-left corner of the BGA ball as the high stress and strain. The prediction life of the hybrid BGA could be compatible to the SnPb solder joints. Compared to the reflow curve load the life prediction among them has almost no difference.

The melting-point increase of Sn-Bi solder joint by Cu particles addition

Solder is one of the main materials for interconnects in microelectronic packaging and Sn-Pb solder alloys have been the most common solders for a long time. However, the use of Pb has been very limited because of the negative effects of Pb on the human health and the environment. Therefore, Sn-Bi based solders were recommended as a low temperature solder to replace Sn-Pb solders because of their low temperature melting point. Low temperature melting point of Sn-Bi solders reduces the damage due to the thermal effect of the high temperature on the mechanical properties of the joints. However, its low melting point allows Sn-Bi solders to be used in a limited range of applications. The objective of this research is to enable the Sn-Bi based solders to be used in higher temperature applications. Therefore, this research represents how to increase the melting point of the solder joint after the reflow while keeping the advantage of low melting point before the reflow. The method which was tried in this research in order to increase the melting point of the Sn-Bi solder after the reflow is to convert the whole Sn phase of the solder to Cu6Sn5 and Cu3Sn intermetallics by adding Cu particles to the solder before the reflow. The binary Sn-Bi and Sn-Bi + 30 wt. %Cu particles were investigated in this research. Scanning electron microscopy (SEM) and electron probe micro-analyzer (EPMA) were used to examine the microstructure of the solder parts after the reflow. Various reflow profiles were tried to enable the whole Sn phase react with the added Cu particles. Differential scanning calorimetry (DSC) was also used in this research to investigate the melting point of the solder parts. The results after the reflow at 230°C for 50 min show that almost all Sn phase was successfully converted to the Cu6Sn5 and Cu3Sn phase.

Effect of Reflow Profile Parameters on Surface Mount Chip Resistor Solder Joint Shear Strength

The focus of this study is on the effect of reflow parameters on the joint shear strength. Eight reflow profiles were developed using four factors at two levels of Taguchi design of experiment for 1206, 0805 and 0603 chip resistors. Normal probability and main effect plots were used to provide a complete profile of the effect of reflow parameters on the chip resistor solder joint shear strength. The Normal Probability plots show effect of some reflow parameters on shear strength. Some data points did not fall on the best fit line.These outliers indicate parameter effects. The 1206 chip resistor shear strength value of 74.85N lies outside the best fit line indicating that some of the parameters are critical and significantly affect the response value. The results of the Main Effect plots help identify the unknown critical parameters in the probability plots. It indicates that the shear strength of 1206 chip resistor depends on the peak temperature, time above liquidus and preheat slope but not on cooling rate. In the case of the 0805 chip resistor, there were no exceptional departures from the line fitted to the data. It can be assumed that the factors and the levels considered here have no significant effect on the response. The normal probability plot of the 0603 chip resistor shows that the 46.68N shear strength lies outside the fitted line. This means that the factors and settings (run 3) can be further modified to improve the response. The factors which affected the 0603 resistor from the main effect plot are preheat slop and cooling rate.The results of the 1206 chip resistor show the highest shear force of 74.8 N using a peak temperature setting of 230°C (low level). The 0805 and 0603 chip resistors recorded the highest shear forces of 68.32N and 46.48 respectively using a temperature of 245°C (high level). The higher temperature may have contributed to the lower shear force due to the growth of brittle intermetallic compound in the case of the 0805 and 0603 chip resistors.