Reduced Conduction Losses Research Articles

Transformerless bidirectional switched-inductor switched-capacitor converter

ABSTRACT This research presents a unique bidirectional converter based on the active switched-inductor and switched-capacitor networks of the ASL-SU2C converter. The converter’s primary advantages are its high voltage gain and reduced switch stress. This was accomplished by the converter using three inductors, two switched-capacitors, two switches, and diodes. Switches are used in place of diodes to enable bidirectional power flow in the proposed work, and synchronous rectification is used to boost efficiency by reducing conduction losses. Two inductors and two switches on the low voltage side of the converter aid in lowering the average switch current and, consequently, the current stress. The control operation is made simpler by the fact that two switches on the high voltage side (HVS) have one duty cycle and the other two switches on the low voltage side (LVS) have a different duty cycle. Consequently, two switches will always have identical duty cycles. In order to validate the theoretical findings, the performance of the transformerless bidirectional switched-inductor switched-capacitor (TBSISC) topology is examined in steady state, compared to that of other bidirectional converters, its efficiency is calculated, and experiments with a 500 W prototype are conducted.

A Literature Review on the Optimal Placement of Static Synchronous Compensator (STATCOM) in Distribution Networks

The existing distribution networks were designed at a time when there was virtually no embedded generation. The design methods ensured the voltage at various parts of the network remained within the limits required by standards, and for the most part, this was very successfully achieved. As Distributed Energy Resources (DERs) started to grow, the rise in voltage due to injected currents and the local impedances started to push network voltages toward, and even above, the desired upper limits. Voltage limits are based on typical appliance requirements, and long-term over-voltages will ultimately result in unacceptably short appliance life spans. Distribution Static Compensators (dSTATCOMs) are shunt-connected devices that can improve low-voltage networks’ performance by injecting currents that do not transfer real power. The currents can be reactive, negative or zero sequence, or harmonic. System performance can be improved by reducing conduction loss, improving voltage profile and voltage balance, or reducing Total Harmonic Distortion (THD). To obtain these benefits, optimal sizes of dSTATCOMs need to be placed at optimal locations within the distribution network. This paper has considered seventy research articles published over the past years related to the optimal placement and sizing of dSTATCOMs. In this study, minimization of power losses, voltage profile improvement, loadablity factor, voltage sag mitigation, and reduction in annual operating costs are considered fitness functions that are subjected to multiple constraint sets. The optimization algorithms found in the literature are categorized into six methods: analytical methods, artificial neural network-based methods, sensitivity approaches, metaheuristic methods, a combination of metaheuristic and sensitivity analysis, and miscellaneous. This study also presents a comparison among distribution network types, load flow methods optimization tools, etc. Therefore, a comprehensive review of optimal allocation and sizing of dSTATCOMs in distribution networks is presented in this paper, and guidance for future research is also provided.

An improved coupled inductor‐based quadratic step‐up DC–DC converter with a high step‐up factor and reduced voltage overshoot on the power switch

AbstractMost coupled inductor‐based step‐up DC–DC converters encounter a significant voltage overshoot on their power switch due to the leakage inductance of the coupled inductor. So, they need additional bulky snubber circuits or a sophisticated procedure for coupled inductor design to reduce that effect. This paper proposes an improved coupled inductor‐based DC–DC converter, which provides a high quadratic voltage conversion ratio without excessive voltage stresses on the power switch. An active clamp circuit that operates with the zero‐voltage switching (ZVS) feature has been utilized for this aim. This feature allows the main power switch to be selected from low voltage ratings and low on‐resistance MOSFETs, which reduces conduction loss. The topology also benefits from continuous input current, high gain, high efficiency, and an appropriate number of components compared with the produced gain. In this article, the theory and operation of this converter are described by proposing the dc and small‐signal models, loss model, and continuous and discontinuous current modes (CCM and DCM) relations. Experimental results are represented to evaluate the performance of the proposed topology. For this purpose, a 240 V/240 W prototype has been designed and fabricated. Results confirm the above claims.

An Improved Quadruple-Boost Switched-Capacitor-Based Nine-Level Inverter

This letter proposes an improved quadruple boosting nine-level (IQB9L) inverter with a reduced component count requiring ten switches, three diodes, and two capacitors for 9 L operation. The capacitors are self-voltage balanced using the series-parallel technique, ensuring sensorless operation. The devised structure exhibits the least conducting devices at each level resulting in reduced conduction losses. In addition, fewer devices transit at any level than similar state-of-the-art topologies, thus, reducing switching losses. A detailed comparison of the proposed IQB9L inverter demonstrates its improved performance. The experimental results are presented to validate the feasibility of the proposed inverter topology.

Loss Evaluation of Magnetic Devices Used in Power Converters

Along with the commercialization of SiC‐MOSFETs and progress in the development of GaN power devices, high‐speed, high‐frequency switching and reduction in conduction loss of power devices are expected. Hence reduction of the size and increase of conversion efficiency of power electronics equipment is greatly expected. On the other hand, even if power devices are switched at high speed and high frequency, the loss of passive devices such as transformers, inductors, and capacitors used in power converters increases, making it difficult to make the power converters smaller than expected. In other words, there is a demand for performance improvements of passive devices from various viewpoints, including miniaturization and low loss, which are compatible with high‐speed, high‐frequency switching operations of power devices. This paper introduces recent research results on loss evaluation methods considering the operating state of passive devices used in small‐to‐medium‐capacity power converters those perform high‐frequency switching operations. © 2023 Institute of Electrical Engineer of Japan and Wiley Periodicals LLC.

Reconfigurable high step‐up DC to DC converter for microgrid applications

AbstractHere, a high gain DC–DC converter which is based on switched capacitor (SC) and switched LCL (SLCL) cells is presented. The diode employed in the classical passive switched inductor (SI) cell is replaced by a capacitor in the proposed SLCL cell to achieve higher voltage gain. Two switches—one each in the positive and negative DC rails of the supply are employed to charge and discharge the inductors of SLCL cells. A generic structure comprising of N and M number of SLCL cells in the positive and negative DC rails respectively along with K number of SC cells is presented. To validate the proposed gain extension concept, a two‐switch based converter comprising of 2 SLCL and 1 SC cells is synthesized and its operation is described in detail. The voltage gain expression of the proposed SLCL‐SC converter is derived. Experimental results are obtained from a 25 to 380 V prototype converter which operates at a full‐load efficiency of 94.22% at 200 W. Since the switches employed in the proposed converter are operated at a moderate and safe duty ratio of D = 0.51, the voltage stress on the switches is about 25% of the output voltage while the diodes are subjected to even lesser voltage stress levels of only one‐fifth of the output voltage. The main salient features of the proposed topology are its (i) modular structure, (ii) ability to provide higher voltage gain values at lower duty ratios (iii) reduced voltage stress on the semiconductor devices and (iv) reduced conduction losses due to the replacement of diodes with capacitors in SLCL cells.

A novel method for hybridization of super lift luo converter and boost converter for electric vehicle charging applications

ABSTRACT The demand for electric vehicles (EVs) has increased dramatically in recent years, making it increasingly challenging to keep up with the demand for charging infrastructure. However, conventional power converters (DC–DC converters) have drawbacks such as a high component count, low voltage gain, low efficiency, and high cost. A new DC–DC multiport converter has been proposed to address these challenges by hybridizing a Super-lift Luo and Boost Converter (SLBC) with Photovoltaic (PV) and battery sources as dual inputs. The proposed Dual-Input Dual-Output (DIDO) converter offers significant advantages by super-lifting the input voltage while producing two step-up voltages, one by the Luo converter and another by the Boost converter. The SLBC uses simple structures without any additional electric circuits or transformers to generate high voltage gain and high power efficiency. To evaluate the performance of the proposed SLBC, the converter operation has been analyzed under steady-state and Continuous Current Mode conditions, and a comparison with other similar configurations has been conducted to demonstrate its benefits. Simulation and experimental results have shown that the proposed SLBC offers a considerable reduction in conduction losses compared to other SLBC converters in similar situations. Furthermore, the SLBC system provides 1.2 kW output at the charger side with 94.8% efficiency, making it a viable option for powering various EV components, including the charger, motor, lighting, and audio system, with variable voltages.

Analysis and design of synchronous‐rectified LLC DC–DC converter for LDC of electric vehicles

AbstractIn electric vehicles (EVs), the low voltage dc‐dc converter (LDC) with synchronous rectifier switches (SRs) can be used to reduce conduction loss caused by the high load current and improve the efficiency. Therefore, it is important to design a proper turn‐on time of SRs. As a popular driving strategy for the SRs, the drain–source voltage across the SRs is sensed to generate the gate driving signal. However, when LLC dc–dc converter operates at O mode, there will be a voltage ringing across the SRs. If the ringing voltage reaches to the threshold voltage −Vth,on, it would make SRs turn‐on early and results in abnormally working of the converter. The novelty and contribution of this paper lie in: (1) elaborating on the voltage ringing across the SRs, (2) the accurate ringing model is established during O mode, and (3) a simple, lossless, and low‐cost filter circuit is used to solve the negative effect of the ringing voltage for LLC converter at high load current. A 1.26 kW experimental prototype with ≈250–430 V wide input voltage and ≈9–16 V wide output voltage is implemented, 96.7% peak efficiency and 96% full load efficiency are achieved with a 3.12 kW/L power density. The theoretical analysis has been validated by the simulated and experimental results, and the SR LLC dc–dc converter with the SR works efficiently and reliably with the proposed solution at a high load current.

Carboxylated Poly (p-Phenylene Terephthalamide) Reinforced Polyetherimide for High-Temperature Dielectric Energy Storage.

Dielectric energy storage polymers play a vital role in advanced electronics and electrical systems, due to their high breakdown strength, excellent reliability, and easy fabrication. However, the low dielectric constant and poor thermal resistance of dielectric polymers limit their energy storage density and working temperatures, making them less versatile for broader applications. In this work, a novel carboxylated poly (p-phenylene terephthalamide) (c-PPTA) is synthesized and employed to simultaneously enhance the dielectric constant and thermal resistance of polyetherimide (PEI), leading to a discharged energy density of 6.4 J cm-3 at 150 °C. The introduction of c-PPTA molecules effectively reduces the ΠΠ stacking effect and increases the average chain spacing between polymer molecules, which is conducive to improving the dielectric constant. Additionally, c-PPTA molecules with stronger positive charges and high dipole moments can capture electrons, resulting in reduced conduction loss and enhanced breakdown strength at high temperatures. The coiled capacitor fabricated with the PEI/c-PPTA film exhibits superior capacitance performances and higher working temperatures compared to commercial metalized PP capacitors, demonstrating great potential for dielectric polymers in high-temperature electronic and electrical energy storage systems.

T-NPC Soft-Commutated Inverter Based on Reverse Blocking IGBTs with the Novel Concept of a DESAT Control Circuit in the Gate Driver

This article presents the concept of switching and conduction loss reduction in a T-NPC inverter based on IGBT transistors. The method of limiting switching losses involves the connection of an LC circuit designed to cause transistors in vertical branches to shut down under zero voltage conditions. In order to reduce conduction losses, it was proposed to use two reverse blocking transistors connected anti-parallel in the horizontal branch of the inverter. To ensure safe operation of the transistors, a gate driver proposal for controlling the IGBT reverse blocking transistor is presented. The solution is characterized by a changed part of the driver, responsible for short-circuit protection. It eliminates excessive, destructive currents that can potentially flow through the driver circuit under the influence of the power supply voltage of the power circuit connected backwards to the controlled transistor. Examples of applications and benefits of the proposed solution are presented and verified with laboratory tests.

A Discussion on Ultrahigh Efficiency and Ultrahigh Power Density DC–DC Converter Technologies

This paper discusses the challenges in achieving ultra-high efficiency, defined here as higher than 99% efficiency, as well as high power density of more than 2kW/in <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> for DC-DC converters. For simplicity, our discussion focuses on 48V to 12V converters aimed primarily at data center applications, but the concepts discussed are broadly applicable to DC-DC conversion at a wide range of voltage levels. This paper will present a review of the fundamental sources of losses in DC-DC converters and how to minimize them, as well as a more in-depth look at some of the most efficient and dense topologies presented in literature thus far. Based on this analysis and review the key concepts that enable DC-DC converters to achieve higher than 99% efficiency at a power density of more than 2kW/in <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> will be summarized which include: easily paralleled “modular” designs to reduce conduction loss, multi-level structures that reduce individual component voltage stresses, utilizing lower switching frequencies to reduce switching and quiescent losses, operating with full duty ratio to ensure maximum utilization of the power components, and utilizing novel circuit topologies that nearly eliminate bulky, lossy magnetic components when compared with conventional topologies.

An Interleaved High Step-Up DC/DC Converter-Based Three-Winding Coupled Inductors With Symmetrical Structure

This paper proposes an interleaved high step-up converter based on three-winding coupled inductor (TW-CI) with symmetrical structure. By utilizing the TW-CI along with a voltage multiplier cell, the proposed converter achieves high power transfer ability as well as minimized voltage stress across power switches and diodes. The converter has significantly improved the voltage gain by integrating two TW-CIs with the passive clamp circuit. The leakage inductor energy of the TW-CI is recycled to improve the voltage gain and efficiency while facilitating the soft switching condition for the power switches. Additionally, the voltage stress across the power switches is decreased with the help of the clamping capacitors. Therefore, low-voltage-rated semiconductors with small on-resistance can be chosen which reduce conduction losses and improve the overall performance. Moreover, two series-connected capacitors of the primary side are introduced, which effectively balance the voltage between the power switches and the capacitors during steady and dynamic states. Finally, a 400W experimental prototype with 24V-400V is built to is verify the accuracy of proposed converter.

비반전 동기 벅-부스트 컨버터의 CRM 제어

Buck-Boost Converter is a non-insulated Converter with a wide input range and could receive various voltage as an input However, as research for high efficiency of power conversion system progresses, the need to reduce semiconductor losses is increased. Buck-Boost Converter has a disadvantage in that a high conduction losses and a switching losses due to a forward voltage drop of diode. In this paper, the reduction of conduction losses was verified by comparing conduction losses of Synchronous Buck-Boost Converter and conduction losses of conventional Buck-Boost Converter, and the application of CRM(Critical Conduction Mode) control was demonstrated through experiments.

A Line Cycle Synchronous Rectification Strategy Based on Time-Domain Analysis for Single- Stage AC–DC LLC Converters

Synchronous rectification that is being widely used in high power and current DC-DC <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LLC</i> resonant converters to reduce conduction losses can be challenging in single-stage AC-DC <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LLC</i> converters with high output voltage levels (i.e., >200 V) where synchronous rectifier (SR) driving ICs cannot be used. In this paper, a simple AC line cycle synchronous rectification strategy with direct control by a cost-effective microcontroller unit (MCU) is proposed for single-stage AC-DC <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LLC</i> converters with high switching frequencies using wide bandgap devices (i.e., GaN or SiC). The SR gate pulse is generated based on the time-domain calculated conduction time, which is then switched <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> and <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> over the AC line cycle to avoid reverse power flow in light load conditions. The proposed strategy reduces the complexity of implementation over any adaptive online calculation or model-based methods that require powerful and expensive MCUs. First, the operation is briefly described followed by the time-domain analysis for AC operation. Next, the calculation and methodology behind the proposed AC line cycle SR driving strategy are discussed in detail. A scaled-down wide bandgap-based AC-DC <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LLC</i> converter prototype with a 250--400 V output voltage range is used with digital control implementation to validate the performance of the proposed synchronous rectification strategy. It is found that maximum efficiency of 98.1% can be achieved which is improved by around 0.5% over the conventional fixed conduction time method. Moreover, it is shown that the proposed method obtains the same efficiency levels as more complex adaptive SR driving approaches.

An Extendable Interleaved Quasi Z-Source High Step-Up DC–DC Converter

A quasi z-source high step-up dc–dc converter is proposed here by integrating a coupled-inductor and a quadruple voltage rectifier technique. This converter can be used for high-voltage gain applications, without using extreme duty cycle and transformer high turns ratio values. Furthermore, low-voltage rating <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> s, which have small <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> -resistances, can be used to reduce conduction losses and improve the converter efficiency. Also, single-core coupled inductors with multiwindings are used to reduce the magnetic components count. Using the interleaved technique at the converter input stage reduces the current stresses of the power <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> s as well as the current stresses of the primary side windings of the coupled inductor. For high power applications, number of the input stage interleaved legs can be properly chosen to reduce the input current and output voltage ripples values, which reduce the input and output filters volumes. Leakage inductances energy recovery is another benefit of the given converter. To confirm performance of the proposed converter and its operating principles, as well as the given simulation results and mathematical analyses, a two-leg topology of the introduced converter has been implemented and tested by applying both interleaved and noninterleaved gate-drive signals at different conditions.

A three‐level three port isolated converter with reduced current stress for DC microgrid applications

SummaryThis paper proposes a three‐level three port isolated converter (3L3PIC), which can be employed as an intermediate power conversion circuit for connecting different DC bus voltages in a DC microgrid. This topology utilize half bridge multilevel structure to reduce voltage stress across the transformer windings and the semiconductor switches. Conventionally the power transfer between the ports of a 3PIC were attained by traditional phase‐shift modulation (TPM), but this will impose increased current stress and associated losses in the converter at wide change in voltage conversion ratio. To minimize these losses, this paper introduces a 3L3PIC, that is, by employing dual phase‐shift modulation (DPM) in 3PIC. Steady state analysis of 3L3PIC are presented and derived the power transfer equations between the ports. The current equations through each port are determined at different combinations of voltage conversion ratios. Procedure for obtaining optimized phase‐shift values for both TPM and DPM techniques in 3PIC are explained. A comparison between the modulation schemes in 3PIC is performed and found better results for the DPM technique in terms of reduced current stress, reduced circulating power flow, and extended soft switching region. This in turn leads to a reduction in conduction losses and transformer losses in the converter. A hardware prototype of 1.5 kW 3PIC has been implemented and tested. The experimental results obtained validates with the theoretical analysis.

A novel PWM technique for reduced switch count multilevel inverter in renewable power applications

This paper described a novel pulse width modulation (PWM) technique in reduced switch count multilevel inverter (MLI) for renewable power applications. Therefore, the proposed technique finds a better solution in the multilevel inverters used for improving power quality, efficiency and reduction of switching and conduction losses. It produces a smoother sinusoidal output waveform with reduced total harmonic distortion (THD) using different modulation technique. The novel PWM technique consists of nearest level control (NLC) and level shift pulse width modulation (LSPWM). Normally semiconducting devices are added for increasing number of levels. It affects the power quality and efficiency due to losses. In this work, MLI topology with reduced number of switches count for NLC and LSPWM is presented. The single-phase and three-phase inverter configuration is used in proposed mythology. Detailed simulation results for 7-level inverter of single and three-phase inverters are presented in this paper. It is observed that NLC method is better efficiency and reduced THD than LSPWM for better utilization in renewable power applications.

A soft switched high step‐up DC‐DC converter based on VMC and coupled inductor for photovoltaic energy applications

AbstractIn this paper a new topology of non‐isolated high step‐up DC‐DC is proposed for renewable applications like photovoltaic (PV) power generation. This converter is designed based on coupled inductor and VMC techniques. The main benefits of the presented topology are: (1) Continues input current with low ripple, (2) low voltage stress across semiconductors, (3) soft switching of diodes (ZVS and ZCS), (4) high voltage gain with low duty cycle, (5) low volume and cost, and (6) high power efficiency. To obtain a high output voltage, the secondary side of the coupled inductor is integrated with VMC, resulting in a large voltage gain with low duty cycles and reduced conduction loss of power switches. Additionally, diodes' zero voltage switching (ZVS) and zero current switching (ZCS) improve the efficiency of the proposed converter. The used VMCs act as a voltage clamp, and the peak voltages across power switches are reduced. The presented converter's operational modes, steady‐state, and efficiency analysis are discussed. Additionally, to indicate the performance of the suggested structure, a 200 W prototype with Vin = 33 V and Vo = 403 V voltage conversion is built, and the experimental results are presented. The experimental efficiency at Po = 200 W is measured 95.29%. Also, efficiency is measured more than 95 % for Po = 20 W to 200 W.

Multiport Control With Partial Power Processing in Solid-State Transformer for PV, Storage, and Fast-Charging Electric Vehicle Integration

This article proposes a multiport control method to enable partial power processing (PPP) in a medium-voltage (MV) multiport solid-state transformer (SST). MV multiport SSTs are promising in integrating low-voltage dc sources or loads such as solar photovoltaic, energy storage, and electric vehicles into smart grids without bulky line-frequency transformers. Compared with voltage-source SST, current-source (CS) SST features single-stage isolated bidirectional ac/ac, ac/dc, or dc/dc conversion using an inductive dc link. For a multiport CS SST, it is revealed in this article that the PPP capability can be enabled through the proposed control without extra hardware, different from the case of voltage-source converters where special hardware architecture is required for the PPP. With the PPP, most power exchange between LV ports is processed by only a fraction of the entire conversion stage, leading to reduced dc-link current, volume, loss, and improved efficiency. The proposed multiport PPP control scheme is analyzed to verify the advantages across a wide voltage and power range against conventional full power processing (FPP) multiport control, using the soft-switching SST (S4T) with reduced conduction loss as an example. Comparative experimental results based on a SiC three-port S4T prototype verify the effectiveness of the proposed PPP scheme against the FPP scheme under both steady state and dynamic conditions. The dc-link current reduction is measured to be more than 36%. Significantly, the proposed multiport PPP control scheme is generic and applicable to any hard-switching or soft-switching CS SSTs without extra hardware.

A Resonant Modular Multilevel Rectifier for Secondary Control in Inductive Power Transfer

Secondary control of the inductive-power-transfer (IPT) system can achieve robust output regulation by eliminating the long propagation delay of wireless communication in the feedback control between the transmitter and receiver. Recently, the multilevel switched-capacitor converter has been employed for rectification in the receiver, but experiences high charge sharing loss. In this letter, a resonant modular multilevel rectifier (RMMR) is proposed to eliminate the charge sharing loss in the conventional multilevel rectifier. The proposed RMMR is applied in a series–series compensated IPT system to implement independent secondary control for output voltage regulation with low harmonic distortion and reduced conduction loss. The operating principle is analyzed in detail and a generic analytical expression of the system voltage gain is provided. In addition, the operation of the proposed topology is validated experimentally, and a peak dc–dc efficiency of 96.6% is measured in the experiments.