Readout Chip Research Articles

Characterisation of planar sensors for the inner tracker of the CMS experiment

The Compact Muon Solenoid (CMS) experiment is expected to collect an integrated luminosity of 3000 fb−1 during the High Luminosity phase of the Large Hadron Collider (HL-LHC). This scenario comes with a high number of collisions per bunch crossing, and in turn, a high level of radiation for the innermost layer of the CMS tracker. Simulations estimate a 1 MeV neutron equivalent fluence, Φeq, of 2.3 × 1016 cm−2 at a distance of 2.8 cm from the collision point. The inner tracker of the CMS detector is required to withstand this range of fluence and maintain tracking performance. Planar pixel sensors with an active thickness of 150 μm and pixel sizes of 25 × 100 μm2 or 50 × 50 μm2 have been produced by Hamamatsu Photonics (HPK) and Fondazione Bruno Kessler (FBK). The sensors were bump bonded to the RD53A readout chip prototype. The sensor-chip modules were irradiated with 23 MeV protons to the 1 MeV neutron equivalent fluence of up to 2.4 × 1016 cm−2 at the Zyklotron AG (ZAG).Non-irradiated and irradiated modules were tested in the DESY II beam test facility. The spatial resolution as a function of the incidence angle and hit efficiency as a function of the bias voltage of the sensors were determined from these measurements. It is shown that for the highest fluence, the planar modules still reach 98% hit efficiency at bias voltages below 800 V.

CMS Phase-1 pixel detector refurbishment during LS2 and readiness towards the LHC Run 3

The CMS Phase-1 pixel detector was extracted from the underground cavern after the end of the LHC Run 2 in 2019 and has been kept cold to protect the silicon sensors during the long shutdown period (LS2) in 2019–2021. The LHC is now preparing for the next period of data taking, Run 3, which is scheduled to start in spring 2022. The Phase-1 pixel detector was going through a series of refurbishment and repairs this year to improve the quality of the collected data and enhance the detector performance. The innermost barrel pixel layer has been replaced with new modules and features improved front-end readout chips (PROC600v4), token bit manager chips (TBM10d), and circuit boards to rectify the issues discovered in Run 2. The forward pixel detector has been equipped with new cooling inlets for safe handling and features a revised high-voltage power distribution scheme to better match the low-voltage granularity. All the DC-DC converter modules have been replaced with new modules featuring an improved FEAST2.3 ASIC, which is considerably more robust against the total ionizing dose effect and thus prevents them from breaking during operation. Overall, this article will summarize the refurbishment work of the pixel detector during LS2, and highlight the readiness towards the LHC Run 3 after installation and commissioning.

A Co-Simulation Methodology for the Design of Integrated Silicon Spin Qubits With Their Control/Readout Cryo-CMOS Electronics

Recent years have witnessed a steady growth in the achievable quantum systems due to advancements in qubit technology across several hardware platforms. Currently entering an era of noisy intermediate-scale quantum (NISQ) systems brings additional design challenges. In these systems, each individual qubit is accompanied by a substantial amount of classical CMOS circuitry for qubit instantiation, control and readout, which is to be integrated at the cryo temperature. This work presents a methodology for the co-design and co-simulation of silicon spin qubits in quantum dots, together with their associated cryo-CMOS circuitry, relying on an established spin qubit compact model. In addition, a detailed procedure is proposed for the integration of the model into a classical design flow, which is crucial for the usability of the model in practice. This is illustrated by simulating the readout of a qubit using a complete CMOS readout chip that behaves in a realistic, nonideal way. Bringing the design to a single simulation environment allows for the capture and analysis of effects that otherwise are not possible to simulate when considering the qubits and the cryo-CMOS circuitry separately. This opens up opportunities for more robust design in the future.

Development of a compact and cost-effective PET detector module for a small-animal PET system with FESA ASIC

Due to the high cost and large channel number in positron emission tomography (PET) systems, the integration level and cost performance must be considered in the construction of commercial PET systems. In this paper, a highly integrated readout electronic system was designed and implemented based on a self-developed FESA (Front End for SiPM Arrays) readout ASIC; a compact cost-effective detector module with four lined up detector heads was built, and its performance was evaluated. Each detector head consisted of a 24× 24 LYSO crystal array (each crystal element had dimensions of 0.99 × 0.99 × 15 mm3), one end coupling to an 8 × 8 silicon photomultiplier array (SiPM array with dimensions of 3.2 × 3.2 mm2 each), and the other end covered with a 1 mm thick light guide layer. Since the front-end FESA readout chip employed a row-column summing circuit to reduce the readout channels from 64 to 16, we tried a new depth encoding method based on a single-end readout with the structure. The test results showed that the average coincidence time resolution (CTR), energy resolution, and depth of interaction (DOI) resolution of the detector are 413 ps, 15.7%, and 5.2 mm, respectively, while the crystal array in the detector head with 9-to-1 coupling can be clearly separated in the flood image. Compared with the detector head without the depth encoding ability, the clearness of the flood image was slightly decreased, but the energy resolution and time performance remained the same. We also implemented a central control board that connected all detector modules via fiber connections. The data from the detector modules could be collected over the connections, and the system central clock could be precisely distributed; therefore, the compactness of the electronics system was further enhanced.

Characterization of a high bandwidth readout chain for the CMS phase-2 pixel upgrade

The CMS collaboration is building a new inner tracking pixel detector for the High-Luminosity LHC. Each pixel readout chip will be controlled with a single serial input stream at 160 Mb/s and will send out data via four current mode logic (CML) 1.28 Gb/s outputs. The readout chips will be grouped in modules and connected with up to 1.6 meters long low-mass electrical links to Low-Power Gigabit Transceivers (lpGBT) and Versatile Link PLUS Transceiver (VTRx+) modules that send the data optically to off-detector electronics at 10 Gb/s. The characterization of these components and system tests of the readout chain are presented.

A High Time-Resolved Front-End ASIC for APD Array Detector in Nuclear Resonant Scattering Experiments With Synchrotron Radiation

A high time-resolved front-end readout chip has been developed for avalanche-photodiode (APD) array detectors in nuclear resonant scattering (NRS) experiments. The chip has eight channels. Each channel consists of a preamplifier, a voltage discriminator, an open-drain output driver, and a local digital-to-analog converter (LDAC). The application-specific integrated circuit (ASIC) chip has been designed and fabricated in a 0.13- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> CMOS technology with a chip size of 1.1 mm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times2.3$ </tex-math></inline-formula> mm. The electrical characterizations of all eight channels demonstrate good time resolution (TR) (rms) on the output pulse leading edge, with the measurement result better than 25 ps for high input signal charges (>30 fC) and better than 98 ps for low input signal charges (8–30 fC), for an APD sensor capacitance as large as 15 pF. The equivalent noise charge (ENC) received from the measurement can be represented as ENC = 592.4 e <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">−</sup> + 50.7 e <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">−</sup> /pF. The power consumption is 17.6 mW per channel: 2.7 mW for the preamplifier–discriminator stage and 14.9 mW for the output low-voltage differential signaling (LVDS) driver.

Radiation hard 3D silicon pixel sensors for use in the ATLAS detector at the HL-LHC

The High Luminosity LHC (HL-LHC) upgrade requires the planned Inner Tracker (ITk) of the ATLAS detector to tolerate extremely high radiation doses. Specifically, the innermost parts of the pixel system will have to withstand radiation fluences above 1 × 1016 neqcm-2. Novel 3D silicon pixel sensors offer a superior radiation tolerance compared to conventional planar pixel sensors, and are thus excellent candidates for the innermost parts of the ITk. This paper presents studies of 3D pixel sensors with pixel size 50 × 50 μm2 mounted on the RD53A prototype readout chip. Following a description of the design and fabrication steps, Test Beam results are presented for unirradiated as well as heavily irradiated sensors. For particles passing at perpendicular incidence, it is shown that average efficiencies above 96% are reached for sensors exposed to fluences of 1 × 1016 neqcm-2 when biased to 80 V.

A Cryo-CMOS Wideband Quadrature Receiver With Frequency Synthesizer for Scalable Multiplexed Readout of Silicon Spin Qubits

In this article, a cryo-CMOS receiver integrated with a frequency synthesizer for scalable multiplexed readout of qubits is presented, focusing on radio frequency (RF) reflectometry readout of silicon-based semiconductor spin qubits/quantum dots. The proposed spin qubit readout chip consists of a wideband low noise amplifier (LNA), a quadrature mixer, a complex filter, a pair of in-phase/quadrature (I/Q) intermediate frequency (IF) amplifier chains, and a type-II charge-pump phase-locked loop (PLL) with a programmable frequency divider providing local oscillator (LO) signals. Noise optimizations are applied to the LNA design and the quadrature active mixer design to obtain the required performance. A mode-switching complementary voltage-controlled oscillator (VCO) is proposed to achieve low-power and low-phase noise in a wide-frequency tuning range (46.5%). Circuit modifications and design considerations for robust cryogenic temperature operation are presented and discussed. Measurements show that the receiver provides an average gain of 65 dB, a minimum noise figure of 0.5 dB, an IF bandwidth of 0.1–1.5 GHz, and an image rejection ratio of 23 dB at 3.5 K with a power consumption of 108 mW. This cryo-CMOS receiver with frequency synthesizer for spin qubit readout is a first step toward fully-integrated qubit readout and control.

Experimental characterization of an X-ray photon counting detector

This paper presents the experimental test results of the X-ray photon counting detectors based on our pixel readout ASIC. The chip integrates a 64 × 128 array of pixels in the size of 150 µm × 150 µm and each pixel consists of four 12-bit energy windows. Two types of CdTe detectors have been bump bonded to the ASICs and have been tested.The electronic characteristics of the readout chip were evaluated first by injecting charge through the calibration capacitors. The non-uniformity of the energy thresholds among pixels was measured and then were compensated by tuning the local DACs.The detector performance was then characterized using X-ray tubes. The energy responses of the detectors were measured using the characteristic X-ray of the target materials. The global energy thresholds were then calibrated with these specific energies of photons. Polarization effects under different photon fluxes were also studied. Preliminary imaging was conducted. The detector response under uniform irradiation was investigated. The spatial uniformity of the detectors was analyzed and the flat field correction was then conducted to improve image quality. CT detailed test results will be discussed in this paper.

A prototype pixel readout chip working in single photon counting mode with a novel charge sharing suppression scheme

Spectral distortion due to the charge sharing effect becomes a severe issue in single-photon counting pixel detectors. The HEPS-BPIX4 prototype chip, dedicated for the HEPS in China, implements a novel architecture to mitigate charge sharing and permit spectroscopic imaging with high efficiency. In the architecture, a central pixel communicates with others in a cluster of 3 × 3 pixels. The algorithm simulation showed a charge sharing elimination accuracy better than 90%. The prototype chip has been designed in a 130 nm CMOS technology. The preliminary measurements show a charge gain of 48 mV/ke− and an equivalent noise charge of 150 e− rms. Detailed tests in a 4 × 4 pixel array for the charge sharing are performed using electrical test pulses. The hit allocation in the core four adjacent pixels of the array indicates that effective suppression of charge sharing has been realized.

Characterization of planar and 3D silicon pixel sensors for the high luminosity phase of the CMS experiment at LHC

The High Luminosity upgrade of the CERN Large Hadron Collider (HL–LHC) calls for an upgrade of the CMS tracker detector to cope with the increased radiation levels while maintaining the excellent performance of the existing detector. Specifically, new high-radiation tolerant solid-state pixel sensors, capable of surviving irradiation fluences up to 1.9×1016neq/cm2 at 3 cm from the interaction point, need to be developed. For this purpose an R&D program involving different vendors have been pursued, aiming at the development of thin n-in-p type pixel sensors. The R&D covers both planar (manufactured by Fondazione Bruno Kessler, FBK; Hamamatsu Photonics, HPK and LFoundry) and single-sided 3D columnar (manufactured by FBK and Centro Nacional de Microelectronica, CNM) pixel devices. The target active thickness is 150μm while two different pixel cell dimensions are currently investigated (25 × 100 and 50×50μm2). Sensors presented in this article have been bump-bonded to the RD53A readout chip (ROC), the first prototype towards the development of a ROC to be employed during HL–LHC operation. Test beam studies, both of thin planar and 3D devices, have been performed by the CMS collaboration at the CERN, DESY and Fermilab test beam facilities. Results of modules performance before and after irradiation (up to 2.4×1016neq/cm2) are presented in this article.

Measurements of the radiation damage to the ITkPixV1 chip in X-ray irradiations

The upgrade of the ATLAS Inner Tracker (ITk) requires a pixel readout chip that can withstand the harsh environment of HL-LHC, with a peak luminosity of 5×1034cm−1s−1 and an estimated total ionising dose (TID) of around 1 Grad. The ITkPixV1 chip is the latest readout chip prototype for the ITk pixel upgrade. The radiation tolerance of this chip has been measured experimentally in irradiation campaigns using X-rays. The chip utilises a large number of digital cells in the chip logic, and the radiation damage to these cells is characterised by considering ring oscillator gate delays. The analog front-end is studied by tuning the chip thresholds before and after irradiation. Both the digital and analog logic show no operational issues after irradiation to 1 Grad (at a dose rate of 4 Mrad/h).

Infrared Colloidal Quantum Dot Image Sensors

Quantum dots (QDs) have been explored for many photonic applications, both as emitters and absorbers. Thanks to the bandgap tunability and ease of processing, they are prominent candidates to disrupt the field of imaging. This review article illustrates the state of technology for infrared image sensors based on colloidal QD absorbers. Up to now, this wavelength range has been dominated by III–V and II–VI imagers realized using flip-chip bonding. Monolithic integration of QDs with the readout chip promises to make short-wave infrared (SWIR) imaging accessible to applications that could previously not even consider this modality. Furthermore, QD sensors show already state-of-the-art figures of merit, such as sub-2- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> pixel pitch and multimegapixel resolution. External quantum efficiencies already exceed 60% at 1400 nm. With the potential to increase the spectrum into extended SWIR and even mid-wave infrared, QD imagers are a very interesting and dynamic technology segment.

Observation of radiation damage in CdTe Schottky sensors created by 20 keV photons

The polarization characteristics of ohmic and (Al-)Schottky type CdTe sensors supplied by Acrorad have been characterized with the low noise, charge integrating readout chip JUNGFRAU, revealing defined areas in the Schottky type sensors, which were irradiated with 20 keV photons in previous experiments more than one year ago. These areas, which have absorbed doses of up to 1079 kGy, show a more robust charge collection compared to unirradiated areas. In contrast to this, no alteration of the polarization characteristics could be found in ohmic type CdTe sensors after irradiation. The polarization behavior of the sensors has been characterized in-situ over time and at different temperatures by using an homogeneous, low flux molybdenum fluorescence illumination. An increase of the leakage current in the irradiated areas was found and quantified as a function of absorbed dose as well as its influence on the stability on the number of photon counts. In addition to the influence of X-ray irradiation, the effect of thermal annealing on the polarization characteristics of Schottky type CdTe sensors has been studied. Possible routes for the usage of Schottky type CdTe sensors in synchrotron applications are outlined in this publication.

Multigrating design for integrated single-atom trapping, manipulation, and readout

An on-chip multi-grating device is proposed to interface single-atoms and integrated photonic circuits, by guiding and focusing lasers to the area with ~10um above the chip for trapping, state manipulation, and readout of single Rubidium atoms. For the optical dipole trap, two 850 nm laser beams are diffracted and overlapped to form a lattice of single-atom dipole trap, with the diameter of optical dipole trap around 2.7um. Similar gratings are designed for guiding 780 nm probe laser to excite and also collect the fluorescence of 87Rb atoms. Such a device provides a compact solution for future applications of single atoms, including the single photon source, single-atom quantum register, and sensor.

Flexible Pressure Sensor Array with Multi-Channel Wireless Readout Chip.

Flexible sensor arrays are widely used for wearable physiological signal recording applications. A high density sensor array requires the signal readout to be compatible with multiple channels. This paper presents a highly-integrated remote health monitoring system integrating a flexible pressure sensor array with a multi-channel wireless readout chip. The custom-designed chip features 64 voltage readout channels, a power management unit, and a wireless transceiver. The whole chip fabricated in a 65 nm complementary metal-oxide-semiconductor (CMOS) process occupies 3.7 × 3.7 mm2, and the core blocks consume 2.3 mW from a 1 V supply in the wireless recording mode. The proposed multi-channel system is validated by measuring the ballistocardiogram (BCG) and pulse wave, which paves the way for future portable remote human physiological signals monitoring devices.

Hydrophilic metal-organic frameworks integrated uricase for wearable detection of sweat uric acid

The chemistry of the metal-organic frameworks (MOFs) coating may affect the biological functionality of the encapsulated biomacromolecules in harsh environment. Enzymes encapsulated in hydrophilic MAF-7 can retain high activity in harsh environment. We conducted this study to prepare a non-invasive wearable uircase@MAF-7-based electrochemical sensor that can achieve accurate and sensitive detection of UA levels in sweat by integrating a flexible microfluidic chip and wireless electronic readout device. The flexible microfluidic chip enabled an easy and effective collection of sweat samples. MAF-7 protected enzyme activity by encapsulating uricase. The uricase@MAF-7-based electrochemical sensor enabled the highly sensitive detection of UA in the concentration range of 2 μM–70 μM with a detection limit of as low as 0.34 μM. Additionally, we evaluated the utility of the sensor for monitoring UA levels in real sweat samples by means of a high purine dietary challenge. This personalized wearable sweat sensing device has a potential to be used for monitoring disease-related metabolites in daily life.

High-spatial resolution measurements with a GaAs:Cr sensor using the charge integrating MÖNCH detector with a pixel pitch of 25 μm

The aim of this project is to determine the imaging capabilities of a 25 μm pixel pitch GaAs:Cr sensor of 500 μm thickness bump-bonded to the charge integrating MÖNCH 03 readout chip (also called GaAs-MÖNCH assembly) and to assess the possibility to improve the spatial resolution by applying a position interpolation algorithm developed at PSI. Measurements were performed at the TOMCAT beamline of the Swiss Light Source (SLS) using photon beams in the energy range of 10–30 keV. The imaging experiments indicate the possibility to enhance the spatial resolution of the detector beyond its actual physical pixel pitch. We have quantified the spatial resolution of a GaAs-MÖNCH assembly by means of the modulation transfer function (MTF), achieving 10 μm at 10 keV and 12 μm at 20 keV photon energies. By applying a modified interpolation algorithm, a spatial resolution of ∼5 μm was obtained for 16 keV when binning to 2.5 μm virtual pixels, while with the silicon-MÖNCH assembly, we achieved a spatial resolution of 3.5 μm, which serves as gold standard. The results are promising because they open new possibilities to perform imaging measurements using the GaAs-MÖNCH assembly at photon energies above 15 keV, where silicon sensors suffer from a diminishing quantum efficiency.

The CMS MTD Endcap Timing Layer: Precision timing with Low Gain Avalanche Diodes

The MIP Timing Detector of the CMS detector will provide precision timestamps with 40 ps resolution for all charged particles up to a pseudorapidity of η=3.0. This upgrade will mitigate the effects of pile-up expected under the High-Luminosity LHC running conditions and bring new and unique capabilities to the CMS detector. The endcap region of the MIP Timing Detector, called the Endcap Timing Layer, will be instrumented with silicon Low-Gain Avalanche Diodes, covering the high-radiation pseudorapidity region 1.6<η<3.0. The LGAD sensors will be read out by the ETROC readout chip, which is being designed for precision timing measurements. We present recent progress in the characterization of LGAD sensors for the Endcap Timing Layer and the development of ETROC, including test beam and bench measurements.

Automated visual inspection and defect detection of large-scale silicon strip sensors

For the Phase-II Upgrade of the ATLAS Detector, the Inner Detector will be replaced with the Inner Tracker (ITk), consisting of a pixel and a strip tracker. The 17,888 silicon strip detector modules comprising the ITk strip tracker will be assembled from silicon strip sensors and flexes with readout chips in a manual assembly process performed at 20 module assembly sites in a complex distribution chain, which requires quality control steps to be performed after each distribution and assembly step. Sensor quality control requires a visual inspection of the full sensor area (about 100 cm2) of each sensor to detect and log any defects (e.g. scratches, breakdown areas or chipped corners) or contamination. Since manual surveys of full sensor areas for several thousand sensors are both time-consuming and prone to errors, alternative methods were investigated to automate the process and improve its reliability. This paper presents a setup developed to take high-resolution images of full silicon strip sensors with high repeatability quickly and an algorithm developed for the automated detection of defects, built using functions and filters from popular open-source visual processing packages OpenCV and Scikit-image. Methods were developed both for small-scale high-resolution images and full-size sensor images with lower resolution — both are presented here.