A High Time-Resolved Front-End ASIC for APD Array Detector in Nuclear Resonant Scattering Experiments With Synchrotron Radiation

Abstract

A high time-resolved front-end readout chip has been developed for avalanche-photodiode (APD) array detectors in nuclear resonant scattering (NRS) experiments. The chip has eight channels. Each channel consists of a preamplifier, a voltage discriminator, an open-drain output driver, and a local digital-to-analog converter (LDAC). The application-specific integrated circuit (ASIC) chip has been designed and fabricated in a 0.13- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> CMOS technology with a chip size of 1.1 mm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times2.3$ </tex-math></inline-formula> mm. The electrical characterizations of all eight channels demonstrate good time resolution (TR) (rms) on the output pulse leading edge, with the measurement result better than 25 ps for high input signal charges (>30 fC) and better than 98 ps for low input signal charges (8–30 fC), for an APD sensor capacitance as large as 15 pF. The equivalent noise charge (ENC) received from the measurement can be represented as ENC = 592.4 e <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">−</sup> + 50.7 e <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">−</sup> /pF. The power consumption is 17.6 mW per channel: 2.7 mW for the preamplifier–discriminator stage and 14.9 mW for the output low-voltage differential signaling (LVDS) driver.