Abstract

Development of an advanced, application-specific integrated circuit (ASIC) for use with high-density, avalanche photodiode (APD) detector arrays has been undertaken. APD technology recently developed at Radiation Monitoring Devices (RMD) has demonstrated great promise in the form of compact arrays. While APD arrays are capable of providing the basis for a new generation of high-resolution, photon-imaging systems, it is extraordinarily difficult to use conventional pulse-processing circuitry to support the many signals generated by these arrays. Due to the high detector density, small size, and unique electronic features of APD arrays, conventional readout electronics quickly become problematic for the implementation to APD arrays in positron-emission tomography (PET) systems. As the focus of NIH Phase I Small Business Innovation Research (SBIR) research, we designed and developed an ASIC to enable the implementation of APD arrays in PET. The circuit incorporates preamplifier, timing, shaping, and sample-and-hold capabilities that are necessary for APD use in PET. The ASIC has been designed, fabricated, and has undergone preliminary evaluation. We report on the development process, operational requirements, and performance results.

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