Monolithic Integrated Circuit Research Articles

Collector Series-Resistor to Stabilize a Broadband 400 GHz Common-Base Amplifier

The indium phosphide (InP) 130 nm double-heterojunction bipolar transistor (DHBT) offers milliwatts of output power and high signal amplification in the lower end of the terahertz frequency band when the transistor is used in a common-base configuration. Instrumentation can directly benefit from this technology by enabling the development of novel broadband sources or synthesizers that rely on our ability to amplify the signal over enormous bandwidths. However, the design of high gain and stable amplifiers presents many obstacles and limitations as we increase the bandwidth and the carrier frequency. Here, we show that adding a series resistor at the collector terminal of the common-base transistor prevents instabilities in the terahertz monolithic integrated circuit amplifier and increases its fractional bandwidth. Adopting this technique, we report a state-of-the-art broadband common-base amplifier that exhibits a minimum small-signal gain of 18.9 dB from 325 to 477 GHz. This amplifier presents the highest fractional bandwidth and gain above 300 GHz. Our work demonstrates the feasibility of high-performance amplifiers that address the need of future terahertz electronic systems.

Atomic Layer MoTe2 Field-Effect Transistors and Monolithic Logic Circuits Configured by Scanning Laser Annealing.

Atomically thin semiconductors such as transition metal dichalcogenides have recently enabled diverse devices in the emerging two-dimensional (2D) electronics. While scalable 2D electronics demand monolithic integrated circuits consisting of complementary p-type and n-type transistors, conventional p-type and n-type doping in desired regions, monolithically in the same semiconducting atomic layers, remains elusive or impractical. Here, we report on an agile, high-precision scanning laser annealing approach to realizing 2D monolithic complementary logic circuits on atomically thin MoTe2, by reliably designating p-type and n-type transport polarity in the constituent transistors via localized laser annealing and modification of their Schottky contacts. Pristine p-type field-effect transistors (FETs) transform into n-type ones upon controlled laser annealing on their source/drain gold electrodes, exhibiting a mobility of 96.5 cm2 V-1 s-1 (the highest known to date) and an On/Off ratio of 106. Elucidation and validation of such an on-demand configuration of polarity in MoTe2 FETs further enable the construction and demonstration of essential logic circuits, including both inverter and NOR gates. This dopant-free, spatially precise scanning laser annealing approach to configuring monolithic complementary logic integrated circuits may enable programmable functions in 2D semiconductors, exhibiting potential for additively manufactured, scalable 2D electronics.

Development Of A Millimeter Wave Eight-Element Phased Array Antenna for 5G Mobile Communications

The fifth generation (5G) mobile communications systems demand millimeter wave (mmWave) bands of the electromagnetic spectrum beside the current sub-6 GHz frequencies. Allocation of mmWave frequencies for the cellular systems will ensure more capacity and higher speed links. For the last few years wireless communications societies in industry and academia have put significant research effort to develop novel and efficient antenna architectures. We need brand-new antenna structures that can overcome the challenges of 5G communications environment such as high propagation loss of mmWaves and the large bandwidth demand of the planned networks. In this paper, a microstrip mmWave antenna array for 5G mobile phone terminals is introduced. First, the single antenna element with the rectangular patch radiator is investigated. The numerical investigation is carried out with a full-wave electromagnetic solver. The single antenna design operates between 27.1 GHz – 28.95 GHz frequencies. The proposed antenna based on microstrip approach shows low profile characteristics without compromising performance. A maximum gain of ~7.7 dBi is achieved within the operation band. Then eight-element phased array implementation of the proposed antenna is analyzed. Uniformly spaced linear array method is used with ~λ/2 spacing in the configuration. The eight-element array boosts the maximum total gain value up to ~ 15 dBi, and yields beam steering at broadside up to ∓50° with low side lob levels (SLL). Furthermore, the proposed phased array design is compact with the dimensions of 10 mm×48.6 mm×0.51 mm, and therefore it is compatible with the mmWave band radio frequency integrated circuit (RFIC) transceivers.

Modeling and analysis of a high-Tc superconducting polarization-manipulating single-sideband mixer for terahertz communications

This paper presents systematic modeling and performance analyses of a 340-GHz dual-polarized antenna-coupled single-sideband (SSB) high-Tc superconducting (HTS) mixer for terahertz (THz) communication systems. The mixer features a fully monolithic-integrated circuit layout, which enables both sensitive heterodyne detection and high image rejection by appropriate polarization-manipulating operation. To predict the comprehensive performance of such a HTS mixer with relatively complicated network architecture and polarization relationships, an innovative modified three-port modeling approach is presented and developed by theoretical derivations. Using the measured Josephson junction parameters of our previous experimentally demonstrated HTS mixer module at the same band, the best conversion gain and SSB noise temperature of the presented mixer are predicted to be around −5 dB and 1200 K at the operating temperature of 40 K, respectively. In addition, the mixer exhibits a flat frequency response over a wide intermediate-frequency range from 15 to 25 GHz and high image rejection of more than 17 dB over the radio frequency operation range. The SSB HTS Josephson mixer will be useful for THz wireless communication applications.

Broadband 400-GHz InGaAs mHEMT Transmitter and Receiver S-MMICs

The modeling, design, and experimental evaluation of both a 400-GHz transmitter and receiver submillimeter-wave monolithic integrated circuit (S-MMIC) is presented in this article. These S-MMICs are intended for a radar-based system in the aforementioned operating frequency. The transmitter occupies a total chip area of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$750\times 2750\,{\mu {\rm m}^2}$</tex-math></inline-formula> . It consists of a multiplier-by-four, generating the fourth-harmonic of the WR-10 input signal, which drives the integrated WR-2.2 power amplifier. The latter has an output-gate width of 128 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\mu$</tex-math></inline-formula> m. The receiver S-MMIC, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$750\times 2750\,{\mu {\rm m}^2}$</tex-math></inline-formula> , consists of a multiplier-by-two, providing the second harmonic of the WR-10 input signal for the local-oscillator port of the subsequent integrated subharmonic mixer. The radio-frequency port of the latter, connects via a Lange coupler to a WR-2.2 low-noise amplifier (LNA). All the components included, are processed on a 35-nm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">${\text{InAlAs}}/{\text{InGaAs}}$</tex-math></inline-formula> metamorphic high-electron-mobility transistor integrated-circuit technology, utilizing two-finger transistors and thin-film microstrip lines (TFMSLs). The modeling approach of the amplifier cores and the respective design decisions taken are listed and elaborated-on in this work. Accompanying measurements and simulations of the transmitter and receiver are presented. The individual components of the aforementioned S-MMICs, are characterized and the results are included in this article. The state-of-the-art, for S-MMIC based circuits operating in the WR-2.2 band, is set by the LNA, on one side, spanning an operational 3-dB bandwidth (BW) of 310 to 475 GHz, with a peak gain of 23 dB and, on the other side, by the final transmitter design, which covers an operating range of 335 to 425 GHz with a peak-output power of 9.0 dBm and accompanying transducer gain of 11 dB. The included transmitter- and receiver-designs represent a first-time implementation in the mentioned technological process, utilizing solely TFMSLs, boasting the integration level, operating in the WR-2.2 frequency band, and setting the state of the art—to the authors’ best knowledge—for all S-MMIC based solutions in the respective frequency band, in terms of output power and gain over the operating 3-dB BW.

Enabling Automatic Model Generation of RF Components: A Practical Application of Neural Networks

Electronic computer-aided design (CAD), or electronic design automation (EDA), has achieved great importance in RF integrated circuit (RFIC) design in the past decade as semiconductor technology evolves to meet the needs of high-speed and high-reliability communication. Today, EDA tools are considered essential for a standard design flow. In many cases, the first-pass success of a modern RF design relies on the proper use of software tools, along with an accurate representation of the involved semiconductor technologies. For example, technology CAD (TCAD) can model the semiconductor device-fabrication process steps (such as diffusion and ion implantation) and simulate/model device operation by solving fundamental physics equations (with inputs such as geometrical dimensions and the doping profiles of the device). A process design kit for a specific technology contains a set of components and models that can be used for circuit simulation and layout design. In the competitive RF power business, where a short design cycle is desired and time to market is critical, a new device?s technology may need to be evaluated through a standard design flow, even before the parts are fabricated for testing. This has been made possible with the advent of EDA tools and advanced modeling techniques [1].

A Hybrid Antenna in Package Solution Using FOWLP Technology

Abstract Widespread millimeter wave applications have promoted rapid development of system in package (SiP) and antenna in package (AiP). Most AiP structures take the form of flip chip onto antenna substrate, where signal interconnect losses are introduced by solder bumps. The integration may be unavailable for chips with fine pad pitches. Fan-out wafer level package (FOWLP) with antenna patterning on redistributed layers (RDL) is another method for millimeter wave AiP. In this project, a hybrid integration AiP structure is developed. The microwave monolithic integrated circuit (MMIC) chip and antenna unit are integrated with chip-first FOWLP process. Multilayer organic substrate with fine pitch RDL interconnections meets the requirements of wideband antenna design. Modified coplanar waveguide is adopted to feed 2 × 2 aperture array formed on RDL layer. Package warpage is measured using Shadow Moire techniques. The antenna forms an aperture-coupled stacked patch array with bandwidth 25% and gain 8.5dBi for 60 GHz digital communication system. The proposed approach is a convenient hybrid integration solution adopting FOWLP process for millimeter wave AiP systems.

On the operating mechanisms of flexible microwave inductors and capacitors under mechanical bending conditions

Flexible microwave passive components play an important role in flexible integrated circuits, especially for high-speed wireless communication systems. It is clear that bending can have a significant impact on the flexible components’ performance. However, an analysis of the physical mechanisms of flexible microwave passive components under mechanical bending conditions has not been completed. In this paper, we describe a study of the performance variations and operating mechanisms of flexible microwave inductors and capacitors under mechanical bending conditions. Flexible spiral inductors and metal-insulator-metal capacitors of various dimensions were fabricated on plastic substrates and measured under different mechanical bending conditions. Modeling of the flexible components was conducted. The influence of mechanical bending on flexible inductors and capacitors was characterized based on experimental and modeled results. The underlying operational mechanisms of flexible inductors and capacitors under bending conditions are discussed using the distributions of the electric and magnetic fields from the model. In addition, the performance variations with different component parameters (e.g. the metal and substrate materials, the thicknesses of the metals and dielectrics) were studied under bending conditions. The results are helpful for the use of flexible microwave passive components in flexible microwave monolithic integrated circuits.

A Wideband Sliding Correlation Channel Sounder in 65 nm CMOS: Evaluation Board Performance

Emerging applications such as wireless sensing, position location, robotics, and many more are driven by the ultra-wide bandwidths available at millimeter-wave (mmWave) and Terahertz (THz) frequencies. The characterization and efficient utilization of wireless channels at these extremely high frequencies require detailed knowledge of the radio propagation characteristics of the channels. Such knowledge is developed through empirical observations of operating conditions using wireless transceivers that measure the impulse response through channel sounding. Today, cutting-edge channel sounders rely on several bulky RF hardware components with complicated interconnections, large parasitics, and sub-GHz RF bandwidth. This paper presents a compact sliding correlation-based channel sounder baseband built on a monolithic integrated circuit (IC) using 65 nm CMOS, implemented as an evaluation board achieving a 2 GHz RF bandwidth. The IC is the worlds first gigabit-per-second channel sounder baseband implemented in low-cost CMOS. The presented single-board system can be employed at both the transmit and receive baseband to study multipath characteristics and path loss. Thus, the singleboard implementation provides an inexpensive and compact solution for sliding correlation-based channel sounding with 1 ns multipath delay resolution.

Electrical Coupling for Monolithic 3-D Integrated Circuit Consisting of Feedback Field-Effect Transistors

In this study, for two cases of monolithic 3-dimensional integrated circuit (M3DIC) consisting of vertically stacked feedback field-effect transistors (FBFETs), the variation of electrical characteristics of the FBFET was presented in terms of electrical coupling by using technology computer aided design (TCAD) simulation. In the Case 1, the M3DIC was composed with an N-type FBFET in an upper tier (tier2) and a P-type FBFET in a lower tier (tier1), and in the Case 2, it was composed with the FBFETs of opposite type of the Case 1 on each tier. To utilize the FBFET as a logic device, the study on optimal structure of FBFET was first performed in terms of reducing a memory window. Based on the N-type FBFET, the memory window was investigated with different values of doping concentration and length of channel region divided into two regions. The threshold voltage, capacitance, and transconductance of two cases of M3DIC composed with proposed FBFET were investigated for different thickness of an interlayer dielectric (TILD). In the Case 1, only for reverse sweep, the threshold voltage of FBFET in the tier2 was changed significantly at TILD < 15 nm, and the capacitance and transconductance of FBFET in the tier2 changed significantly at TILD < 20 nm, as bottom gate voltage applied with 0 and 1 V. In the Case 2, the electrical characteristics of FBFET in the tier2 changed greater than Case 1 with different TILD.

A Yield-Improvement Method for Millimeter-Wave GaN MMIC Power Amplifier Design Based on Load—Pull Analysis

Process fluctuations can significantly affect the yield of millimeter-wave circuits based on submicrometer semiconductor processes. A yield-improvement design that incorporates passive circuits is well established. However, how to consider the process fluctuation in active circuit designs (e.g., power amplifiers) and improve yield is still a challenge. In this article, a yield-improvement load-pull design method, which can be used to find optimum load impedance accounting for high yield while maintaining good output performance, is presented. The yield-improvement load-pull theory is described using an analytical model of transistor large-signal performance considering the process fluctuation. A method of the yield-improvement load-pull for the practical microwave monolithic integrated circuit (MMIC) design is introduced in detail. For demonstration purposes, a high-performance Ka-band power amplifier MMIC is designed. The results show that with the proposed yield-improvement load-pull method, an obvious improvement of yield can be observed with only minimal sacrifice of the output power ( P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">out</sub> ) and the power added efficiency ( η <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">PAE</sub> ), respectively. As a result, the method of this article can be used to improve the yield of millimeter-wave/terahertz integrated circuits (ICs).

2.6-GHz Integrated LDMOS Doherty Power Amplifier for 5G Basestation Applications

This letter presents a compact output combining network for a packaged integrated asymmetric Doherty power amplifier (DPA) by taking advantage of device drain source capacitance, Cds and package parasitic components. A new method is introduced to/of/for absorbing part of the peaking amplifier's C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> ds</sub> into the impedance transformer, thus extending the C- L- C-based “ C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> ds</sub> -absorption” technique to two-way asymmetric DPAs. Based on the proposed combining network, a two-stage laterally-diffused metal-oxide semiconductor (LDMOS) integrated asymmetric DPA was designed and fabricated at 2.6 GHz. The fabricated RF integrated circuit (RFIC) is mounted in a quad flat no-lead (QFN) package. Under a single-tone continuous-wave (CW) signal at 2.6 GHz, the DPA achieves a peak power of 46 dBm, a linear gain of 31.7 dB, and a 48% power-added efficiency (PAE) at 8-dB output power back-off (OBO). The DPA also demonstrates good linearizability by meeting the 5G spectrum mask and achieving a digital predistortion (DPD) corrected adjacent channel power ratio (ACPR) better than -51.5 dBc for 160-MHz long-term evolution (LTE).

Antenna-in-Package Integration for a Wideband Scalable 5G Millimeter-Wave Phased-Array Module

This work introduces a multilayered organic package with embedded antennas that enables the integration of a scalable wideband phased array module supporting the n257, n258, and n261 5G frequency bands (24.25-29.5 GHz). The package comprises: 1) an 8×8 array of dual-polarized antenna elements with 5.1-mm spacing; 2) RF, intermediate frequency (IF), dc, and digital interconnects to support radio-frequency integrated circuits (RFICs), filters, and combiners; and 3) a ball-grid array (BGA); it is implemented in a compact 42.5 mm ×42.5 mm ×1.65 mm form factor. The design achieves wideband operation with a minimal cost or a complexity overhead (e.g., air cavities or additional substrates) by integrating a novel magnetoelectric dipole antenna in the package. Direct probing and radiation pattern measurements of three antenna variants in two prototype antenna array packages demonstrate >6-GHz bandwidth with 0-5-dBi gain. Measurement results for associated liquid crystal polymer-based bandpass filters and power combiners are also presented.

Термодеформационная модель субмодуля выходного усилителя мощности Х-диапазона

The results of 3D modeling in the Comsol Multiphysics software environment and calculation of temperature and thermal deformation fields of GaAs crystals of monolithic integrated circuits (MIS) of microwave amplifiers as part of the submodule of the X-band output power amplifier (VUM) and their contact connections with the substrate in pulse modes of operation with different duty cycles are presented. It is shown that the maximum temperature and thermomechanical stresses in the MIS crystal in the dynamic mode of operation significantly exceed the calculated values for the stationary mode and strongly depend on the pulse duty cycle of the power dissipated by the MIS. Thermomechanical stresses take the maximum value in some narrow region near the boundary of the adhesive connection of the MIS crystal with the mounting plate; this maximum value strongly depends on the temperature coefficient of expansion (TCR) of the adhesive and takes the lowest value when the TCR of the adhesive is equal to the TCR of the GaAs crystal.

A wideband mono-bit digital receiver circuit using InP/CMOS 3D heterogeneous integration

A mono-bit digital receiver circuit for instantaneous frequency measurement is presented. The circuit is co-designed with Indium Phosphide Double Heterojunction Bipolar Transistor and complementary metal oxide semiconductor (CMOS) devices. The chip is fabricated by InP/CMOS three-dimensional (3D) heterogeneous integration using the wafer-level bonding technique. The measurable signal frequency within + 15 to − 25 dBm power is up to 7.5 GHz with a 14-GHz clock. Compared to an integrated circuit (IC) with a traditional InP or CMOS technologies, the proposed chip could benefit from both InP and CMOS technology. In the heterogeneous integration, InP devices provide high operating frequency, broad signal bandwidth, and large input signal dynamic range, while CMOS devices achieve complex function with low power consumption. In this way, the system FoM is improved for a mono-bit digital receiver while the system power consumption is kept the same. This work also shows the great potential of the 3D heterogeneous integration for the high-performance mixed-signal and multifunction radio-frequency ICs.

A C-Band MEMS Frequency Discriminator With High Sensitivity and Linearity

This letter reports a C-band MEMS frequency discriminator with high sensitivity and linearity. The structure of the proposed discriminator is fabricated using GaAs Microwave Monolithic Integrated Circuit (MMIC) technology. The frequency discriminator consists of one dual-band power divider, one dual-band power combiner, one delay-line and the final MEMS thermoelectric power sensor. The purpose of the designed structure is to provide an ultra-wide working frequency band and simultaneously improve sensitivity and linearity. Both on-chip detector and packaged one are tested. S-parameter measurement illustrates good impedance matching covering 4–8 GHz. The frequency sensitivities of on-chip detector are $0.52~\mu \text{V}$ /MHz @ 17 dBm, $0.85~\mu \text{V}$ /MHz @ 20 dBm and $1.66~\mu \text{V}$ /MHz @ 23 dBm, while sensitivities of the packaged one are $0.43~\mu \text{V}$ /MHz @ 17 dBm, $0.84~\mu $ V/MHz @ 20 dBm and $1.48~\mu \text{V}$ /MHz @ 23 dBm, respectively. The experiment of response time shows that the rise time and fall time of on-chip detector are about $670~\mu \text{s}$ and $550~\mu \text{s}$ , while the corresponding times of the packaged one are about $980~\mu \text{s}$ and $730~\mu \text{s}$ .

A Modified CLTdSCR With Low Leakage and Low Capacitance for ESD Protection

A modified cross-coupling low-triggering dual-polarity silicon controlled rectifier ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${m}$ </tex-math></inline-formula> -CLTdSCR) for on-chip electrostatic discharge (ESD) protection is developed. Cross-coupling mechanism can effectively reduce the trigger voltage of the proposed structure. A lower leakage is achieved by replacing NMOS with PMOS and changed connection, and this also effectively reduces the parasitic capacitance of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${m}$ </tex-math></inline-formula> -CLTdSCR between anode and cathode. The new structure shows low-triggering voltage ~3.46 V, low leakage ~0.46 nA under normal operation condition, and low parasitic capacitance ~190 fF at zero bias. As such, the proposed <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${m}$ </tex-math></inline-formula> -CLTdSCR is an attractive device for radio frequency integrated circuits (RFICs) ESD protection.

GaN МИС малошумящего усилителя Х-диапазона

The purpose of this paper is to design a microwave monolithic integrated circuit (MMIC) for low noise amplifier (LNA) X-band (7-12 GHz) based on technology of gallium nitride (GaN) high electron mobility transistor (HEMT) with a T-gate, which has 100 nm width, on a silicon (Si) semi-insulating substrate of the OMMIC company. The amplifier is based on common-source transistors with series feedback, which was formed by high-impedance transmission line, and with parallel feedback to match noise figure and power gain. The key characteristics of an LNA are noise figure and gain. However, in this paper, it was decided to design the LNA, which should have a good margin in terms of input and output power. As a result, GaN technology was chosen, which has a higher noise figure compared to other technologies, but eliminates the need for an input power limiter, which in turn significantly increases the overall noise figure. As a result LNA MMIC was developed with the following characteristics: noise figure less than 1.6 dB, small-signal gain more than 20 dB, return loss better than -13 dB and output power more than 19 dBm with 1 dB compression in the range from 7 to 12 GHz in dimensions 2x1.5 mm², which has a supply voltage of 8 V and a current consumption of less than 70 mA. However, it should be said that LNA was only modeled in the AWR DE.

InP high power monolithically integrated widely tunable laser and SOA array for hybrid integration.

We present a monolithic InP-based photonic integrated circuit (PIC) consisting of a widely tunable laser master oscillator feeding an array of integrated semiconductor optical amplifiers that are interferometrically combined on-chip in a single-mode waveguide. We demonstrate a stable and efficient on-chip coherent beam combination and obtain up to 240 mW average power from the monolithic PIC, with 30-50 kHz Schawlow-Townes linewidths and >180 mW average power across the extended C-band. We also explored hybrid integration of the InP-based laser and amplifier array PIC with a high quality factor silicon nitride microring resonator. We observe lasing based on gain from the interferometrically combined amplifier array in an external cavity formed via feedback from the silicon nitride microresonator chip; this configuration results in narrowing of the Schawlow-Townes linewidth to ∼3 kHz with 37.9 mW average power at the SiN output facet. This work demonstrates a new approach toward high power, narrow linewidth sources that can be integrated with on-chip single-mode waveguide platforms for potential applications in nonlinear integrated photonics.

A flexible monolithic integrated silicon low noise amplifier on plastic substrate

Flexible radio frequency (RF) circuits are highly desirable for flexible communication and other miniaturized function modules. However, the prevalent studies on flexible high-speed electronics have mostly focused on individual elements such as transistors, inductors, capacitors and transmission lines. Research on flexible RF monolithic integrated functional circuits is still limited. This letter presents the design of a flexible monolithic integrated silicon RF low noise amplifier (LNA) on plastic substrate. For the LNA, a flexible thin film transistor (TFT) based on a silicon nanomembrane, high-frequency flexible inductors and capacitors are fabricated and modeled. The impedance matching circuit on plastic substrate is analyzed and optimized. The LNA has a gain of ∼11 dB and a noise figure (NF) of ∼4.3 dB at 300 MHz. The influence of the parasitics induced by the flexible impedance matching on the gain and NF is discussed. This study provides useful design guideline for flexible RF monolithic integrated circuits and expands the high frequency applications of flexible electronics.