Quasi-static Capacitance-voltage Characteristics Research Articles

The peculiarity of capacitance-voltage characteristics of the metal-insulator-nanowire structure

The quasi-static capacitance-voltage characteristics of the metal-insulator-nanowire structure have been theoretically studied with account of the surface states at the nanowire-insulator interface. At small radii, possible is the case when the entire bulk of nanowire is depleted before the onset of inversion of the conduction type near the surface will occur. In this case, there is a strong deviation of the capacitance-voltage characteristic from that in the standard MIS structure: with increasing voltage, the capacitance of the structure tends not to a constant value equal to the capacitance of the dielectric layer, but to zero.

Effect of Channel Engineering on Quasi-Static Capacitance-Voltage Characteristics of Double-Gate MOSFET

The quasi-static capacitance–voltage (QSCV) characteristics of 10-nm-gate-length double-gate N-type metal–oxide–semiconductor field-effect transistors (NMOSFETs) with Si, Ge, InAs, $$ {\hbox{In}}_{0.53} {\hbox{Ga}}_{0.47} {\hbox{As}} $$ , and GaAs as channel materials are studied and simulated using Silvaco ATLAS three-dimensional (3D) technology computer-aided design (TCAD) software. The QSCV approach offers the advantage of immunity against frequency dependence effects and the ability to measure small capacitances in the 100 fF range. In this device, we consider the self-consistent solution of Schrodinger’s equation with Poisson’s equation. The splitting of the conduction band into multiple subbands is considered, while there is no doping in the channel region. The effects of metal gate electrode engineering, channel engineering (Si, Ge, GaAs, $$ {\hbox{In}}_{0.53} {\hbox{Ga}}_{0.47} {\hbox{As}} $$ , and InAs), and different channel thicknesses with $$ \left( {{\hbox{Al}}_{2} {\hbox{O}}_{3} } \right) $$ as gate oxide having thickness of 0.8 nm on the QSCV characteristics are studied. A comparison of the QSCV characteristics is carried out for the above-mentioned channel materials, revealing a significant reduction in the inversion-mode QSCV characteristics for all the materials due to quantization that results in a decrease in the overall gate-to-channel capacitance and hence increases the threshold voltage of the MOS device. The QSCV characteristics are also useful to measure the oxide thickness, flat-band voltage, threshold voltage, maximum depletion region thickness, charge distribution in the dielectric, interface trap charge, and interface states between the channel and gate oxide before device fabrication.

In<SUB align="right">xGa<SUB align="right">1-xSb n-channel MOSFET: effect of interface states on CV characteristics

The capacitance-voltage (CV) characteristics of InGaSb based n-MOSFET are investigated by quantum mechanical calculation solving 1D self-consistent Schrodinger-Poisson equation using Silvaco's ATLAS device simulation package. The charge density profile is determined with and without wave function penetration within the oxide layer and Neuman boundary condition. Quasi-static CV characteristics are studied both for the positive and negative interface charge densities. The results obtained from the simulation demonstrate that the significant shift in threshold voltage entirely depends on the polarity of the interface charge density. The oxide-dependent gate capacitance is also explained by simulating first eigen energy with and without wave function penetration.

Interface properties of SiOxNy layer on Si prepared by atmospheric-pressure plasma oxidation-nitridation

SiOxNy films with a low nitrogen concentration (< 4%) have been prepared on Si substrates at 400°C by atmospheric-pressure plasma oxidation-nitridation process using O2 and N2 as gaseous precursors diluted in He. Interface properties of SiOxNy films have been investigated by analyzing high-frequency and quasistatic capacitance-voltage characteristics of metal-oxide-semiconductor capacitors. It is found that addition of N into the oxide increases both interface state density (Dit) and positive fixed charge density (Qf). After forming gas anneal, Dit decreases largely with decreasing N2/O2 flow ratio from 1 to 0.01 while the change of Qf is insignificant. These results suggest that low N2/O2 flow ratio is a key parameter to achieve a low Dit and relatively high Qf, which is effective for field effect passivation of n-type Si surfaces.

Quasi-static capacitance–voltage characteristics of pentacene-based metal–oxide–semiconductor structures

Quasi-static capacitance–voltage (QSCV) measurements are performed on modified metal–oxide–semiconductor capacitors in order to investigate the capacitance characteristics of the active channel region of organic thin-film transistors (OTFTs). Devices are fabricated on highly doped Si wafer with SiO2 as the gate dielectric and pentacene as the organic semiconductor. Hysteresis is observed in the QSCV characteristics, which is explained with the charge trapping in the organic semiconductor. In addition, we show that surface charges generated by Au penetration into pentacene can cause plateaus in the QSCV curves. A behavioral PSpice model is also presented which allows QSCV simulations of OTFTs to be performed.

Exact extraction method of trap densities at insulator interfaces using quasi-static capacitance–voltage characteristics and numerical solutions of physical equations

An exact extraction method of trap densities at insulator interfaces (Dit) has been developed using quasi-static capacitance–voltage (C–V) characteristics and numerical solutions of physical equations. First, the surface potential (ϕs) is calculated from the C–V characteristic by applying Q=CV to the insulator. Next, the flat-band voltage (Vfb) is determined by utilizing the fact that the total change of ϕs is equal to the bandgap energy (Eg). Subsequently, the electric potential (ϕ), electron density (n), and hole density (p) are calculated in the entire semiconductor by numerically solving the Poisson equation and carrier density equations so that the calculated surface potential (ϕs′) is equal to the measured ϕs. Finally, Dit is extracted by applying Gauss’s law to the insulator interface. Dit at an interface between a SiNx film deposited at low temperature and a Si wafer is extracted as an example.

Inversion layer formation in organic field-effect devices

One of the challenges for polymer electronics is the realization of complementary metal-oxide-semiconductor circuits, requiring both n- and p-channel transistors on the chip. The difficulty to create both accumulation and inversion layers in the same material has been attributed to obstacles to the synthesis of metallic source/drain contacts for efficient injection of both electrons and holes, and also to the fact that the electron and hole mobilities differ often by several orders of magnitude. Although the formation of inversion layers has been well understood in microelectronics, it has to be studied anew for organics, since the mobility and the intrinsic density are many orders of magnitude lower. An analytical estimate of the relation between relevant characteristic times reveals the peculiarities occurring in the organics. Detailed insight is obtained from a numerical simulation study for metal-oxide-semiconductor capacitors and transistors of different design. In simulated quasistatic capacitance-voltage characteristics hysteresis effects are obtained due to the inversion layer formation process. This mechanism can be understood by inspecting the internal density profiles obtained by the simulation. In addition, capaci-tance-frequency characteristics are simulated and analyzed in more detail with equivalent circuit models that describe the simulated characteristics well. Here, the relaxation times characterizing the transition between the maximum capacitance and the geometrical capacitance are determined by resistances and capacitances of sublayers, which can be ascribed different regions as oxide, bulk, depletion, accumulation, or inversion. Both the design and the source/drain contact properties influence the characteristics significantly.

Quasi-Static Capacitance–Voltage Characteristics of Polycrystalline Silicon Thin-Film Transistors

We have investigated the quasi-static capacitance–voltage (QSCV) characteristics of polycrystalline silicon thin-film transistors (poly-Si TFTs), focusing on how the integration time for the capacitance measurement affects the QSCV curves. We have found that the response time of the carriers in the OFF state of the TFTs can be estimated from the QSCV results. QSCV measurements with external illumination enable us to estimate the surface depletion capacitance of TFTs. We have also found that the QSCV characteristics vary with the channel length of TFTs, indicating that the channel length dependence must be taken into account when making a model of TFT capacitance in the OFF state.

Determination of the absolute value of the semiconductor surface potential by the quasi-static capacitance-voltage characteristics of an MIS structure

A simultaneous analysis of the derivatives CV′Vg of the experimental and ideal quasi-static capacitance-voltage characteristics (plotted as a function of the normalized differential capacitance of a metal-insulator-semiconductor (MIS) structure) allows identification of regions within the semiconductor band gap Eg, in which interface states are virtually aTSent and the relation between the surface potential ψS of the real semiconductor and the voltage Vg applied to the MIS structure may be readily ascertained. This allows an accurate enough determination of the additive constants ψS0(Vg0) necessary to calculate the dependence ψS(Vg) in the entire range of Vg by numerical integration of the experimental quasi-static C-V characteristic. The comparison of this dependence with the ideal one characterizes in detail the integral electronic properties of the semiconductor-insulator heterojunction: the Eg-averaged density of interface states, the qualitative pattern of their distribution over the band gap, and the flat-band voltage VFB and its components caused by a charge fixed in the undergate insulator and a charge localized at boundary states. A high accuracy of the VFB measurements allows detection of even a weak physical response of MIS structures to external factors or to variations in the heterojunction technology. Results of such an analysis for a typical SiO2/Si interface of an n-Si-MOS (metal-oxide-semiconductor) structure are considered. The application of CV′-CV diagrams for analyzing the high-frequency C-V characteristics is considered.

Quasistatic capacitance-voltage characteristics of plane-parallel structures: Metal/semi-insulator/metal

Quasistatic capacitance-voltage characteristics of plane-parallel structures of the semi-insulating GaAs with two metal contacts are calculated numerically. The model of residual shallow acceptors compensated for by an excess of deep donors is used for the semi-insulating GaAs. Under consideration is the relaxation regime for the charge transport in the semi-insulator. We analyze metal/semi-insulator/metal structures for various parameters of the metal contacts and of the semi-insulator. It is shown that a negative capacitance can be obtained in some cases. A more detailed analysis is performed for the following structure: p-type like metal contact/n-type semi-insulator/n-type like metal contact.

Influence of electric-field-assisted thermal ionization on the formation of the schottky barrier between metal and amorphous silicon

The expression for a distribution function of charge carriers over deep levels in terms of the Poole-Frenkel effect in the space charge region is obtained. The inclusion of this effect permitted us to calculate the influence of the electric-field-assisted thermal ionization effect on a space charge density, a distribution of potential in the space charge region, and quasistatic capacitance-voltage characteristics of the metal-〈amorphous silicon〉 contact.