PWM Strategy Research Articles

Induction Motor Drive with Trinary DC Source Asymmetrical Inverter

This paper deals a comparison of MATLAB based simulation of sinusoidal and trapezoidal PWM strategies applied to a trinary DC source nine level inverter fed R - load. The nine-level inverter fed induction motor drive is simulated only for that reference which provides better performance with R- load. Open loop and PI control schemes have also been developed for trinary DC source fed nine level inverter-based Induction motor drive to improve the responses under various sudden load changes at specified reference speed. The corresponding speed, torque and stator voltage are presented. Usual performance indices for transient operation of above drive are also evaluated and presented.

A Novel Modulation Strategy With Unconditional Neutral Point Voltage Balance and Three Switching Actions in One Switching Cycle for Neutral Point Clamped Three-Level Converter

The carrier-based pulsewidth modulation (CBPWM) and virtual space vector pulsewidth modulation (VSVPWM) for neutral point clamped three-level converter are reviewed briefly in this paper. A novel modulation strategy is proposed to maintain unconditional neutral point voltage balance under the full range of power factor and modulation index. The proposed PWM strategy is featured with three switching actions in one switching cycle, which is named 3SNPBPWM hereafter. In 3SNPBPWM, one phase is clamped to a certain level without switching action, and the other two phases have one and two switching actions in one switching cycle (SC), respectively. Moreover, a neutral point voltage recovery algorithm for 3SNPBPWM is also proposed. The performance of 3SNPBPWM is analyzed and compared with CBPWM and VSVPWM in terms of switching loss, waveform quality, and ability of neutral point voltage recovery. Finally, the feasibility and superiority of 3SNPBPWM are verified by experiment.

Carrier‐based PWM modulation strategy for dual‐output two‐stage matrix converter

In order to solve the complexity of the space vector pulse width modulation (SVPWM) strategy for dual-output two-stage matrix converter (DO-TSMC), this study proposes a carrier-based PWM (CBPWM) strategy. The topology of DO-TSMC is introduced, and the principle of alternating SVPWM between two groups of inverters is analysed. The inverter stage switching modulation sequence is optimized by reasonable selection and distribution of zero vectors. Based on the above analysis, according to the expressions of duty ratios and the carrier, the modulation waves of the rectifier stage and inverter stage are deduced. All the modulation waves are simple and regular, without trigonometric function calculations, and no sector judgments are required. The proposed CBPWM strategy is easily implemented by using only one symmetrical triangular carrier to generate the PWM signals for the rectifier stage and inverter stage. Furthermore, based on this strategy, a modified CBPWM strategy is proposed, which assigns the action time of each inverter according to the proportional coefficient. It can adjust the output voltage range of the two inverters flexibly. Finally, the experimental results are provided to verify the feasibility and validity of the proposed method.

Power quality improvement in wind energy conversion system using hybrid SVPWM inverter control technique for THD reduction

Wind energy is an abundant and naturally occurring source of energy that is being widely researched and implemented in recent times on a global scale. Quality of power generated from these renewable energy systems greatly determines the efficiency of such implementations. This research paper investigates and proposes a hybrid control scheme for reducing the total harmonic distortion which severely degrades the quality of power from energy conversion systems. The proposed hybrid space vector modulation scheme is a variant and improvement of the conventional PWM schemes. The produce more fundamental components with least harmonics by combining the merits of sinusoidal PWM and triangular carrier signal. The proposed modulation scheme is implemented in a closed loop PI controller scheme and results have been compared against three variants of PWM techniques namely sinusoidal, random and space vector PWM techniques and a drastic reduction in THD and power spectral density is observed justifying the superior performance of the proposed hybrid control scheme.

30 LEVEL MULTILEVEL INVERTER WITH TWO SWITCHED CAPACITOR AND REDUCED NUMBER OF SWITCHES

Multilevel inverters with a large number of steps can generate high quality voltage waveforms, good enough to be considered as suitable voltage source generators. An advanced multilevel inverter topology is proposed to optimize number of bidirectional switches. In this work the an five-level cascade H-bridge Inverter, which uses multicarrier based control structure and two capacitor with 10 switching MOSFETs topology is being presented. Analysis is done for RL and pure resistive load. The PWM strategy reduces the THD and this strategy enhances the fundamental output voltage. The experimental and simulated results show that total harmonic distortion of output voltage and current waveform shapes are 5.16 % and 5.77% respectively for RL load which are within the acceptable limits.

Generalized Formulations and Solving Techniques for Selective Harmonic Elimination PWM Strategy: A Review

Multilevel inverters (MLIs) are widely recommended for DC to AC power conversion as per the load requirements. The MLIs are preferred over other types of multilevel and conventional converters due to their ability to produce staircase output voltage waveforms with superior harmonics profile. However, the performance of MLIs largely depends on the modulation strategy employed. Among the various modulation techniques, the selective harmonic elimination (SHE) method is more efficient in eliminating low-order harmonics from the voltage waveform produced by MLIs. Proper mitigation of the dominant low-order harmonics results in reduction in switching losses in the semiconductor devices and improves the efficiency of the inverter. However, the analytical solution of the nonlinear SHE equations constitutes the main challenge. Over last few decades, various solving algorithms and techniques such as algebraic methods such as resultant theory, numerical techniques and optimization algorithms have been developed and proposed for selective elimination of unwanted harmonics. This review paper presents the various aspects of the problem formulations for SHE technique. Moreover, the detailed principle operation for five different SHE problem-solving techniques is also discussed in this paper. Solution trajectories corresponding to multiple solutions, PWM waveforms with single and multiple transitions at each voltage level and also for pulse-width-amplitude modulation are evaluated and presented to help the researchers gain better insight into the SHE problem and its solution.

Modified SVPWM Algorithm for Three Level VSI With Synchronized and Symmetrical Waveforms

To generate the required reference vector than triangle comparison based PWM techniques for three-level inverters the space vector based PWM (SVPWM) strategies contain broader choice of switching sequences. This space vector based PWM technique involves in various steps. These steps are computationally exhaustive. The SVPWM has been used in three phase inverter control system. The center-aligned PWM is the most effective way for the Microprocessor Control Unit implementation of the SVPWM, because it can easily generate the center aligned PWM of the multilevel inverters for generation of the signal of space vector pulse width modulation (SVPWM), this concept brings out the method. The inverter leg switching times are generated by this algorithm and middle vector switching times are centered in a sampled interval. The proposed algorithm does not require any sector identification. And it reduces the computational time as a result. The adjacent voltage space vectors are forming the small triangles it is called sectors. Multilevel converters can meet the increasing demand of power ratings and power quality associated with reduced harmonic distortion and lower electromagnetic interference. Furthermore to optimize switching waveforms, space vector pulse-width modulation algorithms offer great flexibility among them. Finally the results are verified through MATLAB/SIMULINK

Single inductor dual buck‐boost inverter based on half‐cycle PWM scheme with active clamping devices

This paper presents a single-phase differential-type photovoltaic inverter named single inductor dual buck-boost inverter (SIDBBI) based on improved half-cycle PWM (HPWM). Conventional DBBI (CDBBI) is a good option for photovoltaic application due to step-up/down ability for varying inputs. However, inherent high inductor current and corresponding increments of inductor size and device ratings have made it less attractive than other topologies. This paper proposes an HPWM scheme with active clamping switches to reduce inductor voltage swing, highly induced current and component stresses by eliminating output voltages offsets. Under the proposed modulation, component voltage stresses in CDBBI can be reduced by zero offset, and there arises a chance to integrate half-utilized inductors, main switches and complementary diodes of two modules into one set, which is the proposed SIDBBI topology. 500 W prototypes of the conventional/proposed inverters have been built for verifications and comparison. Detailed analysis and experimental results under the proposed HPWM show that the size of SIDBBI can be reduced by 40.4% than CDBBI, maintaining comparable efficiency over 96% and wide input coverage by step-up/down ability. Comparative results address that SIDBBI is competitive in terms of component counts, stresses and losses, compared with various kinds of buck-boost inverter topologies.

Performance evaluation of a permanent magnet electric-drive-reconfigured onboard charger with active power factor correction

This paper presents a comprehensive charging operation for an electric-drive-reconfigured onboard charger (EDROC) with active power factor correction (APFC). The charging topology exclusively utilizes the three-phase permanent magnet synchronous motor (PMSM) propulsion system as a three-channel boost-type converter in which only a contactor and a small diode bridge are added. First, the operation scenario of the EDROC is introduced. Second, the relationship between electromagnetic torque and rotor position is investigated. Third, the current ripple cancellation of the EDROC is discussed in detail. Moreover, to implement the single-phase APFC along with charging voltage/current regulation of propulsion battery, control strategies including current balancing and synchronous/interleaving PWM strategies are incorporated. Finally, 200W proof-of-concept prototype-based tests are conducted under different operation scenarios.

A PWM Strategy Based on State Transition for Cascaded H-Bridge Inverter Under Unbalanced DC Sources

A cascaded H-bridge (CHB) converter has been widely used and researched in industry since it is suitable for the operation under both normal and fault conditions. This paper proposes a novel pulsewidth modulation strategy based on state transition for CHB inverter with unbalanced dc sources to achieve high-quality line-to-line output voltages and maximize the linear modulation range. In this modulation strategy, the duration time of each switching state will be modified directly through the correction value. Ranges of correction value are derived by analyzing the modulation index limitation. Then, a proper correction value is added into duration times to transform the switching states and extend modulation index to the maximum value. Meanwhile, balanced ac currents can be obtained under unbalanced dc sources condition, even under larger unbalanced coefficients. Furthermore, a three-phase power control algorithm is introduced to achieve the balanced distribution of three-phase power. Compared with the traditional zero-sequence voltage injection method, the proposed strategy is more convenient and effective theoretically, and it can be applied to the higher level CHB converter. The advantage and effectiveness of the proposed strategy are verified by simulation and experimental results.

Inductance optimisation method of a four-wire shunt APF based on unified mathematical model

ABSTRACTLeg inductors which connect a shunt Active Power Filter (APF) to power network play a crucial role in guaranteeing desired performances of the APF. Optimal tuning of the inductances is still a tricky problem that has not yet been tackled systematically and theoretically. This paper proposes a novel inductance optimisation method that is universally applicable to four-wire shunt APFs with arbitrary topologies and PWM strategies. Based on the unified mathematic model, indexes used to quantitatively evaluate the abilities of a four-wire APF in compensating phase harmonic currents and depressing neutral line current are formally formulated. The upper and lower value constraints of the inductances are derived by comprehensively taking into account the characteristics of load harmonic profile and PWM strategy. Inductances are further optimised in the feasible value ranges with concern of several engineering application issues. Simulation and lab experiment results are provided to verify the validity and effectiveness of the proposed method.

Efficiency‐optimised modulation technique of three‐level NPC inverter

The three-level NPC inverter has many advantages, such as the characteristics of high output power, low device stress, and low harmonic distortion of output waveform. It is widely used in the fields of high-voltage conversion and reactive power compensation. As the most commonly used multi-level inverter, three-level NPC inverter has its own disadvantage which is the NP potential fluctuations. It may lead to poor output performance even damage to the devices. Therefore, the problem of NP potential fluctuation of three-level NPC inverter has been the hotspot of its research. This paper presents an efficiency-optimised dual modulation wave carrier-based PWM (DMWPWM) strategy of three-level NPC inverter. First, the basic principle of traditional DMWPWM is analysed, and the deficiency of traditional DMWPWM modulation technique is described. Then, the efficiency-optimised DMWPWM strategy is deduced. Compared with traditional DMWPWM strategy, the new strategy inherits the advantage of traditional DMWPWM that the NP voltage balance can be maintained in any modulation index and power factor. Moreover, it can reduce the system switching loss which leads to efficiency improvement, and it is simple and easy to implement. Finally, the proposed modulation technique is verified by simulation.

Performance Analysis and control strategies of Cascaded Multilevel Converters

Multilevel inverters have been widely used for high-voltage and high-power applications. Their perf0rmance is greatly superi0r t0 that 0f c0nventi0nal tw0-level inverters due t0 their reduced t0tal harm0nic dist0rti0n (THD),. This t0p0l0gy requires fewer c0mp0nents when c0mpared t0 di0de clamped, flying capacit0r and Bridgeless cascaded inverters and it requires fewer carrier signals and gate drives. Theref0re, the 0verall c0st and circuit c0mplexity are greatly reduced. This paper presents a n0vel reference and multicarrier based PWM scheme It als0 c0mpares the perf0rmance 0f the pr0p0sed scheme with that 0f c0nventi0nal cascaded bridge less rectifier (CBR) multilevel inverters. finally Simulati0n results fr0m MATLAB/SIMULINK are presented t0 verify the perf0rmance 0f the Five-level Multilevel Inverter

Analysis of generalized continual-clamp and split-clamp PWM schemes for induction motor drive

Continual-clamp pulse width modulation (CCPWM) clamps each phase of a three-phase inverter to one of the two dc buses continually for \(60^{\circ }\) duration in each half of the fundamental cycle. Split-clamp pulse width modulation (SCPWM) divides the \(60^{\circ }\) clamping interval into two sub-intervals, which are not necessarily equal, and falling in two different quarter cycles. Whether continual clamp or split clamp, the positioning of the clamping interval in case of CCPWM, and the ratio of splitting the clamping interval in SCPWM – all influence the waveform quality of the inverter output. This paper derives analytically closed-form expressions for the total RMS harmonic distortion factor and torque ripple factor pertaining to CCPWM with any arbitrary position of the clamping interval (i.e., generalized CCPWM) and also corresponding to SCPWM with any arbitrary ratio of splitting of the clamping interval (i.e., generalized SCPWM). The analytical results are well supported by experimental results on 3-hp and 5-hp induction motor drives.

Analysis of Equivalent Inductance of Three-Phase Induction Motors in the Switching Frequency Range

The equivalent inductance of three-phase induction motors is experimentally investigated in this paper, with particular reference to the frequency range from 1 kHz to 20 kHz, typical for the switching frequency in inverter-fed electrical drives. The equivalent inductance is a basic parameter when determining the inverter-motor current distortion introduced by switching modulation, such as rms of current ripple, peak-to-peak current ripple amplitude, total harmonic distortion (THD), and synthesis of the optimal PWM strategy to minimize the THD itself. In case of squirrel-cage rotors, the experimental evidence shows that the equivalent inductance cannot be considered constant in the frequency range up to 20 kHz, and it considerably differs from the value measured at 50 Hz. This frequency-dependent behaviour can be justified mainly by the skin effect in rotor bars affecting the rotor leakage inductance in the considered frequency range. Experimental results are presented for a set of squirrel-cage induction motors with different rated power and one wound-rotor motor in order to emphasize the aforesaid phenomenon. The measurements were carried out by a three-phase sinusoidal generator with the maximum operating frequency of 5 kHz and a voltage source inverter operating in the six-step mode with the frequency up to 20 kHz.

PWM Strategy with Multiple Carriers for Hybrid Multilevel Inverters Adapted from PV-Based

This research makes a design recommendation for a multilayer solar inverter that uses the level shift pulse width modulation technology. Inverters that have numerous layers are able to take advantage of switching at many frequencies, with the fundamental frequency being the frequency with the lowest switching rate. In this particular instance, we make use of not one but two signals: one serves the function of a carrier signal, while the other serves the function of a reference signal. In multilayer level inverters (MLI), the triangle wave is used as a carrier signal, while the sinusoidal wave is employed as a reference signal for the method of pulse width modulation. In addition, the sinusoidal wave is used as a reference signal for the pulse height modulation technique. These two waves are combined to produce what is known as a multilayer level inverter (MLI). This study will conduct an in-depth investigation into how adjusting the level shift of the carrier signals affects hybrid PV-based MLIs and how to count harmonics in multilayer PV-based inverters. Both of these things increase voltage and significantly reduce losses. Both of these things are important for this study. Both of these subjects are going to be discussed at length in this investigation. In order to do an analysis of the voltage and current harmonics, a level shift method simulation is run on a multilayer cascaded hybrid PV-based inverter using Matlab/Simulink. This simulation is utilised to accomplish the task.

Discontinuous PWM Strategy for Neutral Point Clamped Three-Level Inverter to Achieve Multiple Control Objectives

In order to reduce switching loss of neutral-point clamped (NPC) three-level inverter (TLI), a switching loss minimized discontinuous PWM (SLMDPWM) strategy is proposed firstly. There are DC offset and AC ripple on the neutral-point (NP) voltage when SLMDPWM is used, which causes an appearance of low frequency harmonics (LFHs) in the output voltage. Aiming at this drawback, reduced LFHs (RLFHs) method is then proposed. While using RLFHs, the self-equilibrium ability of NP voltage is thus lost. So, active neutral-point voltage control (ANPVC) is also proposed. The performances of NPC TLI with the proposed DPWM and other DPWMs are compared by simulation and experimental results. The results show that switching loss, LFHs can be reduced significantly and the NP voltage can be controlled within an allowable range. Therefore, the multiple control objectives of reduced switching loss, no LFHs and allowable NP voltage are achieved.

Realization of Smooth Transition in Hybrid PWM Scheme for Induction Motor Control

Hybrid pulse width modulation schemes are widely used in high-power traction converters with a limited switching frequency. During the transition between modulation modes, sudden changes in the voltage harmonics cause the induction motor to enter a transient process, and ultimately lead to torque impacts, current shocks and other adverse effects. To improve the existing solution for such effects, theoretical support is provided in this paper by using an equivalent circuit model and a dynamic model of an induction motor, and a specific implementation scheme for a smooth transition is given considering the third-harmonic frequency component that appears in the phase voltage during the transition. The feasibility and correctness of the scheme are proven by a simulation and an experiment.

A Generalized Discontinuous PWM Scheme for Three-Level NPC Traction Inverter With Minimum Switching Loss for Electric Vehicles

A discontinuous pulsewidth modulation (DPWM) strategy for three-level neutral-point-clamped (NPC) traction inverter drive for electric vehicles (EVs) with minimum switching loss for the full power factor (PF) range is developed and presented in this paper. Considering the dynamic loading conditions in an EV propelled by an induction motor (IM), the discontinuous modulation strategy is generalized to obtain minimum switching loss for a wide variations in load PF and modulation depth. The dynamic operating conditions in EV may render frequent unbalances in dc-link capacitor voltages in NPC inverter. It is demonstrated that the addition of an appropriate offset signal with the reference discontinuous signals generates compensating neutral current in the right direction, which can be used to mitigate existing unbalance in two dc-link capacitor voltages. Minimum switching loss at variable PF is attained by positioning the nonswitching clamped regions of the reference auxiliary signals according to the load PF. The effectiveness of the proposed scheme for a wide range of torque/speed variations is studied through simulation by developing a MATLAB/SIMULINK model of an IM traction inverter drive with field-oriented control strategy for closed loop control. Finally, the modulation scheme is validated through experimentation in a small-scale prototype NPC inverter with motor loads.

Comparison of Seven and Nine Level Flying Capacitor-Multilevel Inverter using Staircase and Stepped Modulation

In this paper, a seven-level and nine-level flying capacitor inverter (FLI) is modeled and simulated. For the control of the switches, distinct multicarrier PWM strategies such as In Phase Disposition (IPD) PWM, Phase Opposition Disposition (POD) PWM and Alternative Phase Opposition Disposition (APOD) PWM are implemented by considering three reference signals, namely sine, step and staircase. Intensive simulation experiments are carried out under matlab/simulink environment and fundamental value and harmonics of output voltages of the seven-level FLI and nine-level FLI under different modulation conditions viz., IPD, POD, APOD are measured and compared. Simulation results illustrates IPD and POD technique gives a better output waveform with lower THD value than APOD technique.