Abstract
Aimed at reducing the switching loss and common-mode voltage amplitude of high-power medium-voltage three-level inverter under low modulation index conditions, an improved synchronous space vector PWM strategy is proposed in this paper. The switching times in each fundamental period are reduced by the re-division of small regions and the full use of the redundant switching state. The sum of switching algebra is introduced as an evaluation index and the switching state with the minimum value of the sum of switching algebra are adopted. Then, the common mode voltage amplitude is reduced. The theoretical analysis and experimental results show that the improved modulation strategy proposed in this paper can effectively reduce the switching loss and common-mode voltage amplitude of the inverter under the condition of the low modulation index. Moreover, the neutral-point voltage ripple is also reduced simultaneously.
Highlights
Compared with the traditional two-level converter, the multi-level converter has numerous advantages, such as reduced total harmonic distortion (THD), low dv/dt, and high inversion efficiency
This paper presents a synchronous space vector modulation strategy that can reduce the switching waveform quality of the converter is guaranteed and the switching loss is reduced
This paper presents a synchronous space vector modulation strategy that can reduce the method is proposed the traditional switching design using the redundant switchingbased loss andon common mode voltage amplitude sequence simultaneously at lowrules
Summary
Compared with the traditional two-level converter, the multi-level converter has numerous advantages, such as reduced total harmonic distortion (THD), low dv/dt, and high inversion efficiency. Based on the analysis of Reference [13], Reference [14] proposes a double zero vector synthesis sequence method, which can reduce the output current ripple while ensuring the zero common mode voltage amplitude of the inverter. In Reference [15], a method of reducing switching loss by adjusting the position of the zero vector in the sampling period is proposed, and the basic vector synthesis switching sequence with small common mode voltage amplitude is selected. Aiming at the switching loss and common mode voltage vector, amplitude a new switching strategy is sequencethe design method is proposed based on the switchingloss sequence rules. By formed to achieve simultaneous suppression oftraditional the switching anddesign common mode voltage using the redundant switching state of the three-level inverter space voltage vector, an improved amplitude under the low-modulation. Common mode voltage amplitude under the low-modulation index of NPC
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