In this paper, a frequency selective degeneration technique using a parallel network with a resistor and capacitor is proposed for a 6–18 GHz GaAs pseudomorphic high electron mobility transistor (pHEMT) broadband power amplifier integrated circuit (PAIC). The proposed degeneration network is applied to the source of the transistor to flatten the frequency response of the transistor in conjunction with feedback and resistor biasing circuits. An almost uniform frequency response was achieved at the wide frequency band through optimizing the values of the capacitor and resistor for the degeneration circuit. Single-section matching networks for small chip sizes were adopted for the two-stage amplifier following the flat frequency characteristics of the degenerated transistor. The proposed broadband PAIC for the 6 to 18 GHz band was fabricated using a 0.15 μm GaAs pHEMT process and had a chip size of 1.03 × 0.87 mm2. The PAIC exhibited gain of 15 dB to 17.2 dB, output power of 20.5 dBm to 22.1 dBm, and linear output power of 11.9 dBm to 13.45 dBm, which satisfies the IMD3 of −30 dBc in the 6–18 GHz band. Flatness for the gain and output power was achieved as ±1.1 dB and ±0.8 dB, respectively.