Power Semiconductor Switches Research Articles

Fault-Tolerant Operation of Bidirectional ZSI-Fed Induction Motor Drive for Vehicular Applications

This paper presents an efficient and fast fault-tolerant control scheme for a bidirectional Z-source inverter (BiZSI)-fed induction-motor drive system for vehicular applications. The proposed strategy aims for the fault detection, localization and diagnosis of the proposed system during switch failures in the inverter module. Generally, power–semiconductor switch failures in inverter modules occur due to open- and short-circuit faults. An efficient modulation scheme is proposed and design specifications are thoroughly derived to obtain high voltage gains across the BiZSI network. A suitably fast detection and diagnosis scheme to isolate the faulty leg and resume the normal operation is discussed in this paper. The control scheme is provided such that the faulty leg is isolated and the motor phase is fed from a redundant leg to resume the operation. A feasible localization algorithm based on experimentally derived values and switching vectors is implemented. In addition, a fast fault diagnosis method based on current estimation and motor speed variation is designed and implemented. Moreover, the most important advantages of the proposed strategy include lower hardware requirements and less harmonic distortion in the output currents. Finally, the simulation and experimental results are presented to validate the feasibility of the theoretical analysis. An extensive performance evaluation of the proposed system with fault ride-through capabilities is performed to prove its suitability for vehicular applications. To validate its merits, the proposed strategy is compared with similar fault-tolerant schemes currently used in the industry.

A Fault-Tolerant Power Converter With Multi-Switch Fault Diagnosis and Repair Capability for 4-Phase 8/6 SRM Drives

In this article, a modular fault-tolerant power converter for 8/6 four-phase switched reluctance motor (SRM) drives is presented. The proposed converter can work for both open-circuit (OC) and short-circuit (SC) fault conditions in the power semiconductor switches. A semiconductor switch module and a relay circuit are used for achieving the fault tolerance feature. The proposed converter is modular and provides independent fault-tolerant control for all phases. It also uses a minimum number of switches when compared with other fault-tolerant converter topologies. The proposed converter is tested for a fault in single as well as multiple phases using MATLAB/Simulink software and is validated experimentally on a 0.6 hp 8/6 SRM using an FPGA-based hardware setup developed in the laboratory. Detailed results are presented and compared with existing fault-tolerant converter topologies. A fault repair time of 2 ms has been achieved for both open and SC faults.

Behaviors and Mechanism of Electrical Breakdown in Short Vacuum Gaps Under Pulsed DC Voltage

A topology consisting of a mechanical bypass switch and a power semiconductor switch (IGBT and IEGT) in parallel is widely used in high-voltage flexible dc transmission converter and static var generator (SVG). The mechanical switch will close quickly when the power semiconductor switch fails, which will cut off the failure device to protect the whole converter valve. Therefore, the mechanical contacts of the bypass switch need to close fast (within 3 ms) without contact bounce, which could only be achieved if the gap between the two contacts is extremely short (approximately 1 mm). Vacuum interrupter (VI) is most suitable for this application due to its advantages, such as compact size, high safety, environmental friendliness, long service life, and hardly oxidized contacts. In this article, a vacuum test rig is built, and the electrical breakdown behaviors of the short vacuum gaps under continuous and pulsed dc voltages are studied. It is confirmed that breakdown voltage under pulsed dc voltage is much lower than that under continuous dc voltage owing to the free and weakly bound microparticles on the contact surfaces. Finally, a new model describing the breakdown mechanism is proposed to explain the behaviors revealed in the experimental test.

High performance of dual input H-bridge DC-DC converter in solar application

Three-port power converter (TPC) is key element in solar photo-voltaic (PV)-battery based power conversion applications. In this paper, dual input bridge converter (DIBC) is considered, which is a TPC with high-frequency transformer isolation between power source and load. It has dual inputs for connecting two energy sources (PV module and battery) and single output port. At first, this paper describes design steps to decuple two important controllers, namely input voltage controller (IVC) and output voltage controller (OVC) for load. Here, the switching signals for four power semiconductor switches of the DIBC are produced by joint actions of above said control loops. The performance of traditional system is found satisfactory under maximum power point tracking (MPPT) operation. But the conventional system fails to work during fully charging condition of battery during MPPT mode due to power imbalance and it can also overcharge battery. In the situation, load power tracking (LPT) operation for DIBC is developed and proposed in this paper to keep power balance. Thus, the overcharging of battery is prevented by LPT operation and thus, degradation of battery is avoided i.e. its life-time can be improved. The controllability of DIBC under MPPT and LPT modes is verified through MATLAB-SIMULINK software and hardware testing prototype. The obtained results of both studies affirm high performances of overall system during wide operating conditions.

Auto-Bias Electrical Variable Capacitor of Reduced Active Component Count and Voltage Stress for 13.56 MHz RF Plasma Process

This article introduces a novel electrical variable capacitor (EVC) circuit for use in the impedance matching circuits employed by 13.56 MHz RF plasma systems. The proposed design employs a turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> / <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> using bias current and voltage condition technology, reducing the number of active components necessary for the EVC to operate. Experiments comparing the proposed EVC to state-of-the-art alternatives confirmed that the proposed design successfully operated with the reduced number of active components. Proposed EVC of automatic bias action by the power semiconductor switch may improve the impedance matching circuits used in high-power and high-frequency RF plasma system.

Improved Coordinated Control Strategy for Reliability Enhancement of Parallel PFCs With LCC Restriction

Power flow controllers (PFCs), which adopt high voltage and large power converters, are the significant device of cophase traction power supply systems (TPSSs); therefore, it is important to enhance the reliability of PFCs. Due to the limited capacity of power semiconductor switches, parallel connection of PFC units has been encouraged, and system reliability can be enhanced by configuring standby PFC units. However, while the increase in the number of redundant modules is accompanied by higher investment, the reliability improvement also has a saturation effect. In addition, among the control techniques of parallel PFCs, one of the commonly employed methods is current-sharing control, but the thermal stress of converters is increased at low loads. Therefore, in this article, a PFCs’ cost model is built based on life cycle cost (LCC) theory, and the number of basic, redundant PFC units is determined with the constraint of the minimum average annual cost. Furthermore, an improved coordinated control strategy that can alleviate thermal stress is proposed. Under a high load, all the PFC units are operated simultaneously, while, under a low load, the units are operated by turns. Moreover, to ensure consistent reliability and maximize system reliability, the rotation working time of each unit and the load demarcation point are optimized considering negative sequence compensation constraints. Case studies show that the given control strategy can extend the life span up to 26.30% and achieve a 19.11% cost reduction.

Evaluating Cu Printed Interconnects “Sinterconnects” versus Wire Bonds for Switching Converters

This paper demonstrates the feasibility of the printed copper (Cu) paste interconnects for applications in power semiconductor modules and switching converters. Copper sinter paste interconnects denoted as “Sinterconnects” have been recently introduced as an alternative to wire-bonding technology for power electronic device packaging. However, the electrical domain properties of these novel interconnects have not yet been investigated in detail. To address this research opportunity, this paper evaluates the performance of two different types of Sinterconnects applied to multi-chip, insulated gate bipolar transistor (IGBT) power modules. First, parasitic or stray inductances of these Sinterconnected systems are calculated analytically and by using three-dimensional finite element (FE) analysis. In addition to that, resistivity (ρ) of those has been analysed and compared with conventional wire bond technology. Finally, the performances of the Sinterconnects in power device assemblies are experimentally investigated. Two Sinterconnect structures (i.e., printed Cu paste and Cu clip attach) as well as a state-of-the-art wire-bonded IGBT module, have been integrated into a switching DC-DC converter and benchmarked. Experimental measurements show how converters with Sinterconnects enable efficient power conversion.

Model Predictive Control of PMSM Motor Drive for Electric Vehicle Applications with Space Vector Modulation

The Multi-Level Inverters (MLI) are most predominantly used in industrial applications as they reduce dv/dt ratio, switching stress of the power semiconductor switches, etc. The industries are slowly shifting from three phase inverters to five phase inverters as they produce lower current per phase, less switching losses, low Common Mode Voltage (CMV), etc. The Space Vector Modulation (SVM) is one of the controlling techniques for driving the inverters which reduces the Total Harmonic Distortion (THD) and improves the dc link balancing. The switching vectors available for five phase Three Level (3L) Neutral Point Clamped (NPC) Inverter is 243 vectors, out of which 51 vectors are selected that produce zero CMV. The controlling of the inverter is done by Model Predictive Control (MPC) Technique in which the error is reduced. The performance of the inverter is evaluated through MATLAB Simulink.

New Control Approach of Multicell Stacked Cell Inverter for Solar Photovoltaic System

This paper presents the study, modelling, and simulation of the DCSVM (Duty Cycle Space Vector Modulation) control technique applied to a new inverter topology dedicated to isolated or grid-connected photovoltaic systems using the MATLAB/Simulink software. This inverter is based on the structures of a stacked multicell converter (SMC) and an H-bridge. This new topology allows the voltage stresses of the converter to be distributed among several switching cells. It also allows the input voltage to be divided into several fractions so that the number of switching power semiconductors is reduced. The DCSVM is a control technique that generates control signals to the two-level voltage converter as well as the intermediate times. The main advantage of this control technique is the reduction in the number of calculations, especially for the trigonometric functions and the generation of the reference voltage. In this contribution, the general topology of this microinverter is described and the DCSVM control technique is presented. Finally, simulation results, the efficiency of this topology, and the validity of the DCSVM control in a grid-connected PV generation system are discussed. The results obtained are very satisfactory.

An Improved Conventional Diode-Clamped Multilevel Inverter Using Non-Zero Triangular- Based Unipolar Modulation Scheme

This paper presents an improved conventional diode-clamped multilevel inverter using non-zero triangular-based unipolar modulation scheme. The proposed scheme is meant to reduce the number of carrier waves, minimize the circuits of modulation scheme and obtain stabilized output voltage waveforms. Non-zero triangular-based unipolar modulation scheme is actualized by using two zero-free triangular wave carriers and two modulating sinewaves for line-to- line five level output voltage waveforms in single phase full bridge diode-clamped multilevel inverter unlike conventional multicarrier sinusoidal pulse width modulation that uses four triangular waves and one modulating sinewave for the same inverter type. The proposed system also used microcontroller in the combinational of its wave signals in order to generate the appropriate triggering signals for switching the power semiconductor switches. The proposed system has the following features: (i) It produces two distinct triggering trains (W1 and W2) meant to reduce the low and high harmonics unlike conventional modulation techniques (ii) All its carrier waves operate in continuous current mode which makes it unique from other multicarrier and other related modulation schemes (iii) it has low component counts. The proposed scheme on the conventional diode-clamped inverter produced the following results: voltage and current with total harmonic distortions of 0.4547%, stabilized 400V output voltage and 20A output current, probability results at each level of voltage and current occurrences are 0.10, 0.25, 0.25, 0.75 and 0.90; power output of 80kW, low component counts of modulation circuit scheme and experimental prototype.

A novel selective harmonic elimination for duple voltage boosting nine level inverter topology with fewer switching components for renewable energy applications

ABSTRACT A multilevel inverter plays a predominant role in improving the performance as well as efficiency of the inverter. In this study, the proposed idea of the selective harmonic elimination (SHE) for Duple Voltage Boosting nine-level inverter topology with fewer switching components possesses two times better voltage boosting capability than the considered conventional models. The proposed inverter comprises 12 power semiconductor switches, two capacitors, and a single diode, which is connected to a single dc (direct current) source. The duple 9-level topology has been studied and evaluated under different multicarrier PWM (pulse width modulation) techniques in order to obtain lw THD (total harmonic distortion), and the results proves that the Level Control PWM Technique exhibits a better THD value of 9.35%. To improve the quality of the output waveform, the SHE has been designed to fix the predominant harmonics so that the lower order harmonics are minimized to generate a lower THD. A detailed discussion has been made with the results of the proposed inverter THD, which are then compared with other nine-level inverters MATLAB/SIMULINK that has been used to perform the simulation of the duple model, and the obtained simulation results have been validated for different modulation indices. The FPGA SPARTAN 6E controller tests the experimental prototype of the nine-level inverter, and their cost function is represented in dollars, which is compared with the other similar nine-level inverters.

Real-Time Nonlinear Behavioral Electrothermal Device-Level Emulation of IGBT on Heterogeneous Adaptive Compute Acceleration Platform

Power converter design evaluation by means of real-time simulation techniques is prevalent, although it is mostly restricted to simple power semiconductor switch models that exclude device-level physical details. In this work, the nonlinear high-order electro-thermal model of the Insulated-gate bipolar transistor (IGBT) is developed and then deployed onto the heterogeneous digital hardware for real-time implementation. As the complexity of the nonlinear behavioral model (NBM) of the IGBT poses a significant computational burden on real-time hardware emulation, machine learning (ML) methodology is utilized so that the trained model can reproduce the characteristics of its original counterpart as much as possible and then it is implemented on the Adaptive Compute Acceleration Platform (ACAP), which composes of the processing system (PS), programmable logic (PL), and Artificial Intelligent Engine (AIE). The vector multiplication feature of the AIE caters to mathematical operations of the ML-based model particularly well and consequently enables it to be executed in real-time with remarkable speedup over the original model with which matrix inversion is otherwise mandatory. Finally, the validation for real-time device-level results and system-level results of a multi-converter system is provided by SaberRD® and MATLAB/Simulink®.

Design of High-Frequency ZVS Full-Bridge Power Converter for Photovoltaic Applications

This paper presents the design of a high-frequency Zero Voltage Switching (ZVS) full-bridge converter with a phase-shifted driving signal for photovoltaic applications. According to the rapid development of power electronics technology, the smart power converter could provide high-power capacity with the high-frequency operation and achieve high energy delivery to the load. This power converter could also reduce the size of the transformer compared to the same power rating. The transformer has been developed using resonant technique and selecting the optimal switching frequency whereby the power converter could reduce switching loss and improve the system efficiency. The phase-shifted modulation switching technique has been selected to drive the power semiconductor switches of a full-bridge power converter based on the switching loss minimization method. The desired output voltage has been controlled using a closed-loop controller under a loop gain stability margin. The simulation results have showed that the output voltage could be controlled to the desired constant when the input voltage has changed from 370 VDC to 400 VDC. The output voltage of the power converter could be controlled at a constant of 24 VDC. Therefore, the proposed study has showed the effectiveness of the phase-shifted ZVS full-bridge power converter for photovoltaic applications such as the battery charging system. This power converter could operate at the desired voltage system and reduce the sizing of the power converter under high-performance efficiency.

Asymmetrical eleven‐level inverter topology with reduced power semiconductor switches, total standing voltage and cost factor

Voltage source multilevel inverters (MLI) is widely utilized in medium and high-power applications due to their advantages. Here, an 11-level, asymmetrical multilevel inverter topology is proposed. The topology utilizes four unidirectional switches, three bidirectional switches along with two dc sources. The proposed configuration of switches and the concept of the dc-link capacitor is utilized to generate eleven level output voltage. The reduced number of components such as power switches and DC sources, lower control complexity due to capacitors' self-balancing nature, and low total standing voltage (TSV) are the critical features of the proposed topology. Moreover, a reliability assessment of the topology shows that the topology has a high mean time to fault (MTTF), which makes it robust and reliable. Matlab/Simulink environment is used to develop a simulation model of the proposed topology, while PLECS is used for the thermal modelling and analysis of the converter. A prototype is developed and tested in the laboratory to validate the performance for different loading conditions. The proposed topology can be cascaded to produce the ‘n’ number of levels. The critical comparison of the proposed topology shows that the proposed circuit has advantages over other compared topologies.

A Novel Multilevel Converter with Stable Voltage to The Renewable Energy Systems

In this proposed paper, a novel nine-level inverter (NLI) topology is proposed, which uses fewer components to provide nine voltage levels in the output. Ten semiconductor switches, four capacitors, and one dc voltage source are included in this NLI. Through various logical arrangements of the dc source and capacitors and the use of power semiconductor switches, the nine voltage levels are generated. In this case, only two switches can conduct simultaneously in any mode. As a result, the system's efficiency is increased and conduction losses are decreased. The low total standing voltage (TSV) of the power semiconductor switches is another crucial aspect of this design. Gate signals are produced using a suggested modulation approach to lessen the power switches' switching loss. Several Simulink simulations are run in order to validate the NLI. The suggested inverter has a much lower requirement for components and dc sources as compared to conventional topologies. In order to increase the efficiency of the power generating process in renewable energy systems, the proposed NLI structure can be implemented.

She-Pwm Low Cost Multi Level Inverter for Pv Based Water Pumping Applications

In this article different multi-level inverter (MLI) configuration is introduced by a decreased quantity of power elements. At the output side the MLI topology generates the seven level voltage waveform with minimum number of components. The said topology configuration requires less dc voltage and power semiconductor switches. It also reduces the voltage block on switches, which reduces the inverter topology complexity and costs. Such capabilities were discovered by contrasting the topology to traditional topologies from the above perspectives. Testing were carried out to demonstrate the efficacy of the generalized MLI topology in both simulation and hardware, and the findings are presented for better understanding.

Optimized Modulation Method for Common-Mode Voltage Reduction in H7 Inverter

The three-phase H7 inverter topology installs an additional power semiconductor switch to the positive or negative node of the DC-link for reducing the common-mode voltage (CMV) by disconnecting the inverter from the DC source during the zero-voltage vectors. The conventional CMV reduction method for the three-phase H7 inverter uses modified discontinuous pulse width modulation (MDPWM) and generates a switching signal for the additional switch using logical operations. However, the conventional method is unable to eliminate the CMV for the entire dwell time of the zero-voltage vectors. It only has the effect of reducing the CMV in a limited area of the space vector where the V7 zero voltage vector is applied. Therefore, this paper proposes an optimized modulation method that can reduce the CMV during the entire dwell time of zero-voltage vectors. The proposed method moves the switching patterns by adding an offset voltage to guarantee that only one kind of zero-voltage vector, V7, is applied in the system. It then turns off the seventh switch only during the zero-voltage vector to disconnect the inverter from the DC source. As a result, the CMV and the leakage current are attenuated for the entire dwell time of the zero-voltage vector. Simulation and experimental results confirm the validity of the proposed method.

PV Module Integrated Dual Boost Three-Port dc-dc Converter–Fed T-Type Multilevel Inverter for Shunt Active Power Filters

Abstract The emerging number of nonlinear loads has given elevated interest in developing shunt active power filters (SHAPF) to eliminate the grid issues resulting from the current distortions. This paper proposes an improved photovoltaic (PV) module integrated dual boost high step-up three-port isolated direct current (dc)-dc converter to deliver high output voltage for the low-voltage input. A three-phase three-level (3P3L) T-type inverter is operated as a SHAPF to eliminate the current harmonics. The T-type 3P3L multilevel inverter (MLI) incorporated with the proposed system reduces the number of switches and gate driver circuits compared with widely used MLI. The proposed system generates the compensation current to eliminate the current harmonics in the three-phase distribution network by means of the SHAPF dc-link voltage control. A dc-space vector control scheme is incorporated to generate the firing pulses for the MLI. A comparative evaluation of the latest MLIs reveals that the proposed topology requires a lower quantity of dc sources and power semiconductor switches. In order to validate the operation of the proposed topology, the simulation and experimental consequences of a 3P3L PV-integrated dual boost three-port (DBTP) dc-dc converter–fed T-type MLI-based SHAPF controlled by the DBTP dc-dc converter are presented.

Buck and Boost Inverter

Abstract: A versatile operation of any electronic circuitry depends on the power source supplying the power for its operation. The buck converter is implemented using an integrated circuit(IC), LM317. The constructed buck converter was tested for load and line regulation cited in the datasheets for stability. The test and analysis for the linear buck converter was done using setup. The output measurements indicate that the power supply is functional. The measured output values results of the test circuit. The developed output power supply unit is important in measurements, laboratories and test setup. It is implemented for all general applications that require power supply unit. XL6009 module is a DC to DC BUCK-BOOST converter module that operates at a switching frequency of 400kHz. In such high frequency, it provides smaller sized filter components compared with low frequency switching regulators. An improved SingleStage Buck-Boost inverter is provided, using only three or four power semiconductor switches. The inverter can handle a wide range of dc input voltages and produce a fixed ac output voltage. The inverter is well suited to distributed power generation systems such as photovoltaic and wind power and fuel cells, for standalone or grid connected applications. The inverter has a single charge loop, a positive discharge loop and a negative discharge loop. In this complete design of the converter is carried out. This application report gives details regarding this conversion with examples

Design and Implementation of Hybrid Asymmetric 15-Level Cascaded Modified H-Bridge Multilevel Inverter(CMHB-MLI) to reduce the Total Harmonics Distortion

This new cascaded modified H-bridge asymmetrical multilevel inverter (CMHB-MLI) module proposes a 15 levels with three unequal dc sources and 10 switches. The design approaches with preferable advantage with greater quality comparatively to similar modules with minimum number of semiconductor switches utilizing lower switching frequency and less dc sources. Opposite phase disposition pulse width modulation (OPD-PWM) switching technique is utilized for controlling the Semiconductor switches in CMHB-MLI. In asymmetrical topology the input source are designed with unequal magnitude is done deliberately with binary nature of voltages such as 10Vdc, 20Vdc and 40Vdc. In asymmetrical designing of MLI produces a number of different output levels with the similar number of power semiconductor switches. The results are designed using MATLAB and hardware implementation validates improved quality performance with lower total harmonicsdistortion without utilizing any filtering circuit in the output with reduced switching stress.