Abstract

ABSTRACT A multilevel inverter plays a predominant role in improving the performance as well as efficiency of the inverter. In this study, the proposed idea of the selective harmonic elimination (SHE) for Duple Voltage Boosting nine-level inverter topology with fewer switching components possesses two times better voltage boosting capability than the considered conventional models. The proposed inverter comprises 12 power semiconductor switches, two capacitors, and a single diode, which is connected to a single dc (direct current) source. The duple 9-level topology has been studied and evaluated under different multicarrier PWM (pulse width modulation) techniques in order to obtain lw THD (total harmonic distortion), and the results proves that the Level Control PWM Technique exhibits a better THD value of 9.35%. To improve the quality of the output waveform, the SHE has been designed to fix the predominant harmonics so that the lower order harmonics are minimized to generate a lower THD. A detailed discussion has been made with the results of the proposed inverter THD, which are then compared with other nine-level inverters MATLAB/SIMULINK that has been used to perform the simulation of the duple model, and the obtained simulation results have been validated for different modulation indices. The FPGA SPARTAN 6E controller tests the experimental prototype of the nine-level inverter, and their cost function is represented in dollars, which is compared with the other similar nine-level inverters.

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