Power Distribution Network Design Research Articles

Signal integrity

Welcome to the Signal Integrity Column! In this issue, you will find a very interesting paper on power integrity. In modern high-speed digital designs, power distribution networks (PDNs) using power and ground planes are commonly used where decoupling capacitors are necessary to provide charge for logic transitions and, at the same time, to mitigate the noise generated during device switching. With the continuous increase of data rates and current consumption, as well as the decrease of logic levels, PDN design becomes increasingly challenging. More and more decoupling capacitors would be needed, which presents a seemingly unresolvable conflict with the industry trends for lower cost and more compact design. Prof. Madhavan Swaminathan, a well-known pioneer and expert on power integrity, presents his latest research effort in this paper to address this challenge. I hope his innovative idea can inspire the readers of the EMC Magazine to come up with more ideas to address this fundamental power integrity issue necessary for next generations of high-speed digital designs.

A multiobjective hybrid evolutionary algorithm for robust design of distribution networks

In this paper, an evolutionary multiobjective algorithm (NSGA-II) and some local search methods are employed to solve the power distribution network design problem. The design procedure takes into account three relevant aspects: monetary cost, fault cost (reliability) and robustness (ability to deal with different scenarios of load growth). The final objective is to identify topologies (conductor configuration and capacity) that are efficient with regard to cost and reliability at the same time they are robust enough for dealing with uncertainties on load prediction. Uncertainties in the load growth, energy price and interest rate are considered. Four local search methods are proposed in order to improve solution robustness and reliability, taking into account a given set of possible scenarios. The proposed algorithm achieves high-quality solutions with low computational cost, outperforming the results achieved by former works that dealt with similar problem formulations. Results for 21, 100 and 300 bus systems are presented in order to illustrate the efficiency of the proposed method.

Power distribution network design with split and merged power rails

In a power distribution network design, it is always desirable to have a clean, undistorted power supply from the voltage source to each of the functional blocks in a microprocessor in order for the chip to function properly. Although a large individual power rails supply is generally preferred, it is usually not feasible in a real-world design due to form factor limitation and cost constraint. Power rails merging not only allows the option for decoupling capacitors sharing, but also reduces the number of voltage sources needed in the designed system. However, by merging power rails, coupling noise is generated between the functional blocks that share the same voltage source. In this study, a study on power rails merger option is carried out based on two aspects: the load current characteristics and the power noise tolerances of the functional blocks being merged.

Design of an advanced electric power distribution systems using seeker optimization algorithm

The power distribution network design problem has a growing impact on secure and economical operation of distribution power system. This issue is well known as a non-linear, multi-modal and multi-objective optimization problem where global optimization techniques are required in order to avoid local minima. In this study, a new approach using seeker optimization algorithm (SOA) is proposed for distribution system planning problem with simultaneous placement of automatic reclosers (RAs), considering total system economic cost, overall system reliability, system power losses and voltage deviations as an objective functions. Normally, conventional power distribution systems (CPDS) are radial in nature and momentary fault in the system causes large area of the grid to be blacked out, which leads to huge load interruptions. Reliable distribution system minimize this effect by allowing faults to clear themselves by protection device operations such as automatic reclosers (RAs) and quickly restores the power through system reconfiguration by minimizing the loads affected. Thus, in order to prevent the system from momentary faults, simultaneous placement of RAs has been also done which leads to a design of an advanced power distribution system (APDS). Thus, the reliability issues are of major importance for effective planning of an APDS. For evaluation of reliability measure, the contingency-load-loss index (CLLI) is assessed in this paper, which is independent of the failure rate and fault repair duration of the feeder branches. The performance of the proposed algorithm is extensively assessed and comparisons are made with Particle Swarm Optimization (PSOs), Genetic Algorithm (GA) and graph theoretical approach (GTA) applied on the 54 and 100-bus primary power distribution systems. The simulation results show that the proposed approach performed better than the other listed algorithms and can be efficiently used for the optimal design of an advanced power distribution system.

A Wideband Noise-Isolation Bandstop Power Distribution Network Using Quarter-Wavelength Line-Based Structure

This paper presents the design of wideband bandstop power distribution network using the quarter-wavelength $(\lambda/4)$ line-based bandstop structure. A simple synthesis method starting from the specification on stopband bandwidth is also proposed with detailed design flow and equations. The synthesized $\lambda/4$ -line bandstop structure has been implemented and verified with circuit simulation, electromagnetic simulation, and measurement. The test board is fabricated using the standard printed circuit board process, and the results show an extremely wide stopband from 1 GHz to more than 20 GHz with 70-dB isolation.

Power distribution network design from charge delivery perspective

In high-speed electrical system design, power integrity (PI) has become critical in designing a power distribution network (PDN). In this paper, a time-domain PDN design method is proposed from a charge delivery perspective. Firstly, the integrated circuit (IC) switching current, drawn from the PDN, is expanded into a series of triangular currents. Next, charge delivery models are presented for ideal passive components and a PDN consisting of these components. Finally, the PDN charge delivery model is combined with the IC switching current (expressed as a summation of triangular currents) to develop the time-domain PDN design method. A practical case study is demonstrated at the end of the paper to validate the proposed PDN design method.

Criteria and Limitations for Power Rails Merging in a Power Distribution Network Design

Modern electronic devices such as tablets and smartphones are getting more powerful and efficient. The demand in feature sets, functionality and usability increase exponentially and this has posed a great challenge to the design of a power distribution network (PDN). Power rails merging is a popular option used today in a PDN design as numerous power rails are no longer feasible due to form factor limitation and cost constraint. In this paper, the criteria and limitations for power rails merging are discussed. Despite having all the advantages such as pin count reduction, decoupling capacitors sharing, lower impedance and cost saving, power rails merging can however, introduce coupling noise to the system. In view of this, a PDN design with power rails merging that fulfills design recommendations and specifications such as noise target, power well placement, voltage supply values as well as power supply quadrant assignment is extremely important.

Improved Target Impedance for Power Distribution Network Design With Power Traces Based on Rigorous Transient Analysis in a Handheld Device

The concept of target impedance can be significantly improved, based on the rigorous closed-form expressions for transient supply voltage ripple excited by an integrated circuit (IC) switching current, for the power distribution network (PDN) with power traces that is commonly used in handheld devices. A systematic procedure for developing the target impedance is formulated, which is then applied to the PDN design of a handheld product. From measurements of transient IC switching currents, PDN impedance, and supply voltage ripple, it is shown that the proposed target impedance successfully correlates the PDN impedance in the frequency domain with the transient supply voltage ripple in the time domain.

Optimal Network Topology and Reliability Indices to be used in the Design of Power Distribution Networks in Oil and Gas Plants

The cost of loss of production in oil and gas plants is on average 6.5 times higher than that of plants in any other industry. Thus the reliability performance and analysis of oil and gas plants are unique. There have been many studies that have produced reliability indices for equipment that is used in industrial distribution networks, but these are all industry generic and none are specific to the oil and gas industry. This paper presents a set of equipment reliability indices that has been established from data collected from oil and gas plants and is suitable for use in reliability evaluations of the distribution networks of oil and gas plants. In the design of distribution networks for new oil and gas plants, engineers either do not have enough operational data, enough time or do not know how to perform the analysis required for establishing what type of network topology to use. This paper recommends the optimal network topology to use in such cases and provides evidence to support this proposal.

Optimal network topology and reliability indices to be used in the design of power distribution networks in oil and gas plants

Optimal network topology and reliability indices to be used in the design of power distribution networks in oil and gas plants

Signal integrity

Welcome to the Signal Integrity Column! In this issue, you will find a very interesting paper on power integrity. In modern high-speed digital designs, power distribution networks (PDNs) using power and ground planes are commonly used where decoupling capacitors are necessary to provide charge for logic transitions and, at the same time, to mitigate the noise generated during device switching. With the continuous increase of data rates and current consumption, as well as the decrease of logic levels, PDN design becomes increasingly challenging. More and more decoupling capacitors would be needed, which presents a seemingly unresolvable conflict with the industry trends for lower cost and more compact design. Prof. Madhavan Swaminathan, a well-known pioneer and expert on power integrity, presents his latest research effort in this paper to address this challenge. I hope his innovative idea can inspire the readers of the EMC Magazine to come up with more ideas to address this fundamental power integrity issue necessary for next generations of high-speed digital designs.

Signal integrity

Welcome to the Signal Integrity column! Power distribution network design is an important aspect for high-speed circuits. It not only determines whether active devices can operate properly, but also contributes to various signal integrity and EMI problems. In this issue of the SI column, the authors focus on one of the main design challenges for power distribution networks: how to find out the optimal number of decoupling capacitors in a PCB design, what capacitor components to choose, and where to place them. The case study with a real-world power distribution network design, hopefully, will demonstrate how their optimization methodology would work in a practical application.

A Low Loss Power Distribution Network Design in Low Temperature Co-fired Ceramic Technology

The development of power distribution networks in low temperature co-fired ceramic (LTCC) to deliver power to electronic chips with minimal power loss and/or voltage drop presents real challenges. In the last decade, the power consumption for some applications has increased considerably while the supply voltage has been reduced. A number of designs for low loss power distribution networks were investigated for implementation using low temperature co-fired ceramics (LTCC) technology. This paper discusses the fabrication of power distribution networks (PDNs) using LTCC technology that exhibit sub-milliohm resistance through the use of full tape thickness features and other structures. Experimental data is also presented to support the viability of the approaches presented. The results presented in this paper show that the finite DC conductivity of the silver conductor paste commonly used in LTCC fabrication presents a challenge when attempting to build PDNs with low losses at high current levels. By analyzing a number of scenarios, several approaches are proposed that reduce the DC resistance laterally as well as vertically in a multi-layered LTCC PDN. Experiments and simulations show that the use of various processing techniques to increase the thickness of metallic traces can significantly reduce the lateral DC resistance of the PDN structure. In addition, various via configurations were simulated and fabricated that demonstrate an improvement in the performance of structures that distribute power vertically. Experiments using LTCC to carry a 100 A current were conducted to confirm simulations.

Basic Concepts of Power Distribution Network Design for High-Speed Transmission

This paper tries to gather the Power Distribution Network (PDN) techniques used to preserve power integrity in PCB designs when transmitting data rates over 6 Gbps using the newest commercial optical modules. The PDN design described allows for proper impedance control of the power supply with the appropriate choice of the number, location and values of capacitors. This method needs the knowledge of the electrical RLC model of the regulators, copper planes, capacitors and vias used in the PCB. A particular case of PDN design will be presented for a module using one SNAP12 optical transmitter and one receiver connected to an Altera Stratix II GX FPGA. This board is designed to work with data rates up to 75 Gbps for a high- energy physics application.

Power Supply Pads Assignment for Maximum Timing Yield

The design of power distribution networks significantly impacts the timing of very large scale integrated chips. Process variations induce uncertainty in the current drawn off the network and, therefore, impose statistical measures on the supply voltage. This brief presents an optimization methodology for assigning power supply pads across the chip for maximizing the timing yield. A mixed-integer nonlinear programming optimization problem subject to the voltage drop and current constraints is efficiently solved to find the optimum number and location of the pads. The experimental results for ISCAS89 benchmark circuits demonstrate as much as a 30% improvement in the timing yield.

A New Dawn in R&D

The design of power distribution networks in modern highspeed electronic systems has become an ever-growing challenge. From boards with literally no bypass capacitors in the old days, through the one-capacitor-per-pin rule twenty years ago, the power distribution design has reached a state when it is equally as important as the signal-integrity design. The challenges stem from the simultaneous functions that the power distribution network must provide: 1) clean power, 2) return path for high-speed signals, and 3) a resonance free power-distribution network.

Immune system memetic algorithm for power distribution network design with load evolution uncertainty

A recent paper, [1], has proposed a methodology for taking into account uncertainties in the load evolution within the design of electric distribution networks. That paper has presented an immunological algorithm that is used for finding a set of solutions which are sub-optimal under the viewpoint of the “mean scenario” load conditions, and which are submitted to a sensitivity analysis for the load uncertainty. This paper presents a further development of the algorithm presented in [1], employing now a memetic algorithm (an algorithm endowed with local search operators) instead of the original immunological algorithm. The new algorithm is shown to present a better behavior, achieving a better set of candidate solutions, which dominate the solution set of the former algorithm. The solution set of the proposed algorithm is also stable, in the senses that: (i) the same set of solutions is found systematically; and (ii) the merit function values associated to those solutions vary smoothly from one solution to another one. It can be concluded that the design procedure proposed in [1] should be performed preferentially with the algorithm proposed here.

Physics-Based Inductance Extraction for Via Arrays in Parallel Planes for Power Distribution Network Design

A systematic approach for inductance extraction for via arrays between two parallel planes is presented. Both self and mutual inductance values are obtained based on a cavity model. The physics associated with the via inductances is analyzed, and a rigorous method is developed to derive an equivalent total inductance for multiple via arrays. Analytical equations for the equivalent total inductance are derived in closed forms for simple cases. The proposed method is corroborated with measurements, and application of the method for power distribution network designs is demonstrated.

Modeling and Analysis of Power Supply Noise Imbalance on Ultra High Frequency Differential Low Noise Amplifiers in a System-in-Package

In this paper, we analyze the power supply noise imbalance and its effects on simultaneous switching noise coupling to an ultra high frequency differential low noise amplifier (LNA) in a system-in-package (SiP) through an off-chip power distribution network (PDN). On and off-chip sources of power supply noise imbalance in a LNA in a SiP were analyzed. A simultaneous switching noise coupling coefficient for the differential LNA output caused by power supply noise imbalance was simulated through co-modeling a hierarchical on and off-chip PDN. The simulation results were validated by measuring the simultaneous switching noise coupling voltage at the differential LNA output. Further validation of four types of a LNA with different PDN designs demonstrates that simultaneous switching noise coupling to the differential LNA output caused by power supply noise imbalance highly depends on the design of the PDN of the SiP.

A Domain Decomposition Approach for Efficient Electromagnetic Analysis of the Power Distribution Network of Packaged Electronic Systems

A versatile electromagnetic modeling methodology is presented that is most suitable for use in the computer-aided design of the power distribution network (PDN) of packaged electronics. The method is characterized by modeling flexibility and computational efficiency. These attributes stem from the adoption of a modular approach for the development of the model, where the fine-feature, geometric discontinuities in the network, such as pins, vias, and splits in metallization layers, are modeled separately from the solid planar ground and power metallization portions. In this manner, multiport network models of these discontinuities are developed, making possible their expedient insertion in a discrete electromagnetic model for the solid portions of the metallization. The latter is based on a 2-D integral equation model for the cylindrical transverse electromagnetic field behavior between the metallization planes, for which only electrically important features are preserved and modeled. The utilization of a systematic decomposition approach further enhances the modeling versatility of the proposed method and enables the development of a modeling methodology that is suitable for computer-aided iteration in the electromagnetic performance-aware design of multilayer PDNs. Validation studies are used to demonstrate the efficiency of the proposed methodology and assess its accuracy as a computer-aided tool for PDN predesign.