Abstract
Welcome to the Signal Integrity Column! In this issue, you will find a very interesting paper on power integrity. In modern high-speed digital designs, power distribution networks (PDNs) using power and ground planes are commonly used where decoupling capacitors are necessary to provide charge for logic transitions and, at the same time, to mitigate the noise generated during device switching. With the continuous increase of data rates and current consumption, as well as the decrease of logic levels, PDN design becomes increasingly challenging. More and more decoupling capacitors would be needed, which presents a seemingly unresolvable conflict with the industry trends for lower cost and more compact design. Prof. Madhavan Swaminathan, a well-known pioneer and expert on power integrity, presents his latest research effort in this paper to address this challenge. I hope his innovative idea can inspire the readers of the EMC Magazine to come up with more ideas to address this fundamental power integrity issue necessary for next generations of high-speed digital designs.
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