MMIC Power Amplifier Research Articles

A compact 47–52‐GHz power amplifier MMIC with output power of 20 W

A compact 47–52‐GHz power amplifier MMIC with output power of 20 W

Study on the Degradation Mechanism of GaN MMIC Power Amplifiers Under On-State With High Drain Bias

Study on the Degradation Mechanism of GaN MMIC Power Amplifiers Under On-State With High Drain Bias

Low-Noise Power-Amplifier MMICs for the WR4.3 and WR3.4 Bands in a 35-nm Gate-Length InGaAs mHEMT Technology

Low-Noise Power-Amplifier MMICs for the WR4.3 and WR3.4 Bands in a 35-nm Gate-Length InGaAs mHEMT Technology

A fully integrated wideband GaN Doherty power amplifier MMIC with high efficiency for 5G massive MIMO application

A fully integrated wideband GaN Doherty power amplifier MMIC with high efficiency for 5G massive MIMO application

A mm-wave GaN MMIC power amplifier with second harmonic suppressed using the self-resonate characteristic of the capacitor

A mm-wave GaN MMIC power amplifier with second harmonic suppressed using the self-resonate characteristic of the capacitor

Design of a Highly Efficient Class-F GaN MMIC Power Amplifier Using a Multi-Function Bias Network and a Harmonic-Isolation L-C Resonator

Design of a Highly Efficient Class-F GaN MMIC Power Amplifier Using a Multi-Function Bias Network and a Harmonic-Isolation L-C Resonator

120 GHz microstrip power amplifier MMICs in a commercial GaAs process

Abstract Single-ended and balanced 90–120 GHz microstrip power amplifier MMICs have been designed for cost-sensitive 5G and 6G backhaul in a commercial 6-inch, 0.1-µm GaAs process. At 108 GHz, measured output power is 20.4 and 22.5 dBm, respectively. At 120 GHz, measured output is 12.6 and 17.4 dBm, respectively. This is the highest reported for GaAs, among the highest reported to date for microstrip MMIC amplifiers at these frequencies and competitive with more expensive InP and GaN processes. Measurement is compared with simulation.

Continuous Class F−1 Ku Band GaN MMIC Power Amplifier With an Effect of Nonlinear Output Capacitance

Continuous Class F⁻¹ Ku Band GaN MMIC Power Amplifier With an Effect of Nonlinear Output Capacitance

A High-Efficiency Continuous Class-F GaN MMIC Power Amplifier Using a Novel Harmonic Matching Network

A High-Efficiency Continuous Class-F GaN MMIC Power Amplifier Using a Novel Harmonic Matching Network

A 23–29.5 GHz three‐stage mm‐wave GaN power amplifier using arbitrary two‐port complex‐impedance matching method

SummaryThis paper presents a broadband monolithic millimeter‐wave integrated circuit GaN power amplifier (PA) with arbitrary two‐port complex‐impedance matching method. The proposed matching topology has been applied to interstage matching network design by modifying traditional coupling matrix and synthesizing a desired network. The optimum load traction technique is introduced to provide some more suitable Zopts. After continuous‐wave test, the three‐stage MMIC PA achieves a peak PAE of 39.1% with a 34.9 dBm output power from 23 to 29.5 GHz and the measured S21 is 32.5 dB with a ±2.5 dB gain variation. When driven by a 400 MHz OFDM modulation signal with a PAPR of 8.5 dB, the measured ACPR is improved to −40.6/−40.7 dBc with DPD. In this case, the PA achieves an average PAE of 11.7% and a 26.7 dBm average output power.

Nonlinear Capacitance Compensation Technique in a Linearity-Enhanced and Broadband GaN PA MMIC for Ku-/K-Band Applications

This article reports on exploiting a nonlinear capacitance compensation technique to achieve high linearity for power amplifier (PA) designs in III–V semiconductor technologies. High linearity is achieved by implementing multiple transistors with deliberate sizes and biasing to compensate for each nonlinear input capacitance behavior. Therefore, the composed PA core acts as one large device where each subdevice is biased individually. Moreover, this approach proves to be a reliable and easy way to improve PA linearity in III–V semiconductor technologies. The viability of this compensation is demonstrated by comparing it to other analog linearity improvement techniques such as derivative superposition. As a proof-of-concept prototype, a 17.2–20.2-GHz class-AB PA is designed in a space-evaluated 150-nm gallium nitride (GaN)-on-silicon carbide (SiC) process. Its capabilities are validated for various modulation bandwidths up to 500 MHz at several frequencies while delivering 32 dBm of output power. The measured third-order intermodulation distortion (IMD <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_3$</tex-math> </inline-formula> ) and the fifth-order intermodulation distortion (IMD <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_5$</tex-math> </inline-formula> ) are improved by 18 and 25 dB, respectively, compared to a class-AB design. The measured amplitude-to-phase (AM–PM) distortion of less than 0.07 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^\circ$</tex-math> </inline-formula> is obtained over the entire bandwidth. Finally, noise-to-power ratio (NPR) results prove the linearity enhancement concept with values better than 15 dB up to maximum <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$P_{\rm out}$</tex-math> </inline-formula> . All the results were measured without any applied digital predistortion (DPD).

A Rapid Matching Network Layout Synthesis and Optimization Method for High-Performance MMIC PAs Using Modified Implicit Space Mapping

In this brief, a new systematic approach of matching network (MN) layout synthesis and optimization for power amplifiers (PAs) is proposed based on implicit space mapping (ISM). Commonly, the performance discrepancy between schematic and initial layout is huge, especially for millimeter wave (mmWave) PAs. To address this issue, the proposed modified ISM can shift the optimization work to the circuit schematic simulations by calibrating carefully-selected auxiliary parameters in the circuit based on EM data. To validate the proposed method, an eligible dual-band inter-stage MN layout is rapidly optimized with only 10 runs of EM-simulations, while a corresponding 16/26.5 GHz concurrent dual-band PA is implemented in a 0.15- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> GaAs pHEMT technology. It exhibits a measured small-signal gain of 21.7/14.1 dB, peak power-added efficiency of 30.2%/40.5%, and saturated output power of 24.8/28.1 dBm with a compact chip size of 2.4 mm2.

A transformer matching X-band MMIC power amplifier with temperature compensation technique on 0.25µm GaN process

A transformer matching X-band MMIC power amplifier with temperature compensation technique on 0.25µm GaN process

Design of 2–16 GHz Non-Uniform Distributed GaN HEMT MMIC Power Amplifier with Harmonic Suppression Network

In this paper, an ultra-wideband (UWB) power amplifier (PA) on a 0.25 μm gallium-nitride (GaN) on silicon carbide (SiC) high-electron-mobility transistor (HEMT) process, operating in Ku-band, is presented. The broadband PA design is based on the four-stage non-uniform distributed amplifier structure. In order to improve the efficiency of the PA, a harmonic suppression network is added at the output of the drain artificial transmission line. At the same time, a capacitor is connected in series at the input of the gate, which is used to compensate for the phase offset of the gate and increase the cut-off frequency of the PA. The final gate width of the first stage is 0.56 μm, and the other three-stage gate widths are all 0.32 μm. Over the frequency range of 2–16 GHz, the simulated results of this NDPA exhibit a power-added efficiency (PAE) of 16.6–27%, a saturated continuous wave (CW) output power of 35–37 dBm, a small signal gain of 9.1–11.6 dB, and output return losses of 5–15 dB.

Coplanar Asymmetry Transformer Distributed Modeling for X-Band Drive Power Amplifier Design on GaN Process

In this paper, a methodology for designing a distributed model for coplanar asymmetry transformer on gallium nitride (GaN) process is proposed, which can accurately characterize the transformer’s feature up to a millimeter-wave band. The paper analyses a transformer-based matching circuit and proposes a practical transformer design procedure. A two stage, transformer matching based X-band power amplifier (PA) is reported here. Using the proposed transformer model and correlated transformer design procedure can sharply reduce schematic design period and optimum process time. The PA chip is designed on a 0.25 µm GaN technology process and occupies a 1.515 mm2 area. At a 28 V supply, the gain and output power of the PA reaches 15 dB and 29 dBm respectively, and the wideband matching transformer reaches 47.6% bandwidth. To the best of our knowledge, the distributed model for coplanar asymmetry transformer and transformer-based X-band MMIC PA on GaN process in this work is the first case among the reported papers.

Design of an Efficient 24–30 GHz GaN MMIC Power Amplifier Using Filter-Based Matching Networks

A broadband GaN MMIC power amplifier (PA) with compact dimensions of 1.94 × 0.83 mm2 is presented for 5G millimeter-wave communication. To guarantee output capability at the operating band edges where serious performance degradation is likely to occur, the appropriate large-signal matching model and optimal impedance domain need to be carefully determined through load-pull analysis. Broadband matching networks (MNs) in the lowpass form are thereafter developed based on the Chebyshev filter synthesis theory. Using high-pass interstage MN in conjunction with parallel RC lossy circuits to compensate for the transistor’s negative gain roll-off slope ensures a flat frequency response. The input MN is designed as a band-pass filter due to the reactance extracted from the input side of the stabilized device exhibiting series LC resonance characteristics. Measured on-wafer pulsed results for the proposed three-stage PA demonstrate up to 30.9 dBm of output power, more than 28.6 dB of small-signal gain, and a peak power-added efficiency (PAE) of 35.6% at 27 GHz. Both uniform gain and saturated output power (Psat) are achieved across 24–30 GHz with fluctuations of less than 0.8 dB.

A 5.5/12.5‐GHz concurrent dual‐band power amplifier MMIC in 0.25 μm GaAs technology

A concurrent 5.5/12.5-GHz dual-band power amplifier (PA) is designed and implemented in a 0.25 μm GaAs pseudomorphic high electron mobility transistor process. The PA is composed of two stages and adopts LC parallel and series networks for dual-band matching. The efficiency of the PA is improved by lowering the drain voltage of the driver stage. Measurement results show that the proposed PA features the maximum small-signal gain of 17.1 and 15.6 dB, the maximum output power of 24.9 and 24.5 dBm, and peak power-added efficiency (PAE) of 35.5% and 35% at 5.5 and 12.5 GHz, respectively. The PA consumes a total DC of 73 mA, and its power consumption is 503 mW. The chip size of the PA is 1.4 × 1.3 mm2 including all testing pads.

A C-Band High-Efficiency Power Amplifier MMIC With Second-Harmonic Control in 0.25 μm GaN HEMT Technology

This letter presents a <inline-formula> <tex-math notation="LaTeX">$C$ </tex-math></inline-formula>-band high-efficiency fully integrated high-power amplifier (HPA) monolithic microwave integrated circuit (MMIC) in 0.25 <inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> gallium nitride (GaN) high electron mobility transistor (HEMT) technology. The proposed GaN HPA MMIC consists of two amplifying stages, and its output stage includes eight transistors in parallel. In order to realize the high efficiency, a low-loss harmonic control network (HCN) using a parallel <i>LC</i> resonate block is applied to obtain the optimum load impedance to each transistor employed in the output stage of the HPA at both <inline-formula> <tex-math notation="LaTeX">$f_{0}$ </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">$2f_{0}$ </tex-math></inline-formula>. Thus, the designed GaN HPA can operate in pulse conditions of 100 <inline-formula> <tex-math notation="LaTeX">$\mu \text{s}$ </tex-math></inline-formula> pulsewidth and 10&#x0025; of duty cycle over the frequency from 5.6 to 6.3 GHz. The proposed high-efficiency GaN HPA MMIC provides an average output power of 45.0&#x2013;45.5 dBm (31.6&#x2013;35.5 W) with a power-added efficiency (PAE) of 59&#x0025;&#x2013;61.8&#x0025;, and a gain of 26&#x2013;28.5 dB under a drain voltage of 28 V. The area of the proposed GaN HPA MMIC is 4.2 mm <inline-formula> <tex-math notation="LaTeX">$\times $ </tex-math></inline-formula> 4 mm including pads.

Design of broadband high-gain GaN MMIC power amplifier based on reactive/resistive matching and feedback technique

This paper presents a K-band two-stage power amplifier (PA) with a compact circuit size of 1.8×0.87mm2. To guarantee broadband high-gain output performance, the optimal impedance domain and power cell are determined through load/source-pull simulation and K-point method, respectively. Reactive/resistive matching networks are carefully employed to reduce the equivalent gate capacitance, improve stability and compensate for the device’s negative gain roll-off slope. Meanwhile, combining with feedback technique adopted in driver stage, the entire operation bandwidth can be further extended. Under 12V pulse voltage supply, 37.4% of peak power-added efficiency (PAE) at 26GHz and 24±0.5dB of small-signal gain, 30.3-31.6dBm of saturated output power (Psat) across 22-27GHz are obtained as shown in the experimental results.

3–20-GHz GaN MMIC Power Amplifier Design Through a COUT Compensation Strategy

This letter presents the design approach for a compact, single-stage, wideband MMIC power amplifier. A method is proposed to compensate for the output capacitance of the active device over a frequency range as wide as possible, with minimum impact on the achievable output power, which leads to a two-element compensating network. A three-section transformer is then adopted for a real-to-real transformation. The CW characterization shows the output power higher than 32 dBm and the drain efficiency between 35% and 45%, over a fractional bandwidth of 148%, from 3 to 20 GHz.