Porous Low-k Dielectrics Research Articles

Quantitative characterization of pore stuffing and unstuffing for postporosity plasma protection of low-k materials

The problem of k-value degradation (plasma damage) is a key issue for the integration, and it is becoming more challenging as the dielectric constant of low-k materials scales down. One way to circumvent this issue is temporarily conversion of low-k material from a porous to a dense state by filling the pores with a sacrificial polymer after the deposition and curing of the low-k material. A detailed process scheme for the pore stuffing and postetch polymer removal of PMMA is described in this work. The filling temperature was optimized according to the molecular weight of the PMMA. To remove the polymer after plasma-etching in a purely thermal environment, a temperature of at least 430 °C had to be applied. Annealing assisted by variable frequency microwaves could remove the polymer already at 380 °C and with a He–H2 afterglow plasma the polymer could be removed at 280 °C. Laser annealing allowed the removal at a stage temperature of 200 °C with an only surface-limited heating of about 500 °C and higher to prevent the FEOL structures from damage. This work presents the results of the detailed study of stuffing and unstuffing processes, discusses mechanisms, and provides background for a robust stuffing and polymer removal process for the plasma damage reduction in porous low-k dielectrics.

Post Etch Residue Removal and Material Compatibility in BEOL Using Formulated Chemistries

A possible way to realize a 22.5 nm 1⁄2 pitch and beyond BEOL interconnect structures within the low-kmaterial is the partial-trench via first with self-aligned double patterning (SADP) integration approach. A scheme of this BEOL integration stack with the different materials used after patterning is described in Figure 1. In BEOL processing, fluorocarbon-containing plasma is commonly used to pattern silica-based dielectric layers. During the patterning of the low-kdielectric layer, a thin layer of fluoropolymer (CFx-type residues) is intentionally deposited on the dielectric sidewalls and TiN hardmask to ensure anisotropic etching and prevent/minimize dielectric degradation. This polymer layer must be removed from the sidewall and the via bottom prior to the subsequent processing steps to achieve good adhesion and coverage of materials deposited in the etched features. The compatibility requirement is even more stringent for advanced low-kdielectrics, i.e. materials with lowerk-value and higher porosity. The post etch residue (PER) amount and properties are specific and depend on the stack structure and the plasma that is used for patterning. The low-kmaterials and hardmasks that are used in this work are respectively an organo-silicate glass (OSG) type of low-kmaterial withk= 2.4 (~20 % open porosity) and low-stress TiN. Recent results clearly showed the presence of a highly fluorinated layer deposited on the trench sidewalls during the plasma etch based on a fluorocarbon plasma [1-3]. Commodity aqueous cleaning solutions, such as diluted HF, do not efficiently remove the sidewall polymers without etching the underlying layer (lift-off). Therefore, there is a need for commercially available chemicals that can be easily tuned to deal with the different requirements. This study focuses on the use of FOTOPUR® R 2300 mixed with H2O2 for polymer residue removal selectively to other materials (presented in the stack) such as MHM, metals (Cu, W), and porous low-k dielectrics. We will show that TiN etch can be easily tuned by changing the concentration of H2O2.

Effect of Bias-Voltage in H2/N2 Plasma Treatment on Porous Low Dielectric Constant Materials

Porous low-dielectric constant (low-k) materials are needed for advanced technologies to improve signal propagation. Plasma treatments in interconnection fabrication have been considered to be critical steps to impact the low-k films’ properties. This study investigates the degradation of the porous low-k films by plasma exposure using several kinds of treatment conditions. Experimental results indicate that the increase in the dielectric constant and the degradation in the reliability for the plasma-treated low-k films were related to the decreased amount of Si-CH3 bonds and the absorbed amount of H2O or OH groups within the film. Plasma treatment with pure H2 gas extracts more CH3 groups from the porous low-k film and forms a larger amount of H2O or OH groups. Although the plasma-treated low-k films using N2 gas can suppress H2O or OH group formation, the increase in the dielectric constant is higher due to the formation of Si-N or C-N bonds. Plasma treatment using a mixture of H2/N2 gas can obtain a balance result in the dielectric constant increase and absorbed moisture uptake. Furthermore, increasing bias-voltage on the sample electrode during H2/N2 Plasma treatment can effectively suppress the degradation of the porous low-k dielectrics.

As-grown donor-like traps in low-k dielectrics and their impact on intrinsic TDDB reliability

Highly porous low-k dielectrics are essential for downscaling of the interconnects for 20–10nm technologies. A planar capacitor test vehicle was used to investigate the intrinsic time dependent dielectric breakdown (TDDB) reliability of low-k dielectrics and the origin of an observed C–V hysteresis was studied. We hypothesize that the hysteresis is caused by donor-like traps present in the bulk of the low-k but not by electron/hole trapping or mobile charges. It is proposed that porogen/carbon residues are the source of these donor-like traps. Using Ileak vs. time measurements, it was found that the donor-like traps accelerate the dielectric degradation due to an enhanced EOX, causing a localized partial breakdown. The intrinsic TDDB reliability of the low-k film was improved by adding a sealing layer as such layer blocked the donor-like traps discharging.

Effect of water uptake on the fracture behavior of low-k organosilicate glass

Water uptake in porous low-k dielectrics has become a significant challenge for both back-end-of-the-line integration and circuit reliability. This work examines the effects of water uptake on the fracture behavior of nanoporous low-k organosilicate glass. By using annealing dehydration and humidity conditioning, the roles of different water types and their concentrations are analyzed in detail. For as-deposited SiCOH films, annealing dehydration can enhance the resistance to crack occurrence, and these enhancements can be offset by higher humidity conditioning. It was found that the film-cracking threshold can be lowered by in-diffused water in the film as well as by water at the SiCOH/subtract interface. This occurs because the water decreases the film fracture energy and adhesion energy, respectively. By conditioning at high humidity, the variation of the film cracking threshold agrees well with the behavior of the film hardness and modulus of elasticity as a function of relative humidity. The crack morphologies of low-k porous films are also implicitly related to water uptake in the materials. Film cracking thresholds and crack morphologies of UV-cured low-k materials exhibit a weaker dependence on the water uptake, indicating a low degree of hydrophilicity of the SiCOH film after UV curing, which corroborates the previous results. Furthermore, by measuring the surface crack length, the material–fracture toughness can be found. The results demonstrate that neither annealing dehydration nor water uptake have significant effects on fracture toughness of as-deposited SiCOH, while for UV-cured SiCOH, annealing enhances the film-fracture toughness.

Impact of Plasma Pretreatment and Pore Size on the Sealing of Ultra-Low-k Dielectrics by Self-Assembled Monolayers

Self-assembled monolayers (SAMs) from an 11-cyanoundecyltrichlorosilane (CN-SAM) precursor were deposited on porous SiCOH low-k dielectrics with three different pore radii, namely, 1.7, 0.7, and lower than 0.5 nm. The low-k dielectrics were first pretreated with either O2 or He/H2 plasma in order to generate silanol groups on the hydrophobic pristine surface. Subsequently, the SAMs were chemically grafted to the silanol groups on the low-k surface. The SAMs distribution in the low-k films depends on the pore diameter: if the pore diameter is smaller than the size of the SAMs precursors, the SAM molecules are confined to the surface, while if the pore diameter exceeds the van der Waals radius of the SAMs precursor, the SAMs molecules reach deeper in the dielectric. In the latter case, when the pore sidewalls are made hydrophilic by the plasma treatment, the chemical grafting of the SAM precursors follows the profile of the generated silanol groups. The modification depth induced by the O2 plasma is governed by the diffusion of the oxygen radicals into the pores, which makes it the preferred choice for microporous materials. On the other hand, the vacuum ultraviolet (VUV) light plays a critical role, which makes it more suitable for hydrolyzing mesoporous materials. In addition to the density of the surface -OH groups, the nanoscale concave curvature associated with the pores also affects the molecular packing density and ordering with respect to the self-assembly behavior on flat surfaces. A simple model which correlates the low-k pore structure with the plasma hydrophilization mechanism and the SAMs distribution in the pores is presented.

Prospects for dielectric constant reduction in integrated circuits interconnects

ABSTRACTTo improve the integrated circuits’ performance and continue the downscaling of dimensions, it is necessary to use low dielectric constant materials as interconnects insulators. Current porous SiCOH low-k dielectrics are now reaching their limits since their porosity enables the diffusion of species that modify the inner surface of the pores. To further reduce the dielectric constant, it is necessary to change paradigm in interconnects fabrication. In this paper, we discuss the most promising innovations in terms of process, materials and architectures to reduce the interconnects insulators dielectric constant.

Analysis of water adsorption in plasma-damaged porous low-k dielectric by controlled-atmosphere infrared spectroscopy

The integration of porous dielectric (low-k) in interconnects of integrated circuits is limited by the damage induced by plasma processes to the porous material. Plasma-damaged materials become hydrophilic, which degrades the electrical properties. However, the exact role of water is not fully understood. In this paper, the authors setup a dedicated cell to analyze water adsorption in plasma-damaged porous low-k dielectrics by infrared spectroscopy at various pressures of water vapor. The authors show that OH groups are present in the material under vacuum and that water adsorbs in the material first as icelike water and then as liquidlike water when the relative humidity is larger than ∼50%. The consequences for microelectronics applications are discussed.

Effect of moisture on electrical properties and reliability of low dielectric constant materials

The effect of absorbed moisture on the electrical characteristics and reliability of low dielectric constant materials (low-k) was investigated in this study. The experimental results reveal that porous low-k dielectrics absorb more moisture than dense low-k dielectrics. This absorbed moisture degrades the electrical performance and reliability of both classes of low-k dielectrics. Annealing at a higher temperature of 400°C is required to decompose the physically-adsorbed moisture and thereby restore reliability performance. However, the chemically-adsorbed moisture seems to be difficult to remove by annealing at 400°C, causing a degraded TDDB performance.

Ultra low-K shrinkage behavior when under electron beam in a scanning electron microscope

In this paper, we investigate the tendency of porous low-K dielectrics (also named Ultra Low-K, ULK) behavior to shrink when exposed to the electron beam of a scanning electron microscope. Various experimental electron beam conditions have been used for irradiating ULK thin films, and the resulting shrinkage has been measured through use of an atomic force microscope tool. We report the shrinkage to be a fast, cumulative, and dose dependent effect. Correlation of the shrinkage with incident electron beam energy loss has also been evidenced. The chemical modification of the ULK films within the interaction volume has been demonstrated, with a densification of the layer and a loss of carbon and hydrogen elements being observed.

The effect of water uptake on the mechanical properties of low-k organosilicate glass

Water uptake in porous low-k dielectrics has become a significant challenge for both back-end-of-line integration and circuit reliability. The influence of absorbed water on the mechanical properties of plasma-enhanced chemical-vapor-deposited organosilicate glasses (SiCOH) was investigated with nanoindentation. The roles of physisorbed (α-bonded) and chemisorbed (β-bonded) water were examined separately through annealing at different temperatures. Nanoindentation measurements were performed on dehydrated organosilicate glass during exposure to varying humidity conditions. The elastic modulus and hardness for as-deposited SiCOH are intimately linked to the nature and concentration of the absorbed water in the dielectric. Under mild-annealing conditions, the water-related film mechanical property changes were shown to be reversible. The mechanical properties of UV-cured SiCOH were also shown to depend on absorbed water, but to a lesser extent because UV curing depopulates the hydrophilic chemical groups in SiCOH. High-load indentation tests showed that in-diffusion of water in the film/substrate interface can degrade the hardness of SiCOH/Si film stacks significantly, while not significantly changing the elastic modulus.

Effect of Moisture on Electrical and Reliability Characteristics for Dense and Porous Low-k Dielectrics

The effect of absorbed moisture on the electrical and reliability characteristics of the low-k dielectrics was investigated in this study. The experimental results indicate that the porous low-k dielectrics would absorb more moisture as compared to the dense low-k dielectrics. This absorbed moisture degrades the electrical and reliability performance of the low-k dielectrics. A higher temperature anneals at 400oC is needed to decompose physically-adsorbed water, which is benefit to restore reliability performance. On the other hand, the chemically-adsorbed moisture seems to be difficult to be removed by a 400oC annealing, causing a degraded TDDB performance.

Identification of the (√E+1/E)-dependence of porous low-k time dependent dielectric breakdown using over one year long package level tests

Over-one-year-long test results for low-k dielectric TDDB are reported.A methodology has been set up to compare different models that predict lifetime.The lucky-electron model shows a higher ability to predict dielectric lifetime.The fitting parameters are determined independently from the MTTF fit. In the present paper, different analytical lifetime models have been assessed on porous low-k dielectrics (in CMOS 28nm structures) to predict lifetimes. Quantitative comparisons are made thanks to over-one-year-long low-field reliability tests. The lucky electron model (fitted at high fields) shows its higher ability to predict the dielectric mean-time-to-failure (MTTF) at low-field. Then the fitting parameters of this model (α=32 et γ=14.5) have been determined independently from this MTTF fitting procedure: these new values (α=31 et γ=14), extracted from the analysis of both Poole-Frenkel conduction and initial leakage current, are in very good agreement with the MTTF-fitted ones. The consequences of this model are discussed.

Formation of Porous Low-K Dielectric Interconnect Structure on Advanced Dielectric-Reactive Ion Etcher

Porous low-k dielectrics have been extensively integrated into back-end-of-line (BEOL) for its significant improvement of chip resistance-capacitance (RC) delay performance. However, Metal hard-mask (MHM) has to be introduced to reduce the low-k damage from radicals and photons during plasma strip. We investigated the formation of porous low-k dielectric interconnect structure on advanced dielectric reactor ion etcher (AD-RIE) of AMEC (Advanced Micro-fabrication Equipment Company) from the point of view of etch profile, wafer acceptance test (WAT), RC delay performance and reliability (RE). Scanning electron microscope (SEM) results exhibit the desired etch profiles for both trench and via. The WAT electrical results, RC delay and RE performances can be well improved by etch profile control. In brief, all of these demonstrate AD-RIE is capable of delivering the qualified porous low-k dielectric structure as main-stream etchers did.

Effect of Moisture on Electrical and Reliability Characteristics for Dense and Porous Low-k Dielectrics

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Structural Analysis of Pore Seal Layer Fabricated by Wet-process on Porous Low-k Films

ABSTRACTPore sealing has become a critical issue for the implementation of porous low-k dielectrics and for realizing acceptable reliability performance of the interconnect. This study focuses on fabrication of ultra-thin, conformal and plasma resistant pore seal layer and on understanding parameters playing a role in sealing the surfaces of porous low-k films. It was found that 2.5 nm-thick pore seal layer shows a perfect toluene seal property for the porous low-k film whose pore radius is 1.48 nm. The pore seal layer still show a good toluene seal property after irradiation of He plasma at 250°C for 10 sec. The increments of dielectric constant by applying the pore seal layer and by the He plasma irradiation for 10 sec are 0.04 and 0.03, respectively. Interestingly, all of toluene seal property, refractive index of the bottom part of the film and dielectric constant started to deteriorate after irradiation of He plasma for 20 sec. It was suggested that when toluene seal property degrades, plasma would start diffusing into pores and both refractive index of the bottom part of the film and k value start to increase.

Impact of plasma treatment on structure and electrical properties of porous low dielectric constant SiCOH material

Low dielectric constant (low-k) porous films are needed for advanced technologies to improve signal propagation. The integration of porous low-k films faces more severe challenges due to the presence of porosity. Plasma treatments have been considered to be critical steps to impact the low-k films' properties. In this study, the effect of various H2/He plasma treatments on the porous low-k dielectrics deposited by plasma enhanced chemical vapor deposition was investigated. All the plasma treatments resulted in the formation of a thin and dense layer on the surface of the porous low-k films. Additionally, the properties of this top dense layer are modified and changed for the standard H2/He plasma treatment, leading to a degraded electrical and reliability performance. However, H2/He plasma-treated low-k dielectric by the remote plasma method shows a better electrical and reliability performance. As a result, the remote plasma treatment on the porous low-k dielectrics appears to be a promising method in the future interlayer dielectrics application.

An environment friendly wet strip process for 193nm lithography patterning in BEOL applications

In semiconductor Back-End-of-Line (BEOL) processing, wet organic strippers have gained a renewed interest for removal of etched photoresist (PR) layers to replace plasma strip, which degrades porous low-k dielectrics. In this study we show how the characterization of 193-nm PR degradation by etch plasmas led to the development of an environment friendly wet strip using aqueous ozone solutions. Characterization of post-etch PR films have shown that degradation was similar to that of poly(methyl acrylate/methacrylate) (PMA/PMMA) by UV light, with formation of single and conjugated C?C bonds in PR chains. However little removal was obtained with O3/H2O strips without an organic solvent rinse, indicating reactions fragments were too long for a complete dissolution in water. In turn known effects of UV on PMA/PMMA were used to develop an optimized UV pre-treatment enabling a fully aqueous O3 strip. This process was shown to efficiently remove PR in a dual damascene application. Also we shortly discuss the impact of materials selection on process efficiency, improvement in low-k compatibility and transfer to a production environment.

Corrosion of Si-O based porous low-k dielectrics

The corrosion behavior of low-k dielectric films used in today's microelectronic interconnects is reported. We study the dielectric constant, k, range 2.7 to 2.05, with all materials based on a Si-O-Si network. A corrosion mechanism based upon the reaction of water molecules with strained crack-tip bonds is used to model crack velocity vs. applied strain energy release rate curves and to extract key atomistic parameters for each dielectric. It is found that bond strength is invariant and bond density varies linearly with k. The data indicate that no new mechanism plays a part in the corrosion of these Si-O-Si based films with dielectric constants down to ∼2.

웨이퍼 레벨 3D Integration을 위한 Ti/Cu CMP 공정 연구

Cu 본딩을 이용한 웨이퍼 레벨 적층 기술은 고밀도 DRAM 이나 고성능 Logic 소자 적층 또는 이종소자 적층의 핵심 기술로 매우 중요시 되고 있다. Cu 본딩 공정을 최적화하기 위해서는 Cu chemical mechanical polishing(CMP)공정 개발이 필수적이며, 본딩층 평탄화를 위한 중요한 핵심 기술이라 하겠다. 특히 Logic 소자 응용에서는 ultra low-k 유전체와 호환성이 좋은 Ti barrier를 선호하는데, Ti barrier는 전기화학적으로 Cu CMP 슬러리에 영향을 받는 경우가 많다. 본 연구에서는 웨이퍼 레벨 Cu 본딩 기술을 위한 Ti/Cu 배선 구조의 Cu CMP 공정 기술을 연구하였다. 다마싱(damascene) 공정으로 Cu CMP 웨이퍼 시편을 제작하였고, 두 종류의 슬러리를 비교 분석 하였다. Cu 연마율(removal rate)과 슬러리에 대한 <TEX>$SiO_2$</TEX>와 Ti barrier의 선택비(selectivity)를 측정하였으며, 라인 폭과 금속 패턴 밀도에 대한 Cu dishing과 oxide erosion을 평가하였다. The wafer level stacking with Cu-to-Cu bonding becomes an important technology for high density DRAM stacking, high performance logic stacking, or heterogeneous chip stacking. Cu CMP becomes one of key processes to be developed for optimized Cu bonding process. For the ultra low-k dielectrics used in the advanced logic applications, Ti barrier has been preferred due to its good compatibility with porous ultra low-K dielectrics. But since Ti is electrochemically reactive to Cu CMP slurries, it leads to a new challenge to Cu CMP. In this study Ti barrier/Cu interconnection structure has been investigated for the wafer level 3D integration. Cu CMP wafers have been fabricated by a damascene process and two types of slurry were compared. The slurry selectivity to <TEX>$SiO_2$</TEX> and Ti and removal rate were measured. The effect of metal line width and metal density were evaluated.