Planar Interconnects Research Articles

Interconnection blocks: a method for providing reusable, rapid, multiple, aligned and planar microfluidic interconnections

In this paper a method is presented for creating ‘interconnection blocks’ that are re-usable and provide multiple, aligned and planar microfluidic interconnections. Interconnection blocks made from polydimethylsiloxane allow rapid testing of microfluidic chips and unobstructed microfluidic observation. The interconnection block method is scalable, flexible and supports high interconnection density. The average pressure limit of the interconnection block was near 5.5 bar and all individual results were well above the 2 bar threshold considered applicable to most microfluidic applications.

Design of GRIN optical components for coupling and interconnects

AbstractThis paper reviews the design of some optical systems for coupling and interconnection by GRIN components. The optical systems designed with these components are based on imaging and transforming properties of such components to carry out specific functions. First of all, a brief description of light propagation through GRIN materials will be given. After that, a device to couple light by a GRIN fiber lens into fibers of different core sizes with low loss is described. The coupling efficiency as well as the coupling loss are studied versus variation of the GRIN fiber lens length and the refractive‐index profile of the coupler. The design of crossover and parallel interconnects by using a GRIN planar structure will be presented. The optical analysis includes the PSF for describing the performance of the device and the SBP for estimating the numbers of channels that can be handled. The dependence of the number of channels on the wavelength of light and the transverse aperture of the planar interconnect is shown.

Planar antennas and interconnection components for 122 GHz and 140 GHz future communication systems

Planar antennas and interconnection components for 122 GHz and 140 GHz future communication systems

Cyclically Varying Hydrogen Dilution for the Growth of Very Thin and Doped Nanocrystalline Silicon Films by Hot-Wire CVD

ABSTRACTAn important issue for the massive implementation of thin silicon technology in photovoltaic is the use of plastic substrates, which allow the use of roll-to-roll deposition systems and planar monolithic interconnection between the cells. However, the use of plastic substrates require a fully low temperature process; especially critical in the deposition of the thin amorphous (a-Si:H) or nanocrystalline (nc-Si:H) layers. Hot-Wire Chemical Vapour Deposition (HW-CVD) technique has demonstrated to be a good alternative to deposit quality thin films at low temperature. In this paper we focus our study on very thin (50 nm) n- and p-doped nc-Si:H films deposited at low substrate temperature around 100°C. We have observed that, in this low temperature deposition conditions, the promotion of an a Si:H incubation layer leads to a poor doping efficiency and poor electrical properties of the films. Hence, in addition to the optimization of the deposition conditions, we deposited doped layers by cyclically varying the hydrogen dilution (CVH) during deposition process. This CVH method promotes a layer-by-layer growth and inhibits the formation of the incubation layer. Several doped nc-Si:H layers have been deposited with and without this CVH method. The structural, electrical and optical properties of these films and advantage of CVH in improving the device quality of the thin doped layers are reported.

A low-cost, manufacturable method for fabricating capillary and optical fiber interconnects for microfluidic devices

Microfluidic chips require connections to larger macroscopic components, such as light sources, light detectors, and reagent reservoirs. In this article, we present novel methods for integrating capillaries, optical fibers, and wires with the channels of microfluidic chips. The method consists of forming planar interconnect channels in microfluidic chips and inserting capillaries, optical fibers, or wires into these channels. UV light is manually directed onto the ends of the interconnects using a microscope. UV-curable glue is then allowed to wick to the end of the capillaries, fibers, or wires, where it is cured to form rigid, liquid-tight connections. In a variant of this technique, used with light-guiding capillaries and optical fibers, the UV light is directed into the capillaries or fibers, and the UV-glue is cured by the cone of light emerging from the end of each capillary or fiber. This technique is fully self-aligned, greatly improves both the quality and the manufacturability of the interconnects, and has the potential to enable the fabrication of interconnects in a fully automated fashion. Using these methods, including a semi-automated implementation of the second technique, over 10,000 interconnects have been formed in almost 2000 microfluidic chips made of a variety of rigid materials. The resulting interconnects withstand pressures up to at least 800psi, have unswept volumes estimated to be less than 10 femtoliters, and have dead volumes defined only by the length of the capillary.

Highly Packaged Terahertz Down-Converter Modules Using 3-D Integration

This letter describes the design of highly packaged heterodyne receivers for terahertz applications. The 3-D integration of a terahertz mixer with a low-noise intermediate frequency amplifier is implemented for the first time using off-the-shelf components. Thereby, an-order-of-magnitude volume and weight reduction are accomplished. We validate our packaging approach experimentally, demonstrating performance comparable to that of a similar receiver assembled with planar interconnects. These 3-D receivers can in principle constitute the basis of close-fitting, densely populated focal plane arrays.

Capacity analysis of a simple integrated planar optical interconnects system

The analysis of capacity in a simple integrated planar optical interconnects (IPOIs) system, based on the Gaussian propagation model, is presented. The interconnects capacity is obtained as a function of signal-to-noise ratio (SNR), optical signal power, optical noise power, electrical noise equivalent power, and the geometrical constraints of the concept of integrated planar optics (IPO). The dependence of interconnects capacity on various system parameters is analysed and simulated. It is shown that the design of the IPOIs system can be optimized for maximum capacity using geometrical constraints as design parameters.

Optimization of signal-to-noise ratio in integrated planar optical interconnects packages

The signal-to-noise ratio (SNR) of integrated planar optical (IPO) board-to-board interconnections system is analyzed. The SNR is derived as a function of separation between the boards, beam spot size, optical system efficiency, receiver thermal noise, thickness of the substrate, and the angle of propagation of the beam. Based on the analyses and the results obtained it is shown that the design of optical interconnects system can be optimized for maximum SNR using at least one parameter, namely, angle of propagation.

Mechanical means for temperature compensation of planar diffractive optical interconnects: feasibility study

Planar diffractive optical interconnects have many advantages, however, their inherent chromaticity leads to temperature instability due to the wavelength shift of laser diodes' radiation. This shift can be compensated if the optical interconnect is bended in an appropriate direction with curvature proportional to the relative wavelength shift. The bending can be performed by attaching an additional plate to the element with a different thermal expansion coefficient. Theoretical analysis and ray tracing are reported.

Double-sided IPEM cooling using miniature heat pipes

Integrated power electronic module (IPEM) planar interconnect technologies offer opportunities for improved thermal management by allowing thermal access to the upper side of the power devices. In this paper, the feasibility of using miniature heat pipes to achieve effective double-sided cooling is investigated by analyzing the complete thermal circuit associated with the power device. A nominal case was modeled using the ANSYS(tm) finite element software in a single-sided and double-sided configuration. The numerical model predicted that the double-sided configuration would result in a 13/spl deg/C reduction in the maximum temperature compared to the single-sided case, for the same 100 W/cm/sup 2/ power dissipation in the semiconductor die. This corresponds to a 15% decrease in the maximum temperature rise relative to ambient or a similar increase in allowable power dissipation. Twenty-eight percent of the heat was removed from the upper side of the IPEM in the double-sided case. An additional benefit associated with double-sided cooling was a significant reduction in the spatial temperature gradients along the surface of the IPEM which would translate to lower thermally induced stress and higher reliability. The sensitivity of the numerical predictions to important parameters; including the dielectric conductivity, contact conductance, and heat sink characteristics are numerically investigated. An experimental fixture was fabricated and used to measure a miniature rectangular heat pipe's performance characteristics and the solder joint resistance at its evaporator and condenser interfaces in order to validate the numerical model inputs and demonstrate the required heat pipe capacity. The tested heat pipe was limited to approximately 80 W/cm/sup 2/ heat flux in a vertical, evaporator-over-condenser orientation. This limit was not observed in a vertical, gravity-assisted orientation for applied heat flux up to 125 W/cm/sup 2/. Equivalent heat pipe resistances of approximately 0.12 and 0.08 K/W were measured in these orientations, respectively. The contact resistance of the indium solder joint was measured and found to be approximately 0.1 cm/sup 2//spl middot/K/W.

A thin-film laser, polymer waveguide, and thin-film photodetector cointegrated onto a silicon substrate

Planar lightwave circuits, which include optical passive and active components, can be integrated with electronics to form planar lightwave integrated (PLICs). Integration of PLICs onto standard electronic substrates (FR-4, Si) is an important step toward optical signal processing and signal distribution at the backplane, board, and chip level for sensing, interconnection, and other systems that utilize both optics and electronics. Further, if the topography of the entire planar optical system can mimic that of interconnection and integrated circuits, then the optics can be confined to the substrate plane, and the optical circuits begin to mimic electrical in format. Additionally, beam turning out of the plane of the system is no longer mandatory. In this letter, the first demonstration of a planar lightwave interconnection consisting of a thin-film InP-based laser, waveguide, and thin-film InGaAs photodetector (PD) heterogeneously integrated onto a SiO/sub 2/-Si substrate is reported. PD currents were measured as a function of laser bias current, and the laser to waveguide coupling efficiency was estimated at 22.6%.

Integrated CoolMOS FET/SiC-Diode Module for High Performance Power Switching

A Si CoolMOS field effect transistor and SiC diode assembly with gate driver in boost configuration (ratings at 600V/12A), for power factor correction application, has been fabricated in a version of an integrated power electronic module. It uses the so-called embedded power technology, to form a three-dimensional multiple chip/component interconnection with the embedded chips in a co-planar ceramic substrate with thin-film metallization bond/interconnection added on top. In this paper, the switching parameters of this module and their effects on the performance of a converter have been analyzed and experimentally characterized. The procedures adopted for the defined fabrication process of planar metallization interconnects are presented. In addition to the improvement of structural electrical properties, compared to a conventional discrete version, the characteristics of the planar process integration have also been demonstrated.

(1+2)D interaction of strong nonlocal optical spatial solitons

Strong optical spatial solitons are solitons that satisfy the strong nonlocal condition.We discuss the nonplanar interaction of a pair of (1+2)D optical spatial solitons with symmetrical oblique incidence on the basis of Snyder and Mitchell's revolutionary work［Accessible solitons.Science,1997,276(6):1538—1541］.An accurate analytical solution in Gaussian form is obtained for the first time.It is shown that rrapping of two beams in a stable spiraling is possible for a large range of parameters.The spiraling structure does not depend on the initial relative phase.The projection of the wto beam centers in the transverse coordinate plane lies always in the same ellipse.It is possible to find its applications in planar all-optical swithching and all-optical interconnection in bulk media.

Loop-Tree Implementation of the Adaptive Integral Method (AIM) for Numerically-Stable, Broadband, Fast Electromagnetic Modeling

The adaptive integral method (AIM) is implemented in conjunction with the loop-tree (LT) decomposition of the electric current density in the method of moments approximation of the electric field integral equation. The representation of the unknown currents in terms of its solenoidal and irrotational components allows for accurate, broadband electromagnetic (EM) simulation without low-frequency numerical instability problems, while scaling of computational complexity and memory storage with the size of the problem are of the same order as in the conventional AIM algorithm. The proposed algorithm is built as an extension to the conventional AIM formulation that utilizes roof-top expansion functions, thus providing direct and easy way for the development of the new stable formulation when the roof-top based AIM is available. A new preconditioning strategy utilizing near interactions in the system which are typically available in the implementation of fast solvers is proposed and tested. The discussed preconditioner can be used with both roof-top and LT formulations of AIM and other fast algorithms. The resulting AIM implementation is validated through its application to the broadband, EM analysis of large microstrip antennas and planar interconnect structures.

Planar Lightwave Integrated Circuits With Embedded Actives for Board and Substrate Level Optical Signal Distribution

This paper explores design options for planar optical interconnections integrated onto boards, discusses fabrication options for both beam turning and embedded interconnections to optoelectronic devices, describes integration processes for creating embedded planar optical interconnections, and discusses measurement results for a number of integration schemes that have been demonstrated by the authors. In the area of optical interconnections with beams coupled to and from the board, the topics covered include integrated metal-coated polymer mirrors and volume holographic gratings for optical beam turning perpendicular to the board. Optical interconnections that utilize active thin film (approximately 1-5 /spl mu/m thick) optoelectronic components embedded in the board are also discussed, using both Si and high temperature FR-4 substrates. Both direct and evanescent coupling of optical signals into and out of the waveguide are discussed using embedded optical lasers and photodetectors.

Integrated Flip-Chip Flex-Circuit Packaging for Power Electronics Applications

A novel flip-chip flex-circuit packaging platform is described that enables integration of multiple power dies and control circuitry with an advantageous form factor. A key attribute of this packaging platform is to extend the well-established flex-circuit and flip-chip soldering technologies in signal electronics to power electronics applications. The planar interconnection and flip-chip method facilitate multilayer packaging structure with reduced packaging dimensions and reduced packaging parasitics. A half-bridge test vehicle designed and fabricated for DC/AC inverter applications (42 V, 16 A) with an overall flex-circuit module footprint less than 30% that of a discrete device printed circuit board implementation has been modeled and demonstrated experimentally. Electrical results, confirmed with circuit simulation incorporating parasitic inductance electromagnetic modeling, have shown a turn-off voltage overshoot reduction of over 40% and a switching energy loss reduction of 24% with the flip-chip flex-circuit implementation. The power flex platform has a strong potential for integrated multichip power module applications that require minimized packaging size and parasitic inductance for high switching frequency and efficiency.

A THz transverse electromagnetic mode two-dimensional interconnect layer incorporating quasi-optics

We report the demonstration of a planar THz interconnect layer capable of transmitting subpicosecond pulses in the transverse electromagnetic (TEM) mode over arbitrarily long paths with low absorption and no observable group velocity dispersion. Quasioptical elements are incorporated within the interconnect layer forming a configurable THz bandwidth TEM-mode planar interconnect with negligible group velocity dispersion and low loss. For a 146 mm guided path length, including four reflections, the pulses are broadened by the frequency dependent absorption of the interconnect layer from 0.28 to 0.32 ps, and attenuated by the factor 0.2.

Analysis of signal propagation on high‐speed planar interconnect systems based on full‐wave and macromodeling techniques

AbstractAn accurate and systematic approach for the analysis of signal propagation at high‐speed planar interconnect systems is proposed in this paper. The approach integrates a macromodeling technique based on the full‐wave time domain method and rational function approximation together with the SPICE circuit simulation. The admittance Y transfer function in the form of a set of discrete frequency sampling data is established by using the full‐wave finite‐difference time‐domain (FDTD) method, which characterizes the high‐speed planar interconnect subnetwork. Thereafter, the macromodel of the interconnect subnetwork is constructed through rational function approximation by using the Vector fitting method, which results in an accurate and robust solution for the overall problem. Subsequently, the resultant macromodel can be synthesised and converted to a SPICE‐compatible equivalent circuit. Therefore, the signal propagation analysis is finally facilitated and expedited by using the SPICE circuit simulator. Numerical experiments are presented in this paper to verify the accuracy and efficiency of the proposed method. © 2003 Wiley Periodicals, Inc. Microwave Opt Technol Lett 39: 183–187, 2003; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.11163

Modeling of thermal stresses in passivated interconnects

Analytical modeling is performed to obtain closed-form solutions for the thermal stresses in passivated interconnects in microelectronic devices. A periodic unit cell of a planar passivated interconnect on a substrate is considered. When the aspect ratio of the cross section of the interconnect line has a limiting value, zero or infinity, closed-form solutions for the volume-averaged thermal stresses in the interconnect can be readily derived. These analytical solutions agree with existing finite element calculations. Using the modified shear lag model, the general closed-formed solutions for the thermal stress distributions in the cross section of the unit cell normal to the interconnect line are derived. Specific results are calculated for the system of Al interconnect lines on Si substrate with SiO2 passivation. The effects of the geometrical parameters in the system (e.g., interconnect aspect ratio, distance between interconnect lines, and passivation thickness) on the thermal stress distributions are examined.

Multichip module with free-space optical interconnects and VCSEL-solder-joints

The design of a multichip module with planar optical interconnects is presented. Electrical (local) interconnects for intra-chip communication and optical interconnects for chip-to-chip communication are implemented onto the same substrate of a planar-integrated free-space optical system. We suggest to integrate the optical emitter/detectors (VCSEL diodes) into solder balls; onto these solder balls IC carrying silicon chips can be flip-chip bonded like on a common ball grid array. With respect to the thermal load thermally conductive vias are incorporated into the package, too. We show that typical packaging errors can be tolerated by the optical system, which is designed for space variant interconnects and enables thin film replication techniques of temperature sensitive materials.