Photoresist Lift-off Research Articles

Plasmonic Responses in Metal Nanoslit Array Fabricated by Interference Lithography

Gap tunable gold nanoslit arrays were fabricated by interference lithography and investigated numerically to understand the impact of fabrication errors on plasmonic responses. To fabricate the gap tunable gold nanoslit arrays, photoresist nanoslit arrays on quartz substrate were first formed by laser interference, and then converted to gold nanoslit array on glass substrate by perpendicular gold deposition and photoresist lift-off. Because the photoresist nanoslit has a sinusoidal profile due to the laser light interference lithography, different photoresist development time from 20[Formula: see text]s to 30[Formula: see text]s can tune the photoresist width from 100[Formula: see text]nm to 70[Formula: see text]nm, thus allows the gap-width-tuned metallic nanoslits to be attained accordingly. The optical properties of the fabricated gold nanoslit arrays were investigated experimentally and theoretically by studying the absorption in the transmission spectra. Within the wavelength range of 400[Formula: see text]nm to 860[Formula: see text]nm, the nanoslit in air has two prominent absorption peaks at 500[Formula: see text]nm and 670[Formula: see text]nm. It is found that a simulation model with gold nanoslit fabrication errors such as size variation, chromium adhesive layer and gold residue in nanoslit gaps considered can better match the simulation peaks with the experiments. The simulation of the gold nanoslit array in air indicates that the 500[Formula: see text]nm peak includes the interband transition and surface plasmon polariton (SPP) at air-gold surface, and the other peak at 670[Formula: see text]nm is SPP at glass side. The two SPP peaks are both sensitive to the refractive index of surrounding solution, with sensitivities of the two peaks demonstrated to be 267[Formula: see text]nm/RIU and 111[Formula: see text]nm/RIU in experiments, and 462[Formula: see text]nm/RIU and 180[Formula: see text]nm/RIU by simulation. The lower sensitivity detected by experiments might be due to some air bubbles in the flow cell reducing the effective refractive index around the nanoslit. The shorter wavelength SPP mode is 2.4 (in experiments) or 2.6 times (by simulation) more sensitive than the long wavelength SPP mode because its plasmonic field concentrates on water-gold surface. The plasmonic responses we simulated with fabrication errors explained our experimental investigations, and deepened our understanding on the application of the gold nanoslit array for refractive index-based biosensing.

Infrared waveguide fabrications with an E-beam evaporated chalcogenide glass film

Chalcogenide glasses have a variety of unique optical properties due to the intrinsic structural flexibility and bonds metastability. They are desirable materials for many applications, such as infrared communication sensors, holographic grating, optical imaging, and ultrafast nonlinear optic devices. Here, we introduce a novel electron-beam evaporation process to deposit the good quality arsenic trisulfide (As2S3) films and then the As2S3 films were used to fabricate the As2S3 waveguides with three approaches. The first method is photoresist lift-off. Because of the restriction of thermal budget of photoresist, the As2S3 film must be deposited at the room temperature. The second one is the silicon dioxide lift-off process on sapphire substrates, in which the As2S3 film could be evaporated at a high temperature (>180 °C) for better film quality. The third one is the plasma etching process with a metal protective thin layer in the pattern development process.

Template-Stripped, Ultraflat Gold Surfaces with Coplanar, Embedded Titanium Micropatterns

Ultraflat gold surfaces with coplanar, embedded titanium micropatterns, exhibiting extremely low roughness over the entire surface, have been obtained by a modified template-stripping procedure. Titanium is deposited onto photolithographically predefined regions of a silicon template. Following photoresist lift-off, the entire surface is backfilled with gold, template stripping is conducted, and an ultraflat micropatterned surface is revealed. Atomic force microscopy confirms a roughness of <0.5 nm RMS on both Ti and Au regions, with a topographically indistinguishable gold-titanium interface. Detailed surface-chemical maps of the patterned surfaces have been obtained by means of imaging X-ray photoelectron spectroscopy (i-XPS) as well as time-of-flight secondary-ion mass spectrometry (ToF-SIMS). They confirm the presence of well-separated Ti and Au regions, with a chemical contrast that is sharp (as determined by ToF-SIMS) and complete (as determined by i-XPS) across the Ti-Au interface. Thus, a surface has been fabricated that is physically homogeneous down to the nanoscale incorporating chemically distinct micropatterns consisting of two different metals, with totally contrasting surface chemistries.

Development of a microfluidic biosensor for detection of environmental mycobacteria

In this paper, we describe the development of a microfluidic culture-based biosensor for detecting mycobacteria in environmental samples. The biochips rely upon the unique paraffinophilic (i.e., wax-loving) nature of mycobacteria to rapidly and selectively differentiate them from non-target microorganisms. A new method of depositing and patterning paraffin was developed to fabricate the prototype biosensors using Opticlear™ as solvent to generate liquid paraffin and pattering with positive photoresist lift-off. The prototype biochips were experimentally tested to demonstrate the concept of rapid and selective detection of mycobacteria using pure cultures and epifluorescence microscopy to visualize microorganisms on the surface. Our successful demonstration of the culture-based biochip technology presents an alternative approach for developing new technology to track microorganisms in complex environmental samples. A microfluidic chip to selectively culture mycolic acid containing actinomycetes from environmental samples will improve screening for mycobacteria to protect public health as well as screening for mycobacteria to reduce the costs associated with treating nocardiafoam at sewage treatment plants.

Obtaining high rates for the etching and ashing for large liquid‐crystal display substrates by using a surface‐wave plasma source

AbstractIn the manufacture of thin‐film transistor liquid‐crystal displays (TFT‐LCDs), a major goal is to scale up the production of liquid‐crystal panels and lower their production costs. For that reason, we have developed a large‐area high‐density (3.58 × 1011 cm−3) surface‐wave plasma source based on a slot antenna. This source is designed to reduce the number of separate production steps in semiconductor processing, thereby increasing the throughput of large‐area TFT‐LCD substrates. We are convinced that the use of this plasma source will not only increase the etching rate, but also reduce the need for industry‐standard photoresist liftoff processes by enabling an uninterrupted transition after etching to photoresist liftoff (ashing). We found that the etching rate for a 400 × 500 mm2 polysilicon layer on a glass substrate was 58 nm/min with a uniformity of ±6.8% when our source was used. Furthermore, when ashing was carried out in the same chamber immediately after etching, the ashing rate was 1430 nm/min with a uniformity of ±9.3%. We also found that the selectivity ratio for resist versus polysilicon and the SiO2 in an underlayer was higher than 140. This implies that our process outperforms the standard resist liftoff process; indeed, we have realized a high‐uniformity etching process with twice the etching rate of standard methods. In addition, we have made progress toward realizing an ashing process, which is almost ready for practical use. These two processes can be combined into a single integrated etching–ashing process that will reduce the need for a separate liftoff procedure and simplify processing. © 2004 Wiley Periodicals, Inc. Electron Comm Jpn Pt 2, 87(6): 28–38, 2004; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/ecjb.10086

Lateral color integration on rare-earth-doped GaN electroluminescent thin films

Lateral color integration has been obtained using GaN thin films doped with Er and Eu. These rare-earth doped GaN (GaN:RE) films were grown on Si (111) substrates by molecular beam epitaxy. Independent red and green emissions have been obtained from side-by-side Er and Eu electroluminescent devices. Photoluminescence and electroluminescence operation show green emissions at 537 and 558 nm from Er-doped GaN and red emission at 621 nm from Eu-doped GaN. Two patterning fabrication techniques have been investigated to obtain lateral integration: (a) use of shadow masks during 400 °C growth of GaN:RE films; (b) photoresist liftoff in conjunction with &amp;lt;100 °C GaN:RE growth. Devices fabricated by the shadow mask method were bright enough to be detected under the ambient light at a bias of 30 V. The GaN:RE films were clear and their surfaces were smooth with nanoscale GaN grains. The root mean square surface roughness was measured to be 5–10 nm.

Novel fabrication of Ti-Pt-Au/GaAs Schottky diodes

A novel fabrication process for evaporated refractory-metal/n-GaAs Schottky contacts is presented. This process avoids the use of photoresist lift-off in order to maintain an exceptionally clean Schottky interface. Resulting millimeter-wave varactor diodes exhibit the same anode quality as previous electroplated platinum/n-GaAs varactor diodes but with improved reliability, repeatability and cost. A titanium deposition-rate of 1.2-1.6 nm/s was found to yield minimum ideality factor and breakdown voltages equivalent to those of Pt devices at a doping density of 1/spl times/10/sup 17/ cm/sup -3/. Devices fabricated on material doped at 2.3/spl times/10/sup 17/ cm/sup -3/ and above, however, had significantly lower breakdown voltages compared to platinum diodes. This is believed to be due to the lower barrier height of the titanium anodes, which causes an increased tunneling current.

Photolithographic patterning of vacuum-deposited organic light emitting devices

We demonstrate a photolithographic technique to fabricate vacuum-deposited organic light emitting devices. Photoresist liftoff combined with vertical deposition of the emissive organic materials and the metal cathode, followed by oblique deposition of a metal cap, avoids the use of high processing temperatures and the exposure of the organic materials to chemical degradation. The unpackaged devices show no sign of deterioration in room ambient when compared with conventional devices fabricated using low-resolution, shadow mask patterning. Furthermore, the devices are resistant to rapid degradation when operated in air for extended periods. This work illustrates a potential foundation for the volume production of very high-resolution, full color, flat panel displays based on small molecular weight organic light emitting devices.

In situ sputter cleaning of vias using a getter electrode

An aluminum electrode is rf powered before sputter cleaning of wafers to reduce the partial pressure water vapor in an evaporator. Prolonged sputter cleaning times are thereby avoided because regrowth of the aluminum oxide during sputter cleaning is practically nil. Wafers with temperature sensitive resists, for example, with a polyimide or photoresist lift off mask for fabrication of the conductor lines can be sputter cleaned and low via resistance obtained without mask damage. Histograms of the via resistance as a function of the sputter cleaning time in the range from 15 to 60 s are presented for the as-deposited and sintered metallization. The tooling and the process to obtain low via resistance are described. The author believes, that the principle method and electrode design may be useful for similar applications where a low partial pressure water vapor in a vacuum apparatus is required.

7664. The relation between lift-off of photoresist and the surface coverage of trimethylsiloxy groups on silicon wafers: a quantitative time-of-flight secondary ion mass spectroscopy and contact angle study: J J Ponjeé et al,J Vac Sci Technol, B8, 1990, 463–466

7664. The relation between lift-off of photoresist and the surface coverage of trimethylsiloxy groups on silicon wafers: a quantitative time-of-flight secondary ion mass spectroscopy and contact angle study: J J Ponjeé et al,J Vac Sci Technol, B8, 1990, 463–466

The relation between lift-off of photoresist and the surface coverage of trimethylsiloxy groups on silicon wafers: A quantitative time-of-flight secondary ion mass spectrometry and contact angle study

In this paper the interaction between a trimethylsilylated silicon substrate and diazonaphthoquinone–novolak photoresist material has been examined. Time-of-flight secondary ion mass spectrometry (TOF SIMS) and contact angle measurements of water have been used to determine the surface coverage of trimethylsiloxy (TMS) groups on cleaned and subsequently treated silicon wafers. A linear relation is obtained between the relative surface coverage as measured by TOF SIMS and the cosine value of the contact angle. The surface coverage of the TMS groups has to exceed a value of about 50% of a monomolecular layer to assure the absence of lift-off of photoresist. Contrary to the common belief that trimethylsilylation of silicon substrates improves the adhesion between photoresist and the silicon substrate, it rather deteriorates the adhesion. This is further corroborated by experiments on silica particles. It is proposed that the low-surface energy of the trimethylsilylated surface prevents the penetration of the alkaline developer solution into the interface of the silicon substrate and the photoresist material.

Nucleation of body-centered-cubic tantalum films with a thin niobium underlayer

We discuss the structural and electrical properties of high-quality Ta films prepared by ion beam sputter deposition. The Ta films grow in two different crystal structures, body-centered-cubic (bcc) or tetragonal (β-Ta), depending on the substrate preparation and sputtering conditions. Ta films deposited on a thin (&amp;gt;0.3 nm) Nb underlayer grow in the bcc crystal structure with properties approaching those of clean bulk polycrystalline material. The bcc-Ta films have a superconducting transition temperature of 4.3 K and a low-temperature (10 K) resistivity ρ∼6 μΩ cm. Ta films deposited without a Nb underlayer on Si substrates always grow in the tetragonal (β-Ta) structure. The β-Ta films do not superconduct above 1 K and have a high resistivity ρ∼150 μΩ cm. X-ray diffraction and transmission electron microscope studies of both Ta structures are presented. Both bcc-Ta and β-Ta films are deposited on room-temperature substrates. This allows either type of film to be easily patterned by standard photoresist liftoff methods.

Thin film process for Nb/NbO x/(Pb-In-Au) Josephson junction devices

A thin film process for the fabrication of Nb/NbO x /(Pb-In-Au) Josephson junctions has been developed. This process is primarily based on the lift-off of photoresist treated with toluene, ion beam etching of junction areas, d.c. plasma oxidation and thin film vacuum deposition techniques. The device characteristics are described in terms of the processing parameters.

ChemInform Abstract: PHOTO‐CVD FOR VLSI ISOLATION

This paper reviews the technique of photochemical-assisted vapor deposition (photo-CVD), and its applications in silicon IC processing. The photo-CVD process deposits SiO/sub 2/ films (PHOTOX /SUP TM/ ) at temperatures as low as 50/sup 0/C. The deposition process, the resulting film properties, and the use of PHOTOX SiO/sub 2/ for lateral isolation among transitors and vertical isolation between two-level interconnects are discussed. A novel process employing PHOTOX deposition in conjunction with a photoresist liftoff can be used to achieve totally isoplanar isolation. Photo-CVD can also be extended to produce other dielectrics such as silicon nitride and aluminum oxide.

A new field isolation technology employing lift-off patterning of sputtered SiO2films

A new field isolation technology for LSI devices is described. This technology features low-temperature ( 2 and photoresist lift-off. MOS devices are fabricated using this isolation technology. It is shown that bird's-beak-free field oxide is formed using a fabrication process which is shorter than that using other isolation methods. It is shown that the narrow-channel effect is significantly reduced in MOSFET's fabricated with this technology.

Photo‐CVD for VLSI Isolation

This paper reviews the technique of photochemical‐assisted vapor deposition (photo‐CVD), and its applications in silicon IC processing. The photo‐CVD process deposits films (PHOTOX™) at temperatures as low as 50°C. The deposition process, the resulting film properties, and the use of PHOTOX for lateral isolation among transistors and vertical isolation between two‐level interconnects are discussed. A novel process employing PHOTOX deposition in conjunction with a photoresist liftoff can be used to achieve totally isoplanar isolation. Photo‐CVD can also be extended to produce other dielectrics such as silicon nitride and aluminum oxide.

Properties of NbN/Pb Josephson tunnel junctions

Tunnel junctions made with NbN base electrodes and Pb counterelectrodes are investigated and characterized in terms of their potential for high-performance digital Josephson circuits. The NbN is deposited by dc magnetron reactive sputtering onto substrates which are held near room temperature (T /SUB s/ < 90/sup 0/C) to assure compatibility with conventional photoresist liftoff; the process results in films with a T /SUB c/ of 14.2K and an energy gap parameter ..delta.. /SUB NbN/ = 2.4meV. Tunnel junctions are formed by ion cleaning and reactive ion beam oxidation, and typically have low leakage and no excess conduction above the sum of the gaps. The effective penetration depth of NbN/Nb bilayers is shown to be small, while the specific capacitance of the junctions is comparable to that of Nb base-electrode junctions.

Ion-beam deposition of Nb and Ta refractory superconducting films

A Kaufman ion-beam source has been used to sputter deposit high quality superconducting Nb (Tc=9.1 K) and Ta (Tc=4.3 K) films. Superconducting and electrical properties were studied as a function of deposition conditions and an optimum set of conditions was found. Nb films always had the bulk bcc crystal structure. The Nb film deposition rates ranged from 1 to 5 Å/s with a Xe or Ar sputtering gas pressure of ∼1 to 4×10−4 Torr and a beam current density of 5–20 mA/cm2. Values of Tc above 8.3 K for Nb films were obtained with the use of Xe rather than Ar gas. In the case of Ta films, the deposition of a thin (≥3 Å) Nb underlayer was required for the nucleation and growth of Ta in the bulk bcc crystal structure. Ta films deposited without a Nb underlayer always had high resistivity, ∼150 μΩ cm, and a tetragonal β-Ta crystal structure. The Nb and Ta targets and Si substrates all remained below 70 °C during deposition and the films were easily patterned by standard photoresist liftoff.

Tapered windows in phosphorus-doped SiO2by ion implantation

Phosphorus-doped SiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> is frequently used as a dielectric coating in silicon integrated circuits. It is important that windows in this dielectric have sufficiently tapered walls so that the subsequent metallization has good step coverage. It is shown here that tapered windows can be made in both Nitrox-deposited ∼ 1-percent phosphorus-doped SiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> and Silox-deposited ∼ 7-percent phosphorus-doped SiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> as well as undoped SiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> by an ion implantation which produces a thin damaged layer at the top of the oxide. The damaged layer etches at a faster rate than the undamaged oxide. This fast-etching layer undercuts the photoresist which serves as the etching mask and results in window walls having slopes in the range of 30-40° with respect to the wafer surface. Tapering windows by ion implantation is a dependable process that gives reproducible results without having to rely on the art of photoresist liftoff methods.