Phase-locked Loop Research Articles

Compensation characterization of the UPQC system under an improved nonlinear controller based on the MSTOGI-PLL device

To solve the delay problem of a unified power quality conditioner (UPQC) system during the separation of the fundamental positive-order components and to better filter out the DC and harmonic components to realize accurate phase locking, a mixed second- and third-order generalized integrator phase-locked loop (MSTOGI-PLL) has been designed to replace the traditional synchronous reference frame phase-locked loop (SRF-PLL). Under the premise of adopting the new phase-locking device of MSTOGI-PLL, the active disturbance rejection control (ADRC) controller or the super-twisting algorithm (STA) sliding mode controller is used in the DC voltage control module instead of the traditional PI controller, and the suitability of the two nonlinear controllers with the MSTOGI-PLL device is investigated. First, the new MSTOGI-PLL device is designed, and the new phase-locking method is applied to make the UPQC realize accurate phase locking under the non-ideal situation of the grid voltage containing unbalance, DC component, harmonics, and so on. Based on the above foundation, the ADRC or STA controller is independently adopted to replace the PI controller to construct the UPQC system with the ADRC + MSTOGI phase-locking device and the second-order STA + MSTOGI phase-locking device. Finally, a simulation comparison is carried out in a Simulink simulation platform regarding the UPQC system under different phase-locking devices, and the simulation results demonstrate that MSTOGI-PLL can successfully filter out the DC component and resolve the phase-locking process delay issue. Additionally, the UPQC system with ADRC + MSTOGI-PLL exhibits superior immunity and response speed to the PI controller and the second-order STA controller.

Multi-gigabit X-band transmitter for satellite communication using the optical phase-locked loop.

Optical generation of microwave signals using photonic techniques offers benefits of frequency agility, ease of frequency scaling, and reduced hardware complexity. We demonstrate the generation and detection of QPSK modulated with symbol rates up to 5 GBaud at carrier frequencies of 8-12 GHz through optical heterodyning of two-phase-locked lasers. The received data is demodulated through appropriate post-processing to correct for the phase noise and IQ imbalance. The approach is scalable to mmWave and THz communication.

A Series Impedance Reshaping Control Method Considering PLL Dynamics for Grid-Connected Inverters Under Weak Grid Conditions

Grid-connected inverters are the key part in renewable energy power generation systems. Usually, phase-locked loop (PLL) is adopted in grid-connected inverters to achieve synchronization. However, prior-art works have revealed that the negative resistance behavior in the low-frequency band caused by PLLs may lead to system instability under weak grids. In this paper, first, a comprehensive small-signal output impedance modeling of the LCL-filtered single-phase grid-connected inverter is derived for stability analysis, where the digital control delays and PLL dynamics have been taken into account. Then, a simple but effective virtual series based impedance reshaping method is proposed. With that, the inverter system can operate stably even under a very weak grid (e.g., short-circuit ratio (SCR) is as low as 1.2). Compared with the traditional grid impedance compensation by virtually increasing grid resistance or reducing the grid inductance, the proposed method does not require grid impedance estimation and is robust against system parameter variations. Thus, its feasibility is improved. Finally, experimental tests are carried out on a single-phase 5-kW prototype, validating the effectiveness of the proposed scheme.

Modeling of Brillouin-Assisted Self-Narrowed Photonic Oscillator Including an Optical Phase-Locked Loop

Modeling of Brillouin-Assisted Self-Narrowed Photonic Oscillator Including an Optical Phase-Locked Loop

Multi-frequency signal acquisition and phase measurement in space gravitational wave detection.

To enhance the accuracy of phase measurement and to prevent tracking errors, it is crucial to effectively read the multi-frequency signal in space gravitational wave detection. In this paper, a novel signal acquisition method called the multi-frequency acquisition algorithm is proposed and implemented. Different from the traditional single-frequency acquisition, the signal characteristics of amplitude and frequency are both considered to better distinguish different frequency components. A phasemeter integrated with the acquisition method and narrow-bandwidth digital phase-locked loop is constructed for the method test and verification. The results show that the multi-frequency acquisition unit can capture all the frequencies of an input signal in several milliseconds. The precision is better than ±200Hz under a low SNR (signal-to-noise ratio) of 0 dB. The phase noise can reach 2 µrad/Hz1/2 in the frequency range of 0.1-1Hz and satisfy the requirement of the space gravitational wave detection in all frequency ranges.

Research on a Sensorless ADRC Vector Control Method for a Permanent Magnet Synchronous Motor Based on the Luenberger Observer

A sensorless vector active disturbance rejection control (ADRC) method for permanent magnet synchronous motors (PMSM) utilizing a Luenberger observer is presented. This method aims to address the challenges associated with weak active disturbances, substantial steady-state speed amplitude fluctuations, and difficulty in achieving a balance between overshoot and speed control in the sensorless PMSM control system. Mathematical models of the Luenberger observer and the ADRC were analyzed, leading to the proposal of a second-order ADRC control method based on the Luenberger observer. A mathematical model of the permanent PMSM has been introduced. Additionally, the necessary conditions for the convergence of the Luenberger observer were derived and examined. The allowable range of error feedback gain values was determined, and rotor position data were acquired using a phase-locked loop. The principle of the ADRC was analyzed, and the ADRC simulation results, along with the PI simulation results, were detailed. When the target speed is 1000 r/min, the steady-state error and load disturbance resistance of the ADRC control method outperform those of the PI control method. Finally, the control method was experimentally tested on an STM32F4 chip, demonstrating the advantages of small steady-state error and strong active disturbance ability.

Near-Field Probing of Microwave Oscillators with Josephson Microscopy.

Voltage-controlled oscillators, serving as fundamental components in semiconductor chips, find extensive applications in diverse modules such as phase-locked loops, clock generators, and frequency synthesizers within high-frequency integrated circuits. This study marks the first implementation of superconducting Josephson probe microscopy for near-field microwave detection on multiple voltage-controlled oscillators. Focusing on spectrum tracking, various phenomena, such as stray spectra and frequency drifts, were found under nonsteady operating states. Parasitic electromagnetic fields, originating from power supply lines and frequency divider circuits, were identified as sources of interference between units. The investigation further determined optimal working states by analyzing features of the microwave distributions. Our research not only provides insights into the optimization of circuit design and performance enhancement in oscillators but also emphasizes the significance of nondestructive near-field microwave microscopy as a pivotal tool in characterizing integrated millimeter-wave chips.

Self-cascode and self-biased Dickson charge pump for fast locking wide lock range PLL with reduced phase noise

The charge pump is a fundamental component in phase-locked loop (PLL) circuits, essential for generating a control voltage that adjusts the frequency and phase of the voltage-controlled oscillator (VCO) to match the input reference signal. The self-cascode and self-biased Dickson charge pump architecture presented in this work addresses several key challenges encountered in conventional PLL designs. By integrating self-cascode techniques, the charge pump exhibits enhanced charging and discharging capabilities, enabling faster locking times essential for wide lock range PLLs. This comprehensive approach offers a compact and integrated solution that simultaneously enhances locking speed, widens the lock range, reduces phase noise, and simplifies design complexity, making it highly suitable for demanding applications in communication systems, radar, and wireless technologies. The novel CP is implemented in 90-nm CMOS technology with a 1.0-V supply voltage. It is integrated with a phase-locked loop (PLL) that has a lock time of 1.0 us, a negligible reference spur, and an average power consumption of 34.7 mW. The PLL is having a wide lock range of 0.98 GHz to 2.98 GHz with a center frequency of 1.54 GHz where the phase noise is calculated to be −100.9 dBc/Hz at 1 MHz offset frequency. This makes the PLL compatible with both GSM having 1.8 GHz and Wi-Fi having 2.8 GHz frequency bands. The proposed PLL is also capable of operating at a wide range of temperatures (−27 °C, 0 °C, 27 °C, 84 °C) and at various corners (NN, FS, SF, SS, FF) making it reliable in adverse circumstances.

TWO STAGE THREE PHASE GRID CONNECTED PHOTOVOLTAIC SYSTEM

The new age of electricity generation is renewable energy. There is no other room, but to use renewable resources in energy generation to make the planet safer, and sustainable for the future. Renewable resources come in a variety of ways, but solar energy is by far the most practical. These days, solar panels are widely used due to their ease of use, accessibility, and efficiency in producing power. This Project mainly represents the simulation of compact design of a grid-tied solar system for energy production. Several fundamental characteristics, including temperature, irradiance, voltage, and current, affect the efficiency of a solar panel. Hence sudden change in any of these parameters leads drop in power and voltage. The precept aim is to improve the output voltage of PV array and boost converter there by reducing the harmonic content in grid current. The main points discussed here are the MPP tracking algorithm, the synchronization of the inverter and the connection to the grid. Tracking the dc voltage and current allows MPP calculation which gives the inverter to function efficiently. Key Words:- Grid Connected PV Systems, DC-DC Boost Converter, Inverter, Harmonic Filter, MPPT and Phase Locked Loop(PLL).

Design of Fractional-Order Non-Singular Terminal Sliding Mode Observer Sensorless System for Surface-Mounted Permanent Magnet Synchronous Motor

A new sensorless speed control system for a fractional-order terminal non-singular sliding mode surface-mounted permanent magnet synchronous motor is proposed. The fractional terminal non-singular sliding mode surface, which can converge in finite time, is designed by combining the fractional-order control theory with the terminal attractor concept. Then, a new control rate is proposed to reduce system buffeting. Secondly, an adaptive back electromotive force filter is designed to reduce the harmonics in the sliding mode function estimation and improve the observation accuracy. In addition, the theoretical analysis of the designed system proves that the system can converge in a finite time. Then, a fraction-order phase-locked loop with variable factors is designed to make the system more capable of tracking the rotor. Finally, a simulation and experiment platform is built, and a comparison experiment is carried out, which proves that the designed algorithm has a stronger rotor position tracking ability and a better dynamic performance of the system.

Sensorless control of permanent magnet synchronous motor based on improved sliding mode observer

Aiming at the problems of chattering and low accuracy of rotor position observation in traditional sliding mode observer sensorless control of permanent magnet synchronous motor, an improved sliding mode observer sensorless control method is proposed. First, the sigmoid function is used to replace the traditional switching function, which can effectively improve the chattering problem of the sliding mode observer. Then, an adaptive back electromotive force observer is designed to avoid the use of low-pass filter and phase compensation and reduce the high-frequency harmonics in the back electromotive force estimation. Finally, the speed and rotor position information are obtained by improving the phase-locked loop, and the fundamental harmonics caused by the inverter nonlinearity are suppressed. The simulation and experimental results show that the improved sliding mode observer can effectively weaken the chattering problem of the system, and improve the position observation accuracy and the robustness of the system.

Grid synchronization method based on three novel types of third-order generalized integrators

Phase-locked loop (PLL) is widely used to estimate synchronous information such as amplitude and phase angle of grid voltage. It plays a crucial role in distributed renewable energy grid-connected power generation. However, the presence of grid harmonics and DC offset voltage (DCOV) can affect the accurate extraction of the fundamental voltage component, leading to phase-locked deviation. This paper introduces three novel or improved third-order generalized integrators (TOGI) with DCOV rejecting function to address this issue. A unified dual third-order generalized integrator (DTOGI) structure is designed based on the three TOGI structures. This DTOGI structure is further combined with a moving average filter (MAF) to propose three innovative three-phase PLLs. Unlike other PLL filtering methods that inadequately consider DCOV, the proposed PLL methods not only reject DCOV but also eliminate the fundamental voltage negative sequence component (FVNSC) and each order harmonic component. They demonstrate strong robustness and excellent filtering performance even under abnormal grid conditions. Among the three methods, the DII-TOGI based PLL exhibits superior dynamic performance compared to the other two methods, it can improve dynamic characteristics by about 10 % compared to the other two methods. The effectiveness of the proposed methods is verified through extensive Matlab/Simulink simulations and experiments.

A 0.73 mW low power 9.6 GHz LC voltage-controlled oscillator achieves constant KVCO and −189.2 FOM

This article introduces a novel approach of LC voltage-controlled oscillator (VCO) to overcome the challenges present in the Phase-locked loop (PLL) in high-frequency applications and proposes a 9.6 GHz VCO based on gm-boosted structure. By utilizing a transformer and gain variation calibration technique, the proposed VCO reduces the losses caused by MOSFET’s operation in triode region, thereby improving phase noise. And KVCO remains relatively constant, fluctuating up and down by approximately 5 MHz around 100 MHz/V, which is suitable to be used in phase-locked-loops (PLL). The oscillator is fabricated in 22 nm CMOS process occupying 0.25 mm × 0.55 mm area and consuming 0.73 mW from 0.5 V supply voltage. The measured phase noise achieves −114.3 dBc/Hz at 1 MHz offset with a carrier frequency of 4.75 GHz, and the figure of merit (FoM) is −189.2 dBc/Hz. The results clearly demonstrate that the proposed design could work under low power consumption and achieve constant KVCO, making it well suitable for high-frequency PLL applications.

Linear Variable Differential Transformer Signal Conditioning Circuit Based on Phase-Locked Loop

Linear Variable Differential Transformer Signal Conditioning Circuit Based on Phase-Locked Loop

Design of liquid level detection circuit based on sampling probe structure capacitance.

Liquid level detection system is an essential core functional component of automatic clinical medical testing instrument. The conventional liquid level detection method has low detection accuracy and sensitivity, and may have the problem of false detection, which may lead to the inaccurate test results. This paper presents a high sensitivity liquid level detection system based on the principle of variable capacitance. When the sampling probe contacts the liquid level, the probe capacitance will change. The liquid level detection circuit board judges whether the probe contacts the liquid level by sensing the change of probe capacitance. When judging the liquid level signal, the combination of slope detection and amplitude detection is used. The liquid level detection circuit board takes the phase-locked loop(PLL) circuit as the center to detect the change of the capacitance. The reference signal of the PLL is set as a square wave of 375kHz. The double tube probe is used as a part of the tuning capacitor of the voltage controlled oscillator to control the frequency of the output signal, which can realize the rapid phase locking. The experimental results show that the system has accurate detection results, high sensitivity, stable and reliable operation, good dynamic response performance in the case of large and small liquid volume. Compared with other liquid level detection methods based on machine vision, ultrasonic, optics and so on, the proposed liquid level detection system has simpler structure and lower cost, it can avoid the problems of collision, carryover contamination and empty suction by controlling the depth of sampling needle inserted into liquid.

Nonlinear analysis of the synchronous reference frame phase-locked loop under unbalanced grid voltage

The synchronous reference frame phase-locked loop (SRF-PLL), also called dqPLL, is an electric circuit commonly used in power electronics to estimate the phase angle of a three-phase AC grid. If the voltage is unbalanced, the PLL is modeled as a periodically forced nonlinear oscillator and is known in practice to converge to a steady oscillation. In the existing literature, the oscillation has been studied via linearization assuming a low level of unbalance. Aiming for stronger nonlocal statements, we present nonlinear analysis. We apply the method of autonomous comparison systems and incremental stability to show that the steady oscillation is unique and attractive in a wider neighborhood. Its lock-in domain is estimated using numerical phase portrait analysis. The oscillation is further approximated up to the terms of the second order in the unbalance factor—it yields an estimation of the time average of the PLL’s phase error which is not visible by linearization only. The results provide stability guarantees and can guide the tuning of SRF-PLL.

Compact Heterogeneously Integrated Optical Phase-Locked Loop for 10 GHz to 40 GHz Optical Frequency Difference Locking

Compact Heterogeneously Integrated Optical Phase-Locked Loop for 10 GHz to 40 GHz Optical Frequency Difference Locking

Performance and harmonic detection algorithm of phase locked Loop for parallel APF

As the boost of power electronics technology, the harmonic problem in the power system is becoming increasingly prominent. Fourier decomposition is performed on the load current in the power system, and components with a frequency that is an integer multiple of the fundamental wave are referred to as harmonic components. Harmonic control is essential to establish a safe and reliable power grid environment and provide high-quality and clean electricity to power users. The study focused on parallel active power filters, proposed a specific harmonic detection method on the grounds of synchronous harmonic rotating coordinate system, and developed a phase-locked loop design on the grounds of order generalized integrator. Meanwhile, a compensation current control method on the grounds of space vector pulse width modulation was introduced. The results showed that in the full compensation simulation experiment, the compensated A-phase grid side current waveform was significantly improved and presented a sinusoidal shape. After 0.05 s, the actual output compensation current closely followed the command current. Meanwhile, after compensation, the total harmonic distortion rate decreased from 26.58 to 3.06%. In specific harmonic compensation simulation experiments, when the sum of 5th, 7th, and 11th harmonic components was used as the command current for compensation, the distortion of the current waveform was improved after the load undergoes a sudden change. After compensation, the 5th, 7th, and 11th harmonic content significantly decreased, and the total harmonic distortion rate decreased to 4.08%. This indicated that the proposed phase-locked loop design and harmonic detection method for active power filters had high stability and effectiveness. The study’s primary contribution is to enhance the utilization efficiency of DC voltage and improve the dynamic response ability of current. Additionally, it offers a new method for reducing the impact of harmonics on the power grid and improving power quality. It provided an effective method reference for technological progress in related fields such as power electronics and control engineering.

Impact of Short-Circuit Ratio on Control Parameter Settings of DFIG Wind Turbines

This work deals with doubly fed induction generator (DFIG) modeling and stability when connected to weak AC grids. A detailed state-space model that includes the phase-locked loop (PLL) is developed. This work aims to determine the influence of the network’s strength on DFIG stability through the short-circuit ratio (SCR). The critical values of the proportional control parameters of the grid-side and rotor-side converters (RSC and GSC), as well as PLL, which make the system unstable, are calculated for different SCR values. Finally, PSCAD/EMTDC dynamic simulations are used to validate the critical control parameters obtained by studying the eigenvalues of the DFIG state-space model regarding system stability.

A Robust Switching Control Strategy for Three-Phase Voltage Source Converters with Uncertain Circuit Parameters

This study proposes a novel double closed-loop robust control strategy based on a power switching affine model of three-phase voltage source converters (VSCs). The aim is to overcome the challenges posed by inaccurate mathematical models, complex controller configurations, indirect switching control, and performance degradation under circuit parameters uncertainty or load variation in conventional methods. These conventional methods rely on linearization models, duty ratio regulation, and pulse width modulation (PWM) technologies. The contributions of work are the following: (1) A two-dimensional (2D) power switching affine model is constructed without any approximation or averaging. (2) The proposed approach achieves direct switching control of three-phase VSCs, eliminating the need for complex rotation coordinate transformation, PWM, and phase locking loop (PLL), which are utilized in traditional control methods. (3) The rigor of the system stability analysis is enhanced based on the 2D power switching model compared to the existing three-dimensional (3D) current switching model. (4) A simple control structure with only two control parameters is employed to address circuit parameter uncertainties. The effectiveness and superiority of the proposed method is validated through simulation and experimental comparison results.