Pentacene Thin-film Transistors Research Articles

Bilayer Source/Drain Electrodes Self-Aligned With Fluoropolymer Dielectrics for Stable High-Performance Organic TFTs

We propose a systematic fabrication method for stable high-performance organic thin-film transistors (TFTs) that are potentially compatible with high-density integrated circuits. Ag/PEDOT:PSS bilayers provide source/drain (S/D) electrodes with low sheet resistance and efficient hole injection capabilities, leading to high-performance bottom-contact pentacene TFTs with a saturation mobility of 0.19 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> / V·s. Patterned dielectric layers based on a fluoropolymer Cytop function as a hydrophobic bank structure to define S/D electrodes in a self-aligned manner from Ag ink and a PEDOT:PSS solution while simultaneously improving the electrical stability of pentacene TFTs.

Realization of uniform large-area pentacene thin film transistor arrays by roller vacuum thermal evaporation

A conventional vacuum thermal evaporation (VTE) system has been extended to a roller-VTE system with a moving substrate-holder to realize large-area organic film deposition. The multidimensional movement of the substrate-holder guarantees excellent uniformity of the large-area pentacene thin films. An 85-nm-thick pentacene film with a relative standard deviation as low as 2.7% is demonstrated within a 300 mm × 500 mm area. Thin film transistor arrays are then fabricated using the uniform pentacene films. The average transistor mobility is up to 0.85 cm2/V s with a relative standard deviation of 10%.

Suppression of bias stress-induced degradation of pentacene-TFT using MoO x interlayer

The bias stress effect in pentacene thin-film transistors (TFTs) with and without MoO x interlayer was characterized. The device without MoO x interlayer showed a large threshold voltage shift of 5.1 V after stressing with a constant gate-source voltage of −40 V for 10000 s, while at the same condition, the device with MoO x interlayer showed a low threshold voltage shift of 1.9 V. The results can be attributed to the stable interface between MoO x/pentacene and small contact resistance change for the device with MoO x/Cu electrode. Pentacene-TFTs with MoO x interlayer showed a high field-effect mobility of 0.61 cm 2/V s and excellent bias stability, which could be a significant step toward the commercialization of OTFT technology.

Tuning the contact resistance in organic thin-film transistors with an organic–inorganic hybrid interlayer

We demonstrated the tunable contact resistance in pentacene thin film transistor (TFT) by inserting an organic–inorganic hybrid interlayer between Au electrode and pentacene layer. The contact resistance of pentacene-TFT varies with concentration of pentacene-TFT varies with concentration of MoOx in organic–inorganic hybrid interlayer. MoOx in organic–inorganic hybrid interlayer. The contact resistance of the device with 55wt% MoOx doped pentacene interlayer is about 7.8 times smaller than that of device without interlayer at the gate voltage of −20V. Comparing the properties of pentacene-TFT without interlayer, the performance of the pentacene-TFT with 55wt% MoOx doped pentacene was significantly improved: saturation mobility increased from 0.39 to 0.87cm2/Vs, threshold voltage reduced from −21.3 to −7.2V, and threshold swing varied from 3.75 to 1.39V/dec. Our results indicated that the organic–inorganic hybrid interlayer is an effective way to improve the performance of p-channel OTFTs.

Characteristics of sputtered Al-doped ZnO films for transparent electrodes of organic thin-film transistor

Aluminum-doped ZnO (AZO) thin-films were deposited with various RF powers at room temperature by radio frequency (RF) magnetron sputtering method. The electrical properties of the AZO film were improved with the increasing RF power. These results can be explained by the improvement of the crystallinity in the AZO film. We fabricated the organic thin-film transistor (OTFT) of the bottom gate structure using pentacene active and poly-4-vinyl phenol gate dielectric layers on the indium tin oxide gate electrode, and estimated the device properties of the OTFTs including drain current–drain voltage (I D–V D), drain current–gate voltage (I D–V G), threshold voltage (V T), on/off ratio and field effect mobility. The AZO film that grown at 160 W RF power exhibited low resistivity (1.54 × 10 − 3 Ω·cm), high crystallinity and uniform surface morphology. The pentacene thin-film transistor using the AZO film that's fabricated at 160 W RF power exhibited good device performance such as the mobility of 0.94 cm 2/V s and the on/off ratio of ~ 10 5. Consequently, the performance of the OTFT such as larger field-effect carrier mobility was determined the conductivity of the AZO source/drain (S/D) electrode. AZO films prepared at room temperature by the sputtering method are suitable for the S/D electrodes in the OTFTs.

Charge carrier injection and transport associated with thermally generated cracks in a 6,13-bis(triisopropylsilylethynyl) pentacene thin-film transistor

We describe how the charge carrier injection and transport are influenced by thermal cracks in a 6,13-bis(triisopropylsilylethynyl) (TIPS) pentacene film in terms of the contact resistance and the channel resistance in a TIPS pentacene thin-film transistor (TFT). Through a post-thermal annealing (PTA) process at a certain temperature T a , the high structural order of TIPS-pentacene molecules is produced without thermal cracks, the carrier mobility of the TIPS pentacene TFT is maximized, and both the contact resistance and the channel resistance are minimized. Our quantitative description of the relationship between the PTA treatment and the interfacial resistance behavior would provide a useful basis for understanding the thermal stability and the electrical performance of a solution-processed organic TFT.

Bias Stress Effects on Different Dielectric Surfaces of Pentacene Thin-Film Transistors

In this paper, it was demonstrated that pentacene thin-film transistors (TFTs) were fabricated with an organic adhesion layer between an organic semiconductor and a gate insulator. In order to form polymeric film as an adhesion layer, a vapor deposition polymerization (VDP) process was introduced to substitute for the usual spin-coating process. Field effect mobility, threshold voltage, and on/off current ratio in pentacene TFTs with a 15 nm thick organic adhesion layer were about 0.4 cm2/Vs, -1 V, and 10(6), respectively. We also demonstrated that threshold voltage strongly depends on the stress time when a gate voltage has been applied for bias stress test. We suggest that a polyimide adhesion layer fabricated by the VDP method can be applied to realize organic TFTs with long-term stability because of lower threshold voltage shifts due to reduced charge trapping at the interface between the pentacene semiconductor and the polyimide layer.

CMOS TFT Op-Amps: Performance and Limitations

In this letter, we demonstrate the feasibility of building thin-film transistor (TFT) complementary metal-oxide-semiconductor (CMOS) operational amplifiers (op-amps) at low temperature (180°C) for large-area sensor applications. The classic two-stage Miller-compensated CMOS design is built using a-Si:H and pentacene TFTs. In addition, we have studied the impact of electrical stress-induced aging of TFTs on op-amp performance using two different kinds of biasing circuits.

Moisture-Induced Hysteresis of Pentacene Thin Film Transistors with Cross-Linked Poly(4-vinylphenol) Gate Dielectrics

The time variable electrical characteristics of pentacene thin-film transistors (TFTs) with poly(4-vinylphenol) gate dielectrics were investigated under various relative humidity conditions and the effect of moisture on the hysteresis behavior of the pentacene TFTs was studied. One possible cause of the hysteresis behavior is the presence of inherent hydroxyl groups in bulk or surface of the polymeric dielectric, which make the gate dielectric polar, but the hysteresis behavior of the pentacene TFTs was found to depend strongly on the relative humidity and to increase with an increase of the moisture in the surrounding atmosphere. With a time-scalable investigation, it was also found that the adsorption of moisture onto the pentacene layer is the main reason for the hysteresis even with the -OH rich polymeric dielectric. The hysteresis behavior was found to be significantly reduced by suppression of moisture or other moisture-induced impurities, such as the encapsulation of the devices with glass.

Light Sensing in a Photoresponsive, Organic-Based Complementary Inverter

A photoresponsive organic complementary inverter was fabricated and its light sensing characteristics was studied. An organic circuit was fabricated by integrating p-channel pentacene and n-channel copper hexadecafluorophthalocyanine (F16CuPc) organic thin-film transistors (OTFTs) with a polymeric gate dielectric. The F16CuPc OTFT showed typical n-type characteristics and a strong photoresponse under illumination. Whereas under illumination, the pentacene OTFT showed a relatively weak photoresponse with typical p-type characteristics. The characteristics of the organic electro-optical circuit could be controlled by the incident light intensity, a gate bias, or both. The logic threshold (V(M), when V(IN) = V(OUT)) was reduced from 28.6 V without illumination to 19.9 V at 6.94 mW/cm². By using solely optical or a combination of optical and electrical pulse signals, light sensing was demonstrated in this type of organic circuit, suggesting that the circuit can be potentially used in various optoelectronic applications, including optical sensors, photodetectors and electro-optical transceivers.

Characterization of the field-effect conductivity distribution in pentacene thin-film transistors by a near-field scanning microwave microscope

Direct probing of the conductivity distribution in organic materials is motivated by the need to obtain a deeper understanding of carrier behavior in organic thin-film transistors (OTFT), organic electro-luminescent devices, organic photoconductors, and organic biosensors. Here we used a near-field scanning microwave microscope to visualize conductivity profiles in OTFT channel. Applying this technique to pentacene field-effect transistors has revealed changes of the conductivity distribution in the channel arising from the development and exhaustion of an accumulated charge region. The electric field profiles, the complementary image of conductivity profiles, which are visualized by using an optical second harmonic generation method, support the results. We anticipate that direct observation by this microwave method will find wide application in measurement of carrier conductivity in organic and nonorganic materials.

Semi-transparent organic/inorganic hybrid photo-detector using pentacene/ZnO diode connected to pentacene transistor

Semi-transparent organic–inorganic hybrid photo-detector cells were fabricated on glass substrate, composed of pentacene/ZnO photodiodes and pentacene thin-film transistors (TFTs). Semi-transparent NiO x window with a large band gap of ∼4 eV was used as an ohmic electrode on 50 nm-thin pentacene channel in the TFT and simultaneously on the 150 nm-thick pentacene layer, which is deposited on ZnO for p–n diode, to absorb visible and ultraviolet photons from pentacene and ZnO, respectively. Our photo-detector exhibited a minimum temporal response of ∼300 ms for photo-induced output voltage at −1 V input and −3 V supply voltage.

Silicone substrate with in situ strain relief for stretchable thin-film transistors

We have manufactured stretchable thin-film transistors and interconnects directly onto an engineered silicone matrix with localized and graded mechanical compliance. The fabrication only involves planar and standard processing. Brittle active device materials are patterned on non deformable elastomer regions (strain &amp;lt;1% at all times) while interconnects run smoothly from “stiff” to “soft” elastomer. Pentacene thin-film transistors sustain applied strain up to 13% without electrical degradation and mechanical fracture. This integrated approach opens promising options for the manufacture of physically adaptable and transformable circuitry.

Origin of bias stress induced instability of contact resistance in organic thin film transistors

We report a study on the contact resistance instability induced by the bias stress in staggered pentacene thin film transistors, combining the bias stress measurements with the transfer line method. The contact resistance is increasing with the stress time, and two device parameters are found to contribute to this contact resistance instability: one is the threshold voltage increase due to the charge trapping in the charge accumulation layer; the other is the effective contact length increase due to the charge trapping in the pentacene bulk in the contact region. The gold contact shows lower contact resistance stability compared with the copper contact, which is ascribed to higher density of the deep trap states at the gold contact. This work suggests that the time-dependent charge trapping is responsible for the bias stress effect in organic thin film transistors.

Low-Cost $\hbox{MoO}_{3}/\hbox{Al}$ Bilayer Electrode for Pentacene-Based OTFTs

MoO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> prepared by oxidizing a Mo filament (oxidized MoO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> ) with Al is a good replacement of a Au electrode for pentacene-based organic thin-film transistors (TFTs) (OTFTs). The oxidized MoO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> /Al bilayer electrode shows better result than the laboratory-prepared pure MoO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> /Al bilayer electrode. This process will save the cost of laboratory-prepared pure MoO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> . The OTFTs show a very good current on-off ratio of 1.6 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sup> and a field-effect mobility (μ) of 0.57 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /V·s. With this process, we can fabricate low-cost pentacene TFTs with better performance by using a very simple fabrication technique.

An Almost Transparent Image Pixel with a Pentacene/ZnO Photodiode, a Pentacene Thin‐Film Transistor, and a 6,13‐Pentacenequinone Phosphor Layer

An almost transparent image pixel on glass is demonstrated for the first time under visible and UV illumination at 3 V. The pixel is composed of a pentacene thin-film transistor and a serially connected pentacene/ZnO photodiode, with or without a 6,13-pentacenequinone phosphor layer that was deposited on the photodiode for more efficient light detection.

Influence of structural properties on environmental stability of pentacene thin film transistors

We studied environmental stability of top contact pentacene TFTs with active layer evaporated at different growth rates. We measured the transfer characteristics in vacuum and in air and after storing the devices in oxygen for several days. Different pentacene growth rates result in different grain size of active layer. This morphology difference influences the hysteresis of transfer characteristics induced by water absorption. On the contrary, aging effects on the transfer characteristics of pentacene O-TFTs, induced by oxygen diffusion into the active layer, are not related to structural characteristics of pentacene film.

High Current-Gain Cutoff Frequencies above 10 MHz in n-Channel C60 and p-Channel Pentacene Thin-Film Transistors

The current-gain cutoff frequencies for bottom contact n-channel C60 and p-channel pentacene thin-film transistors (TFTs) with channel lengths of 2–10 µm have been investigated. The cutoff frequency was estimated by direct measurement of the gate and drain modulation currents. The measured cutoff frequencies for both C60 and pentacene TFTs increase consistently with reducing channel length. Cutoff frequencies of 27.7 and 11.4 MHz were obtained from C60 and pentacene TFTs with a channel length of 2 µm, respectively.

CMOS Circuits Based on a Stacked Structure Using Silicone-Resin as Dielectric Layers

We have demonstrated the inverter operation of stacked-structure CMOS devices using pentacene and ZnO as active layers. The fabrication process of the device is as follows: A top-gate-type ZnO thin-film transistor (TFT), working as an n-channel transistor, was formed on a glass substrate. Then, a bottom-gate-type pentacene TFT, as a p-channel transistor, was fabricated on top of the ZnO TFT while sharing a common gate electrode. For both TFTs, solution-processed silicone-resin layers were used as gate dielectrics. The stacked-structure CMOS has several advantages, for example, easy patterning of active material, compact device area per stage and short interconnection length, as compared with the planar configuration in a conventional CMOS circuit.

Charge transport in ambipolar pentacene thin film transistors

ABSTRACTAmbipolar organic transistors are technologically interesting because of their potential applications in light-emitting field-effect transistors [1] and complementary-metal-oxide-semiconductor (CMOS) devices by providing ease of design, low cost of fabrication, and flexibility [2]. Although common organic semiconductors show either n- or p-type charge transport characteristic, organic transistors with ambipolar characteristics have been reported recently. In this work, we show that ambipolar transport can be achieved within a single transistor channel using LiF gate dielectric in the transistors with pentacene active layer. This ambipolar behavior can be controlled by the applied source-drain and gate biases. It was found that at low source-drain biases multistep hopping is the dominant conduction mechanism, while in high voltage regimes I-V data fits in Fowler-Nordheim (F-N) tunneling model. From the slope of the F-N plots, the dependency between field enhancement factor and the transition point in conduction mechanism upon gate bias has been extracted. The transition points show more dependency on gate voltage for negative biases compared to the positive biases. While sweeping negative gate voltages from -5 to -20 V, the source-drain voltages change from about 27 to 17 V. On the other hand, for positive gate voltages from 5 to 20 V, the value of the transition point stays at approximately 36 V. In order to further understand the transport mechanisms, new structures with an interface layer between dielectric and active layer have been fabricated and characterized. As expected, a significant decrease in the amount of the source-drain current has been observed after introducing the interface layer.