Pentacene Layer Research Articles

Interface Energy Alignment of Atomic-Layer-Deposited VOx on Pentacene: an in Situ Photoelectron Spectroscopy Investigation.

Ultrathin atomic-layer-deposited (ALD) vanadium oxide (VOx) interlayer has recently been demonstrated for remarkably reducing the contact resistance in organic electronic devices (Adv. Funct. Mater. 2016, 26, 4456). Herein, we present an in situ photoelectron spectroscopy investigation (including X-ray and ultraviolet photoelectron spectroscopies) of ALD VOx grown on pentacene to understand the role of the ALD VOx interlayer for the improved contact resistance. The in situ photoelectron spectroscopy characterizations allow us to monitor the ALD growth process of VOx and trace the evolutions of the work function, pentacene HOMO level, and VOx defect states during the growth. The initial VOx growth is found to be partially delayed on pentacene in the first ∼20 ALD cycles. The underneath pentacene layer is largely intact after ALD. The ALD VOx is found to contain a high density of defect states starting from 0.67 eV below the Fermi level, and the energy level of these defect states is in excellent alignment with the HOMO level of pentacene, which therefore allows these VOx defect states to provide an efficient hole-injection pathway at the contact interface.

Minority Currents in n-Doped Organic Transistors.

Doping allows us to control the majority and minority charge carrier concentration in organic field-effect transistors. However, the precise mechanism of minority charge carrier generation and transport in organic semiconductors is largely unknown. Here, the injection of minority charge carriers into n-doped organic field-effect transistors is studied. It is shown that holes can be efficiently injected into the transistor channel via Zener tunneling inside the intrinsic pentacene layer underneath the drain electrode. Moreover, it is shown that the onset of minority (hole) conduction is shifted by lightly n-doping the channel region of the transistor. This behavior can be explained by a large voltage that has to be applied to the gate in order to fully deplete the n-doped layer as well as an increase in hole trapping by inactive dopants.

Gate-dependent asymmetric transport characteristics in pentacene barristors with graphene electrodes

We investigated the electrical characteristics and the charge transport mechanism of pentacene vertical hetero-structures with graphene electrodes. The devices are composed of vertical stacks of silicon, silicon dioxide, graphene, pentacene, and gold. These vertical heterojunctions exhibited distinct transport characteristics depending on the applied bias direction, which originates from different electrode contacts (graphene and gold contacts) to the pentacene layer. These asymmetric contacts cause a current rectification and current modulation induced by the gate field-dependent bias direction. We observed a change in the charge injection barrier during variable-temperature current–voltage characterization, and we also observed that two distinct charge transport channels (thermionic emission and Poole–Frenkel effect) worked in the junctions, which was dependent on the bias magnitude.

Low Temperature Processed Organic Tfts with Solution-Processable Al2O3 Gate Insulator Using Hydrogen Peroxide

Organic semiconductors are considered as a replacement for amorphous silicon in thin-film transistor (TFT) applications, since they have shown comparable electrical properties and potential advantages for their compatibility with plastic substrates. However, the high operating voltages of these TFTs still need to be reduced for any practical application. Among dielectric materials, aluminum oxide (Al2O3) appears to be promising due to its high dielectric constant, its robustness and its possibility to be prepared on different type of substrates under easy process. However, high quality and high dielectric constant films generally require annealing temperature above 400 oC, which is not suitable for high-throughput and flexible electronic devices. In this study, we fabricated the bottom-gate and top-contact organic TFTs on glass substrate. Al gate electrode was deposited by thermal evaporation while Al2O3 thin films, used as gate insulators, were grown by spin coating. Employing hydrogen peroxide (H2O2) in the solution process helps reduce defects at the interface between channel and G/I through strong oxidation and minimize organic chemical-induced defects, such as pores, pin holes, and organic residues, through decomposing organic chemicals at low temperature. The growth of the Al2O3 thin films with H2O2 was studied with various annealing temperatures from 100 ~ 300 oC and solution concentration of 0.1 ~ 1 M. Pentacene was evaporated through shadow mask at a rate of 0.3 Å/s to form a 70 nm thick active layer. Gold source/drain (S/D) electrodes (100 nm) were patterned using shadow mask on the pentacene layer. The performance of the solution processed Al2O3 based TFT was validated using capacitance-voltage and current-voltage analysis.

Ultra-Thin Flexible Electronics with the Enhancement Inverter Based-on Pentacene Thin Film Transistor

Thin film technology is advancing the research on fully flexible system for new applications in various fields, such as electronics, sensors and energy harvesting. In particular, thin film transistor (TFT) based flexible circuits have been studied for diagnostic devices, solar-cells, and flexible display. Although many companies and research groups have presented semi-flexible devices; a fully flexible system has not shown the sufficient result in terms of mechanical and electrical performance. Recently, inorganic-organic hybrid type TFTs have been developed and it shows the useful performance. However, the devices show limited performance at extremely small bending radius (< 1mm). In order to overcome the limitations, many researchers have suggested various solutions such as new materials of high mechanical strength, neutral strain position fabrication and ultra-thin substrates. Among these solutions, ultra-thin substrate is promising in the field of smart-skin, implantable device and patch-type biosensor. Depending on the decreasing substrate thickness, the strain strength also decreases dramatically. In this study, we demonstrate a nm-level ultra-thin device based on pentacene TFT, using de-bonding-technology. For de-bonding, a double layer of PVA and PAA based water soluble release layer was spin coated on the glass substrate. Subsequently, we coated the buffer layer on the release layer. The Al as gate electrode was deposited on the buffer layer by thermal evaporation. PMMA was then spin-coated and baked at 100 °C for 30 min. The pentacene and gold layer was deposited using thermal evaporation. CYTOP material was used for the passivation of the device. Finally, the device was de-bonded in double deionized water followed by curing at 75 °C for 30 min. Based on this process, we fabricated the nm-level thick TFT and enhancement inverter. After de-bonding process, the nm-level ultra-thin device showed good performance compared with the initial device before de-bonding.

Multi-Bit Non-Volatile Organic Transistor-Based Memory Using Lithium-Ion-Encapsulated Fullerene As a Charge Trapping Layer

Organic field-effect transistor (OFETs) based memory devices have been intensively researched in recent years because of their simple structure using a single transistor, reduced data storage losses, and easy integration in electronic circuits.[1] The memory effect in OFETs is achievable by inserting a charge trapping layer such as a thin film of star-shape poly((4-diphenylamino)benzyl methacrylate) between an active layer and a gate dielectric.[2] Charges can be injected to the charge trapping layer by applying a programming voltage, and will be stored after voltage removal. The stored charges affect on the drain current (I D) of the OFETs, and cause a shift of the threshold voltage (V th), which corresponds to the change of logic state. The stability of each state contributes to the memory effect. Expansion of the storage capacity of OFETs has been the object of many researches.[2,3] Lithium-ion-encapsulated fullerene (Li+@C60) would be a potential material for the charge trapping layer of multi-bit memories, because its three-fold degenerated lowest unoccupied molecular orbital (LUMO) is expected to accept up to 6 electrons by an applied voltage.[4] In this presentation, we demonstrate a multi-bit memory OFETs using Li+@C60 as the charge trapping layer. The top-contact OFETs using heavily doped p-type silicon wafers with a 400-nm-thick silicon dioxide were fabricated (Fig 1a). The layers of bis(trifluoromethylsulfonyl)imide Li+@C60 salt (Li+@C60NTf2 -, Fig. 1b) (island-formed) and Cytop (10 nm) were spin-coated on the silicon dioxide. Subsequently, a 50-nm layer of pentacene and copper electrodes (50 nm) were deposited at the pressure of 2.5 × 10-5 Torr. The length (L) and width (W) of the channel were 50 μm and 2000 μm, respectively. The electrical characteristics of the memory devices were measured with a semiconductor characterization system (Keithley) in a dry nitrogen atmosphere at room temperature. The as prepared OFET memories exhibited a good performance with low threshold voltage (V th) of -5.98 V and high electron mobility (μ) of 0.84 cm2V-1s-1. Then, to bring the transfer curve to the erased state, a negative voltage of -150 V was applied to the gate for 5 s, which results in V th of -19.79 V. For programming, a voltage of 150 V was applied to the gate for 0.5 s. The transfer curve shifted to the positive V G region with a V th of -9.99 V, reflecting a memory window (ΔV th) of approximately 10 V. To erase memory, a negative voltage of -150 V was applied to the gate for 0.17 s. The transfer curve shifted back to the erased state. The memory OFETs were subsequently programmed with a voltage of 150 V for 5 s or 50 s, and then erased with a voltage of -150 V for 1.7 s or 17 s, respectively. The transfer curve shifted to positions with a V th of -3.40 V and 12.40 V, respectively, and was brought back by erasing exactly to the erased state. Estimated values for ΔV th of 16 V and 32 V were clearly observed (Fig 1c). In our memory OFETs, the transfer curve of programmed states can go back to that of erased state. It is clear that the memory OFETs with Li+@C60 operated as multi-bit memories. In addition, to evaluate the long-time operation of the memory OFETs, the retention times of both the programmed and erased states were measured at a V D of -60 V and a V G of 0 V. A clear difference in logic states was observed for more than 3000 sec. (Fig 1d) To clarify the origin of the multi-bit memory effect of memory OFETs with Li+@C60, OFETs without Li+@C60 were also fabricated and compared the memory behaviors. The memory OFETs without Li+@C60 exhibit a 1-bit memory characteristics, which is in line with the results reported by Dao in 2012 [5]. In constrast, the memory OFETs with Li+@C60 exhibited muti-bit characteristics due to the difference in number of trapped electrons at the Li+@C60 layer under different programming conditions. This would result from the high electron acceptability of the three-fold degenerated LUMO of Li+@C60.[4] We therefore conclude that the electron-trapping ability of the Li+@C60 layer is at the origin of the multi-bit effect in our memory OFETs. [1] S.-T. Han et al., Adv. Mater. 25 (2013) 5425 - 5449. [2] Y.-C. Chiu et al., NPG Asia Mater. 5 (2013) e35. [3] K.-J. Baeg et al., Adv. Mater. 22 (2012) 2915 - 2926. [4] Y. Kawashima et al., Chem. Asian J. 10 (2015) 44 - 54. [5] T.T. Dao et al., Org. Electron. 13 (2012) 2709 - 2715. Figure 1

Fluorocopolymers: Balancing Surface Hydrophobicity and Polarizability of Fluorinated Dielectrics for Organic Field‐Effect Transistors with Excellent Gate‐Bias Stability and Mobility (Adv. Mater. Interfaces 15/2016)

Mi Jang, Minjung Lee, and co-workers clearly demonstrate how much the balancing surface hydrophobicity and polarizability of gate dielectrics is important to achieve excellent environmental, gate-bias stability, and mobility of organic field-effect transistors, specifically, based on pentacene layers grown on hydrophobicity-controlled fluorinated copolymer-treated dielectrics in article 1600284.

Stability in organic solar cells with Ag/pentacene anode buffer under repetitive illumination

The degradation phenomenon in small-molecule organic solar cells (OSCs) with a structure of indium-tin oxide (ITO, anode)/anode buffer/copper phthalocyanine (CuPc, donor)/fullerene (acceptor)/bathocuproine (cathode buffer)/Ag (cathode) was experimentally investigated. Two kinds of anode buffer layers, a 2-nm-thick pentacene layer and a 0.5-nm-thick Ag layer, were examined. The devices were subjected to repetitive illumination stress through the transparent ITO electrode in air. The ultra-thin Ag layer enhanced the ability of the devices to withstand the illumination stress. A thinner Ag layer resulted in better device performance. Resonant light absorption in the nanometer-scale Ag clusters probably accumulates trapped electrons near the ITO/CuPc interface, shrinks the depletion layer, enhances tunneling injection of holes, and suppresses the S-shaped kink during the illumination. The thin pentacene layer provides good ohmic contact between the anode and the CuPc layer, resulting in a larger short-circuit current. OSCs fabricated with both Ag and pentacene anode buffer layers exhibited only a 10% decrease in power conversion efficiency at 60 repetitions, whereas OSCs without an anode buffer layer exhibited a decrease of approximately 45%. The large decrease in efficiency was dominated by the decrease in the fill factor.

Effects of Doping and Electrode Contacts on Performance of Organic Light-Emitting Transistors Based on Pentacene and Tris(8-hydroxyquinoline)aluminum

Heterojunction-based organic light-emitting field-effect transistors (OLEFETs) with a top-contact, long-channel geometry were fabricated and comparatively characterized. The neutral cluster beam deposition (NCBD) method was used to successively deposit two layers of p-type pentacene and n-type tris(8-hydroxyquinoline)aluminum (Alq3). For doped OLEFETs, 4-(dicyanomethylene)-2-methyl-6-(p-dimethylaminostyryl)-4H-pyran (DCM) was used as a highly fluorescent dye dopant to enhance the light-emission efficiency and change the emission color. OLEFETs revealed fine device characteristics based on deposition of highly crystalline active layers. The combination of the highly fluorescent DCM doping and asymmetric electrode configuration (Au and Li:Al or LiF/Al) exhibited efficient energy transfer and enhanced electroluminescence (EL) emission. The operating light-emission mechanisms were discussed based on EL photos acquired using a charge-coupled device (CCD) camera.

Hybrid flexible ambipolar thin-film transistors based on pentacene and ZnO capable of low-voltage operation

A flexible ambipolar thin-film transistor (TFT) was developed that consisted of a pentacene layer and a ZnO layer modified with a dodecanoic acid self-assembled monolayer on a flexible polyarylate substrate. The TFT exhibited balanced hole and electron mobilities of 0.3 and 0.2cm2 V−1 s−1 and showed flexible thin-film characteristics. Additionally, because the anodized Al2O3 dielectric layer is a high κ material compared with a normal SiO2 dielectric layer, the flexible ambipolar TFT was able to operate at a low voltage of 5V.

Understanding the dependence of the ohmic drain-source leakage current on gold deposition rate in top-contact pentacene-based thin film transistors

We studied the influence of the gold deposition rate on the drain-source leakage current of top-contact pentacene-based thin film transistors (TFTs) with different channel lengths. It is demonstrated that the anomalous leakage current which occurs only in short-channel TFTs monotonically increases with increasing the gold deposition rate. For TFTs with channel length of 30μm, we also investigated the dependence of the drain-source leakage current on the pentacene grain size as well as the gold deposition rate. It is shown that the pentacene grain size influences the leakage current only in the case if high gold deposition rate is employed, whereas the anomalous leakage current can be avoided by reducing the gold deposition rate. Finally, due to the observed ohmic character of the anomalous leakage current, we propose that the origin of the current can be attributed to parasitic leakage paths on the surface of the pentacene layers formed by the lateral diffusion of gold clusters from drain/source edges into the channel region during gold deposition. Based on this hypothesis, the observed dependence of the anomalous leakage current on the gold deposition rate can be well explained.

Influence of Pentacene Interface Layer in ITO/α-NPD/Alq3/Al Organic Light Emitting Diodes by Time-Resolved Electric-Field-Induced Optical Second-Harmonic Generation Measurement.

By using I-V, EL-V, displacement current measurement (DCM) and time-resolved electric-field-induced optical second-harmonic generation (TR-EFISHG) measurement, we studied the influence of interface pentacene layer inserted between ITO and a-NPD layers in ITO/α-NPD/Alq3/Al OLEDs. All experiments were carried out for the OLEDs with and without a pentacene interface layer. The I-V and EL-V measurements showed the decrease of operating voltage of EL, the DCM showed the lowering of inception voltage of carrier injection by inserting a pentacene interface layer. The TR-EFISHG measurement showed the faster accumulation of holes at the interface between the a-NPD and Alq3 layers, which resulted in the relaxation of electric field of a-NPD layer accomplished by the increase of the conductivity and the increase of the electric field in the Alq3 layer. We conclude that TR-EFISHG measurement is helpful for understanding I-V and EL-V characteristics, and can be combined with other methods to give significant information which are impacted by the interface layer.

Investigation of Ultraviolet Light Curable Polysilsesquioxane Gate Dielectric Layers for Pentacene Thin Film Transistors.

Polysilsesquioxane (PSQ) comprising 3-methacryloxypropyl groups was investigated as an ultraviolet (UV)-light curable gate dielectric-material for pentacene thin film transistors (TFTs). The surface of UV-light cured PSQ films was smoother than that of thermally cured ones, and the pentacene layers deposited on the UV-Iight cured PSQ films consisted of larger grains. However, carrier mobility of the TFTs using the UV-light cured PSQ films was lower than that of the TFTs using the thermally cured ones. It was shown that the cross-linker molecules, which were only added to the UV-light cured PSQ films, worked as a major mobility-limiting factor for the TFTs.

Enhancement of grain size and crystallinity of thin layers of pentacene grown under magnetic field

Field-effect mobilities (μ) of pentacene films, prepared by a thermal deposition under a magnetic field (H-field), were largely enhanced, in comparison with that prepared without an H-field. Under a perpendicular H-field with respect to the substrate surface, the crystallinity of the edge-on pentacene orientation is enhanced, resulting in the 9-fold enhancement of μ. Furthermore, under parallel H-field with respect to the substrate surface, μ of the pentacene films were 23-fold greater than that prepared without the H-field. The surface morphology studies by atomic force microscopy of the ultra thin films of pentacene clarified that the grain size of the pentacene at the interface with the substrate is larger for films under parallel H-field than that prepared without an H-field. The simple and effective method for enhancing the semiconducting properties of the organic thin films gives high technological impact in its application to organic electronics.

A simple process based on NH2- and CH3-terminated monolayers for low contact resistance and adherent Au electrode in bottom-contact OTFTs

An efficient process for the low contact resistance and adherent source/drain Au electrode in bottom-contact organic thin film transistors (OTFTs) was developed. This was achieved by using two different surface-functional groups of self-assembled monolayers, 3-aminopropyltriethoxysilane (APS), and octadecyltrichlorosilane (OTS), combined with atmospheric-pressure (AP) plasma treatment. Prior to the deposition of Au electrode, the aminoterminated monolayer self-assembles on SiO2 dielectrics, enhancing the adhesion of Au electrode as a result of the acid-base interaction of Au with the amino-terminal groups. AP plasma treatment of the patterned Au electrode on the APS-coated surface activates the entire surface to form an OTS monolayer, allowing the formation of a high quality pentacene layer on both the electrode and active region by evaporation. In addition, negligible damage by AP plasma was observed for the device performance. The fabricated OTFTs based on the two monolayers by AP plasma treatment showed the mobility of 0.23 cm2/Vs, contact resistance of 29 kΩ-cm, threshold voltage of −1.63 V, and on/off ratio of 9.8 × 105, demonstrating the application of the simple process for robust and high-performance OTFTs.

Observation of electric potential in organic thin-film transistor by bias-applied hard X-ray photoemission spectroscopy

The effect of gate voltage on electric potential in a pentacene (PEN) layer was studied by hard X-ray photoelectron spectroscopy under a bias voltage. It was observed that applying a negative gate voltage substantially increases the width of a C 1s peak. This suggested that injected and accumulated carriers in an organic thin film transistor channel modified the potential depth profile in PEN. It was also observed that the C 1s kinetic energy tends to increase monotonically with threshold voltage.

Effects of Molecular Orientation in Acceptor–Donor Interfaces between Pentacene and C60 and Diels–Alder Adduct Formation at the Molecular Interface

Interfaces between pentacene and Buckminster‐fullerene (C60) have attracted interest due to their application as oligomeric model system for organic solar cells. As the actual device characteristics in such implementations are crucially controlled by the interface structure, detailed investigations of this interface on a molecular level are mandatory. In this study, the influence of the orientation of the pentacene molecules in highly ordered crystalline bottom layers on the characteristics of such internal interfaces is analyzed. It has been shown that the interface structure is driven by temperature‐controlled diffusion of C60 molecules to the pentacene step edges in the case of uprightly oriented pentacene. For lying pentacene in the bottom layer, no step‐edge decoration is observed while the wetting of the pentacene layer is enhanced. Furthermore, the stability of the interface against intercalation and reorientation has been analyzed by means of NEXAFS spectroscopy, showing that the orientation of the pentacene molecules at the interface remains unchanged. Instead, strong indication for chemical modification of the molecular entities by the formation of Diels–Alder adducts between C60 and pentacene is observed. Finally, it is shown that C60 forms crystalline islands in thicker films only on top of uprightly oriented pentacene while rather amorphous films are formed on lying pentacene.

Improvement of on/off ratio in organic field-effect transistor with carrier generation layer using oblique deposition

Improvement of the on/off ratio in carrier-generation type organic field-effect transistors with pentacene and MoO3 layers was attempted using oblique deposition. A MoO3 layer was formed only between the gold (Au) source and the drain electrodes, and devices with a MoO3 layer evaporated under various deposition angles were fabricated. A formation of a MoO3-free area is expected adjacent to the source or drain electrode by the oblique deposition. The off-current in the device decreased and the on/off ratio was increased with increasing deposition angle, and we achieved a fabricating device with a MoO3 layer having high on/off ratio, almost the same as that of the device without the MoO3 layer. From those results, we deduced that charge-transfer (CT) complexes at the pentacene/MoO3 interface formed a high-conductive path for the off-current, and the off-current was reduced by the formation of a highly-resistive MoO3-free area between electrodes. Therefore, controlling the CT complex layer formation by patterning the MoO3 layer can reduce the amount of off-current and improve the on/off ratio.

Electrical Instability in Pentacene Transistors with Mylar and PMMA/Mylar Gate Dielectrics Transferred by Lamination Process

This study deals with electrical instability under bias stress in pentacene-based transistors with gate dielectrics deposited by a lamination process. Mylar film is laminated onto a polyethylene terephthalate (PET) substrate, on which aluminum (Al) gate is deposited, followed by evaporation of organic semiconductor and gold (Au) source/drain contacts in bottom gate top contact configuration (Device 1). In order to compare the influence of the semiconductor/dielectric interface, a second organic transistor (Device 2) which is different from the Device 1 by the deposition of an intermediate layer of polymethyl methacrylate (PMMA) onto the laminated Mylar dielectric and before evaporating pentacene layer is fabricated. The critical device parameters such as threshold voltage (VT), subthreshold slope (S), mobility (μ), onset voltage (Von) and Ion/Ioff ratio have been studied. The results showed that the recorded hysteresis depend on the pentacene morphology. Moreover, after bias stress application, the electrical parameters are highly modified for both devices according to the regimes in which the transistors are operating. In ON state regime, Device 1 showed a pronounced threshold voltage shift associated to charge trapping, while keeping the μ, Ioff current and S minimally affected. Regardless of whether Device 2 exhibited better electrical performances and stability in ON state, we observed a bias stress-induced increase of depletion current and subthreshold slope in subthreshold region, a sign of defect creation. Both devices showed onset voltage shift in opposite direction.

Characterization of effective conductive layer of nano organic thin film using reflectance spectroscopy

We propose an optical approach for analyzing the formation of the conductive layer during organic thin film growth. The relationship between the properties of multi-layer film, such as thickness and optical coefficients, and the corresponding differential reflectance spectrum (DRS) is derived as math formula based on the effective medium approximation. With the deduced formula, the thickness of the deposited film, for example, electron transport layer in this paper, can be estimated according to the measured DRS data. But, in fact, the fitting error always exists. It is, on the other hand, a useful evidence to indicate the actual situation of the thin film. A concept of the normalized fitting error (NFE) is offered here to equivalently assess the fitting results of all DRS data in the growth process. The curve of NFE versus time is proposed to analyze the growth revolution of the thin film and reveal the inner physical mechanism. In order to demonstrate the performance of the proposed method, an organic field effect transistor (OFET) with a bottom-gate structure is fabricated and pentacene organic thin film is deposited by vacuum thermal evaporation, as an electron transport layer, on the top of the transistor, i. e., an insulator substrate of Si/SiO2. The reflected optical spectrum and the current between the drain and the source of the OFET device are investigated in real time in the growth process. It has been reported that pentacene has three kinds of crystal structures and their optical properties differ from each other. The actual phase of the pentacene film in our experiment is discussed at first. The fitting results show that the pentacene layer exists mainly in thin film phase here. Then, the thickness of SiO2 layer is determined to be 296 nm, which is close to the design value of 300 nm. With those parameters, a four-layer model is used to calculate the thickness of the organic film. The thickness data indicate that the film appears to be linearly growing and the growth rate is 0.2 nm/min. Next, the NFE is plot as a function of time. In this plot, the curve of the NFE increases quickly at the beginning of the growth and reaches to a positive peak at 70 min. After that, the NFE decreases and then keeps constant for a while. When the measured current-time curve is added into this plot, one finds that the increase of the current happens at the same time with the peak of the NFE. It implies that the NFE is related to the structure change of the organic film and thus linked indirectly to the electronic property. The peak of the NFE, to a certain extent, reveals the completeness of the organic conductive layer. As a result, the presented optical approach is valuable for analyzing the electronic status of the organic thin film, especially if the electronic test cannot be performed.