Peak Photon Detection Probability Research Articles

LinoSPAD2: an FPGA-based, hardware-reconfigurable 512×1 single-photon camera system.

We report on LinoSPAD2, a single-photon camera system, comprising a 512×1 single-photon avalanche diode (SPAD) front-end and one or two FPGA-based back-ends. Digital signals generated by the SPADs are processed by the FPGA in real time, whereas the FPGA offers full reconfigurability at a very high level of granularity both in time and space domains. The LinoSPAD2 camera system can process 512 SPADs simultaneously through 256 channels, duplicated on each FPGA-based back-end, with a bank of 64 time-to-digital converters (TDCs) operating at 133 MSa/s, whereas each TDC has a time resolution of 20 ps (LSB). To the best of our knowledge, LinoSPAD2 is the first fully reconfigurable SPAD camera system of large format. The SPAD front-end features a pitch of 26.2 μm, a native fill factor of 25.1%, and a microlens array achieving 2.3× concentration factor. At room temperature, the median dark count rate (DCR) is 80 cps at 7 V excess bias, the peak photon detection probability (PDP) is 53% at 520 nm wavelength, and the single-photon timing resolution (SPTR) is 50 ps FWHM. The instrument response function (IRF) is around 100 ps FWHM at system level. The LinoSPAD2 camera system is suitable for numerous applications, including LiDAR imaging, heralded spectroscopy, compressive Raman sensing, and other computational imaging techniques.

Performance of Active-Quenching SPAD Array Based on the Tri-State Gates of FPGA and Packaged with Bare Chip Stacking.

The performance of an active-quenching single-photon avalanche diode (SPAD) array that is based on the tri-state gates of a field programmable gate array (FPGA) is presented. The array is implemented by stacking a bare 4 × 4 N-on-P SPAD array on a bare FPGA die, and the electrodes of the SPAD pixels and the I/O ports of the FPGA are connected through wire bonding within the same package. The active quenching action on each SPAD pixel is performed by using the properties of the tri-state gates of the FPGA. Digital signal processing, such as pulse counters, data encoders, and command interactions, is also performed by using the same FPGA. The breakdown voltage of the SPAD pixels, with an active area of 60 μm × 60 μm, is 47.2-48.0 V. When the device is reverse biased at a voltage of ~50.4 V, a response delay of ~50 ns, a dead time of 157 ns, a dark count rate of 2.44 kHz, and an afterpulsing probability of 6.9% are obtained. Its peak photon detection probability (PDP) reaches 17.0% at a peak wavelength of 760 nm and remains above 10% at 900 nm. This hybrid integrated SPAD array is reconfigurable and cost effective.

Single-photon avalanche diode fabricated in standard 55 nm bipolar-CMOS-DMOS technology with sub-20 V breakdown voltage.

This paper presents a single-photon avalanche diode (SPAD) in 55 nm bipolar-CMOS-DMOS (BCD) technology. In order to realize a SPAD having sub-20 V breakdown voltage for mobile applications while preventing high tunneling noise, a high-voltage N-well available in BCD is utilized to implement the avalanche multiplication region. The resulting SPAD has a breakdown voltage of 18.4 V while achieving an excellent dark count rate of 4.4 cps/µm2 at the excess bias voltage of 7 V in spite of the advanced technology node. At the same time, the device achieves a high peak photon detection probability (PDP) of 70.1% at 450 nm thanks to the high and uniform E-field. Its PDP values at 850 and 940 nm, wavelengths of interest for 3D ranging applications reach 7.2 and 3.1%, respectively, with the use of deep N-well. The timing jitter of the SPAD, full width at half maximum (FWHM), is 91 ps at 850 nm. It is expected that the presented SPAD enables cost-effective time-of-flight and LiDAR sensors with the advanced standard technology for many mobile applications.

A Multi-Time-Gated SPAD Array with Integrated Coarse TDCs

Time-gating of single-photon avalanche diodes (SPADs) was commonly used as a method to reduce dark noise in biomedical imaging applications where photon events are correlated with a reference clock. Time-gating was also used to obtain timing information of photon events by shifting the gate windows applied to a SPAD array. However, in this approach, fine timing resolution comes at the cost of a lengthened measurement time due to the large number of counts required for each shift. As a solution, we present a multi-time-gated SPAD array that simultaneously applies shifted gate windows to an array of SPADs, which has the potential to reduce the measurement time compared to a single time gate window. Compared to similar works, this design has fully integrated the multi-gate generation using shared circuitry which also functions as a coarse time-to-digital converter. The proposed array, fabricated in the TSMC 65 nm standard CMOS process, achieved a median dark count rate (DCR) of 37 kHz, 4.37 ns gate widths, 550 ps timing resolution, and a peak photon detection probability (PDP) of 42.9% at 420 nm, all at a 0.8 V excess bias.

An Ultra-Thin Ultraviolet Enhanced Backside-Illuminated Single-Photon Avalanche Diode With 650 nm-Thin Silicon Body Based on SOI Technology

We present the world's thinnest backside illuminated (BSI) single-photon avalanche diode (SPAD) with a silicon (Si) thickness of 650 nm fabricated in complementary metal-oxide-semiconductor (CMOS) compatible silicon-on-insulator (SOI) technology. The well-optimized doping profile is exploited in this square-shaped BSI SPAD with ultrathin Si body consisting of n^{++}/p-well and n-well guard ring (GR) to outstandingly improve detection efficiency in ultraviolet (UV) spectral range. This BSI SPAD exhibits a low leakage current (≈0.1pA) and a low breakdown voltage (8.5V) at room temperature (RT). A low dark count rate (DCR) of 156.8cps/μm² at 3V excess bias is estimated at RT. A peak quantum efficiency (QE) of 96.41% is also measured under a wavelength of 423 nm at 4V. This BSI SPAD indicates a peak photon detection probability (PDP) of 69.51% upon a wavelength of 423 nm at 3V excess bias. A significant expansion of the UV sensitivity down to a wavelength of 291 nm is represented with a PDP of 15.56% at 3V excess bias. To the best of our knowledge, the detection efficiency of this ultrathin BSI SPAD in the UV wavelength regime down to 291 nm is the best result ever reported for Si-based BSI SPAD in spite of the absence of an integrated CMOS circuitry.

A Low-Noise CMOS SPAD Pixel With 12.1 Ps SPTR and 3 Ns Dead Time

Single-photon avalanche diodes (SPADs) have become the sensor of choice in many applications whenever high sensitivity, low noise, and sharp timing performance are required, simultaneously. Recently, SPADs designed in CMOS technology, have yielded moderately good performance in these parameters, but never equaling their counterparts fabricated in highly customized, non-standard technologies. The arguments in favor of CMOS-compatible SPADs were miniaturization, cost and scalability. In this paper, we present the first CMOS SPAD with performance comparable or better than that of the best custom SPADs, to date. The SPAD-based design, fully integrated in 180 nm CMOS technology, achieves a peak photon detection probability (PDP) of 55&#x0025; at 480 nm with a very broad spectrum spanning from near ultraviolet (NUV) to near infrared (NIR) and a normalized dark count rate (DCR) of 0.2 cps/<inline-formula><tex-math notation="LaTeX">$\mu$</tex-math></inline-formula>m<inline-formula><tex-math notation="LaTeX">$^2$</tex-math></inline-formula>, both at 6 V of excess bias. Thanks to a dedicated CMOS pixel circuit front-end, an afterpulsing probability of about 0.1&#x0025; at a dead time of <inline-formula><tex-math notation="LaTeX">$\sim$</tex-math></inline-formula>3 ns were achieved. We designed three SPADs with a diameter of 25, 50, and 100 <inline-formula><tex-math notation="LaTeX">$\mu$</tex-math></inline-formula>m to study the impact of size on the timing jitter and to create a scaling law for SPADs. For these SPADs, a single-photon time resolution (SPTR) of 12.1 ps, 16 ps, and 27 ps (FWHM) was achieved at 6 V of excess bias, respectively. The SPADs operate in a wide range of temperatures, from &#x2212;65 <inline-formula><tex-math notation="LaTeX">$^{\circ }$</tex-math></inline-formula>C to 40 <inline-formula><tex-math notation="LaTeX">$^{\circ }$</tex-math></inline-formula>C, reaching a normalized DCR of 1.6 mcps/<inline-formula><tex-math notation="LaTeX">$\mu$</tex-math></inline-formula>m<inline-formula><tex-math notation="LaTeX">$^2$</tex-math></inline-formula> at 6 V of excess bias for the 25 <inline-formula><tex-math notation="LaTeX">$\mu$</tex-math></inline-formula>m at &#x2212;65 <inline-formula><tex-math notation="LaTeX">$^{\circ }$</tex-math></inline-formula>C. The proposed SPADs are ideal for a wide range of applications, including (quantum) LiDAR, super-resolution microscopy, quantum random number generators, quantum key distribution, fluorescence lifetime imaging, time-resolved Raman spectroscopy, to name a few. All these applications can take advantage of the vastly improved performance of our detectors, while enjoying the opportunities of megapixel resolutions promised by the economy of scale that is offered by CMOS technologies.

Design and Analysis of a Photon Counting System Using Covered Single-Photon Avalanche Photodiode

A photon counting system using covered single-photon avalanche diode (SPAD) based on a standard integrated circuit (IC) process ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.18~\mu \text{m}$ </tex-math></inline-formula> ) is designed and analyzed in this work. The SPAD is formed using the medium voltage (MV) doping layers of the process. To reduce the dark count rate (DCR) in the SPAD, a shaded SPAD with the same structure is fabricated on the same chip which is covered by a metal layer and only providing DCR for the DCR correction. This DCR provided by the shaded SPAD can also be used for the real time on chip monitoring of some other parameters, such as temperature, breakdown voltage, and afterpulsing probability. Experimental results show that the SPAD developed is able to detect the visible light from 450 to 850 nm with a 35% peak photon detection probability (PDP) achieved at around 550 nm with a bias voltage of 16 V (excess voltage of 3 V). A timing jitter of 176 ps is measured with an excess voltage of 3 V. The DCR in the SPAD tested is about 1.38 cps/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}^{2}$ </tex-math></inline-formula> with an excess bias voltage of 1 V and 14.62 cps/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}^{2}$ </tex-math></inline-formula> with the excess bias voltage of 3 V without the DCR correction. Results also show that a reduction of more than 85% in the DCR (background noise) can be achieved when the DCR correction is applied resulting in a DCR of 1.68 cps/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}^{2}$ </tex-math></inline-formula> with an excess bias voltage of 3 V. By monitoring the DCR of the shaded SPAD, the breakdown voltage and temperature of other on chip SPAD can be measured. The potential usefulness of the afterpulsing probability monitoring using the shaded SPAD and the crosstalk probability (CTP) between SPADs on the chip are analyzed. In addition, the effects of process variations on the SPAD performance are investigated by testing ten chips with the same SPADs fabricated, and a potential method is proposed for alleviate the process variations in the SPAD arrays.

High-Speed Active Quench and Reset Circuit for SPAD in a Standard 65 nm CMOS Technology

A compact high-speed active quench and reset (AQR) circuit integrated with a p <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> /n-well single-photon avalanche diode (SPAD) is designed and fabricated in a standard 65 nm CMOS technology. The post-layout simulations showed that the quenching time for this AQR circuit is only 0.1 ns, and the smallest dead time is 3.35 ns which corresponds a maximum count rate of ~300 Mcps. The measurements showed that the SPAD pixel achieved a dark count rate of 21 kHz, a peak photon detection probability of 23.8% at a 420 nm wavelength and a timing jitter of 139 ps (using a 405 nm pulsed laser) when the excess voltage was 0.5 V. Also, due to the short quenching time, negligible afterpulsing was observed during the measurements.

High Slew-Rate Quadruple-Voltage Mixed-Quenching Active-Resetting Circuit for SPADs in 0.35-μm CMOS for Increasing PDP

An optical sensor IC in 0.35- $\mu \text{m}$ CMOS is presented containing a single-photon avalanche diode (SPAD) and a fast quadruple-voltage quenching circuit (QVQC). The QVQC features a fast active quenching time of 0.93 ns, a total quenching time of 1.9 ns, and an adjustable total dead time (8.6–200 ns) to reduce the afterpulsing probability (APP). To verify the quenching performance, the circuit was integrated with a 40- $\mu \text{m}$ diameter SPAD. Experiments show the reduction of afterpulsing by a low detection threshold and by fast quenching with a slew rate of 13.8 GV/s. Thus, an APP of 3.2% at 27-ns dead time, a peak photon detection probability (PDP) of 67.6% at 652 nm, and a PDP of 34.7% at 854 nm were measured at 13.2-V excess bias.

Dynamic range extension for photon counting arrays.

Confocal microscopes use photomultiplier tubes and hybrid detectors due to their large dynamic range, which typically exceeds the one of single-photon avalanche diodes (SPADs). The latter, due to their photon counting operation, are usually limited to an output count rate to 1/Tdead. In this paper, we present a thorough analysis, which can actually be applied to any photon counting detector, on how to extend the SPAD dynamic range by exploiting the nonlinear photon response at high count rates and for different recharge mechanisms. We applied passive, active event-driven and clock-driven (i.e. clocked, following quanta image sensor response) recharge directly to the SPADs. The photon response, photon count standard deviation, signal-to-noise ratio and dynamic range were measured and compared to models. Measurements were performed with a CMOS SPAD array targeted for image scanning microscopy, featuring best-in-class 11 V excess bias, 55% peak photon detection probability at 520 nm and >40% from 440 to 640 nm. The array features an extremely low median dark count rate below 0.05 cps/μm2 at 9 V of excess bias and 0°C. We show that active event-driven recharge provides ×75 dynamic range extension and offers novel ways for high dynamic range imaging. When compared to the clock-driven recharge and the quanta image sensor approach, the dynamic range is extended by a factor of ×12.7-26.4. Additionally, for the first time, we evaluate the influence of clock-driven recharge on the SPAD afterpulsing.

A Flexible Ultrathin-Body Single-Photon Avalanche Diode With Dual-Side Illumination

The world's first flexible ultrathin-body dual-side illumination single-photon avalanche diode (SPAD) is reported with a peak photon detection probability of 11% in frontside-illumination (FSI) and 6% in backside-illumination modes, a dark count rate of 20 kHz and negligible afterpulsing and crosstalk. Compared with mainstream CMOS FSI SPAD, this device can be bent around a 10-mm-diameter cylinder and it is indicated in biomedical monitoring, implantable, and edible applications, as well as in antivignetting image sensors, bioinspired composite-eye, or flexible multiaperture cameras, and wherever the sensor plane must follow a certain curvature.