Passive Switching Research Articles

A low power passive-active ΔΣ modulator with high-resolution employing an integrator with open-loop unity-gain buffer

This paper presents a new passive-active ΔΣ modulator with high-resolution and low-power applications. An open-loop unity gain buffer is used to improve the performance of a passive switch capacitor integrator. Since this technique compensates phase and gain errors, there is no need for large capacitors, which result in a great reduction in the chip footprint. The first filter is passive, so the output swing of the amplifier is small but large enough to guarantee the linearity and a relaxed slew rate in the modulator structure, which leads to the low power. Using the second-order modulator with an adequate oversampling ratio leads to the desired SNR. The post-layout simulation of the second-order passive-active modulator is performed in Spectre/Cadence electrical simulator using TSMC 0.18 CMOS model in the standard 0.18 μm CMOS process. The dynamic range of 92.4 dB, peak signal to noise ratio of 88.6 dB, peak signal to noise plus distortions of 82.7 dB were achieved while consuming 1.93 μw in a 500 Hz signal bandwidth at 1.5 V supply, giving a FoMWalden of 0.173 pJ/ conv-step and the FoMSchreier is 176.53 dB.

A 0.7–7 GHz wideband reconfigurable receiver RF front-end in CMOS

A 0.7–7 GHz wideband RF receiver front-end SoC is designed using the CMOS process. The front-end is composed of two main blocks: a single-ended wideband low noise amplifier (LNA) and an in-phase/quadrature (I/Q) voltage-driven passive mixer with IF amplifiers. Based on a self-biased resistive negative feedback topology, the LNA adopts shunt-peaking inductors and a gate inductor to boost the bandwidth. The passive down-conversion mixer includes two parts: passive switches and IF amplifiers. The measurement results show that the front-end works well at different LO frequencies, and this chip is reconfigurable among 0.7 to 7 GHz by tuning the LO frequency. The measured results under 2.5-GHz LO frequency show that the front-end SoC achieves a maximum conversion gain of 26 dB, a minimum noise figure (NF) of 3.2 dB, with an IF bandwidth of greater than 500 MHz. The chip area is 1.67 × 1.08 mm2.

A Fluorescence Spectrum Analyzer Based on a Fiber-Optic Y-Circulator

We consider a method of probe analysis employing fiber-optic a composite Y-circulator design for the implementation of laser-induced fluorescence (LIF) spectroscopy diagnostics. The proposed principle of the LIF analyzer is based on spatially separated directed optical beams of excitation and fluorescence radiations. Conditions of the effective Y-circulator operation as a passive fiber-optic switch are determined. Experimental investigation of the switched radiation losses is performed. An example of using the proposed analyzer for LIF diagnostics of biological media is presented.

Design Approach of Non-Isolated Converters with Passive Soft Switching

Design Approach of Non-Isolated Converters with Passive Soft Switching

High-Efficiency High Step-Up DC–DC Converter With Dual Coupled Inductors for Grid-Connected Photovoltaic Systems

This paper introduces a non-isolated high step-up dc–dc converter with dual coupled inductors suitable for distributed generation applications. By implementing an input parallel connection, the proposed dc–dc structure inherits shared input current with low ripple, which also requires small capacitive filter at its input. Moreover, this topology can reach high voltage gain by using dual coupled inductors in series connection at the output stage. The proposed converter uses active clamp circuits with a shared clamp capacitor for the main switches. In addition to the active clamp circuit, the leakage energy is recycled to the output by using an integrated regenerative snubber. Indeed, these circuits allow soft-switching conditions, i.e., zero voltage switching and zero current switching for active and passive switching devices, respectively. The mentioned features along with a common ground connection of the input and output make the proposed topology a proper candidate for transformer-less grid-connected photovoltaic systems. The operating performance, analysis and mathematical derivations of the proposed dc–dc converter have been demonstrated in the paper. Moreover, the main features of the proposed converter have been verified through experimental results of a 1-kW laboratory prototype.

An Active Diode Full-Wave Charge Pump for Low Acceleration Infrastructure-Based Non-Periodic Vibration Energy Harvesting

An active diode IC-based full-wave charge pump is presented. It interfaces to a vibration harvester designed for low acceleration non-periodic bridge vibrations. The charge pump’s unique architecture uses only two comparators to switch the charge pump’s eight stages. This architecture reduces power and allows for a novel passive diode switching technique that also enables a reduction in the turn-on voltage. This switching technique initially functions based only on the AC input without a DC supply. This architecture is used to enable cold start-up using the charge pump’s external $100~{\mu }\text{F}$ capacitors. These large capacitors create a stable power supply for start-up from one low voltage AC input based off of bridge vibrations that are random and infrequent. Its rectification circuitry is fabricated in 180 nm CMOS on a 1.2 mm2 die. The circuit inputs, generated using a shaker table, are periodic sine-waves or non-periodic mechanical frequency up-converted vibration harvester outputs. Measurements show that the diode drop reduction allows cold start-up and boosting to >1.5 V with low power ( $\sim 8.5~{\mu }\text{W}$ ) non-periodic harvester outputs or 220 mV open circuit voltage periodic (~100 Hz) inputs. This IC demonstrates ~50% efficiency with an up-conversion-based harvester and ${\sim } 1~{\mu }\text{W}$ active power dissipation.

Design of 0.35–1.5 GHz 16‐input and 8‐output switch matrix with 5 × 5 chessboard structure

This Letter presents a 0.35–1.5 GHz 5 × 5 switch matrix chip with a chessboard structure. In the proposed structure, by reassigning the position and switch mode of 25 passive switch grids which almost consume no DC power, the switch matrix can choose and transmit any eight of 16 input signals to the output ports on four directions at the same time. Throughput and the expansion ability of the switch matrix are markedly improved by flexibly choosing a signal path and reusing the switch grids. Besides, wideband gain compensation circuit modules and gain equalisers are used to compensate for insertion loss and gain flatness of the switch matrix. Fabricated by 0.18 μm SiGe BiCMOS technology, the measured highest insertion gain of a signal path is 10 dB. Meanwhile, insertion gains of all signal paths are higher than −6 dB, and isolations of all signal paths are better than 40 dB.

无源MEMS压力开关的设计与制备

无源MEMS压力开关的设计与制备

Double Integral Sliding Mode Control of Continuous Gain Four Quadrant Quasi-Z-Source Converter

A constant frequency double-integral sliding mode controller (DISMC) is proposed for the regulation of a four-quadrant continuous gain dc–dc converter based on quasi- $Z$ -source (ZS) topology. No controller has yet been proposed for the control of this particular converter in the literature so far. Four-quadrant converters based on hybrid ZS networks or coupled inductors have been proposed in the past, but this converter is unique in the sense that it uses minimum number of passive devices and active switches to provide bidirectional current and bipolar output voltage. This makes the converter preferable to use in renewable energy or motor drive applications that require a four-quadrant operation. The proposed controller eliminates steady-state errors and provides robust control in the face of large input voltage or load variations. It enables the converter to provide a fast dynamical response over a wide operating range. Simulations of the proposed controller have been performed in MATLAB/Simulink, where the results of DISMC have also been compared with those of single integral sliding mode control.

Анализатор спектра флуоресценции на основе оптоволоконного Y-циркулятора

AbstractWe consider a method of probe analysis employing fiber-optic a composite Y-circulator design for the implementation of laser-induced fluorescence (LIF) spectroscopy diagnostics. The proposed principle of the LIF analyzer is based on spatially separated directed optical beams of excitation and fluorescence radiations. Conditions of the effective Y-circulator operation as a passive fiber-optic switch are determined. Experimental investigation of the switched radiation losses is performed. An example of using the proposed analyzer for LIF diagnostics of biological media is presented.

Modeling and Analysis of Passive Switching Crossbar Arrays

Emerging technologies have enabled efficient, high-speed realizations of ultra-dense crossbar arrays, driving the need for better insight in the transient operation of such systems. Previous work focused mostly on the effect of line resistance and its impact on steady-state response. In this paper, we develop a compact $RC$ framework that includes the effects of parasitics. We use memristors as an exemplar device where interconnect parasitics (resistance, inductance, capacitance, and conductance) are extracted using ANSYS Q3D extractor for 5- and 50- $nm$ feature sizes. A model for the crossbar is presented, considering the stray and coupling capacitive parasitics of the crossbar. The derived model is based on state-space representation and provides more insight into the behavior of crossbar arrays containing either linear or nonlinear switching devices. The framework provides a closed-form solution to evaluate Elmore delay, as well as the steady-state response of the system. Signal delay is evaluated and compared for both grounded and floating interconnect inputs and verified against HSPICE, showing a perfect match.

Nafion-Based Fully Passive Solid-State Conductive Bridging RF Switch

This letter reports the design and development of a conductive bridging RF switch with simple fabrication steps without the use of any clean room technologies. The reported device is a fully passive shunt mode RF switch on a co-planar waveguide transmission line, which operates in the dc-3GHz range. This particular topology is chosen in contemplation to limitations imposed by the chosen realization process. The device is based on a metal-insulator (electrolyte)-metal structure, with copper- Nafion-aluminum switching layers. S 21 switching between -1 dB (RF-ON) and -16 dB (RF-OFF) is demonstrated till 3 GHz by the device. Dc pulses in the range between 18 V/0.5 mA and -20 V/0.1 A are used, respectively, to SET and RESET the switch, and the instantaneous power consumed for SET and RESET is, respectively, 1.7 μW and 3 mW. The SET and RESET state dc resistances of the switch are observed as 2 Ω and 2 MΩ subsequently. The model is initially simulated using commercial finite element method-based electromagnetic modeling tool and validated experimentally.

Control Strategy of a Quadratic Boost Converter With Voltage Multiplier Cell for High-Voltage Gain

The need of dc–dc switching converters for power supplies with high-voltage gains has increased in the recent years due to new applications in areas as renewable energy systems, transportation, industrial, medical, and others. A quadratic boost converter is a useful topology to obtain a step-up output voltage; however, a major drawback is the presence of a higher voltage stress over the active and passive switches. In this paper, a quadratic boost converter is combined with a voltage multiplier cell and an output filter to offer a high-voltage gain converter with nonpulsating input and output currents. The expressions for the capacitor voltages and inductor currents are given, as well as the corresponding ripples that allow the proper design of the converter. The bilinear switched, nonlinear averaged and linear averaged models are derived such that the dynamical behavior of the converter is analyzed and used to design a control strategy. A step-by-step procedure is given to tune up a current-mode controller. Experimental results are shown from a prototype, which delivers an output voltage of 220 V and an output power of 300 W. Step load changes between 20% and full load are applied to exhibit the robustness of switching regulator.

Passive Gas-Gap Heat Switches for use in Low-Temperature Cryogenic Systems

We present the current state of development in passive gas-gap heat switches. This type of switch does not require a separate heater to activate heat transfer but, instead, relies upon the warming of one end due to an intrinsic step in a thermodynamic cycle to raise a getter above a threshold temperature. Above this temperature sequestered gas is released to couple both sides of the switch. This enhances the thermodynamic efficiency of the system and reduces the complexity of the control system. Various gas mixtures and getter configurations will be presented.

Black phosphorus ink formulation for inkjet printing of optoelectronics and photonics

Black phosphorus is a two-dimensional material of great interest, in part because of its high carrier mobility and thickness dependent direct bandgap. However, its instability under ambient conditions limits material deposition options for device fabrication. Here we show a black phosphorus ink that can be reliably inkjet printed, enabling scalable development of optoelectronic and photonic devices. Our binder-free ink suppresses coffee ring formation through induced recirculating Marangoni flow, and supports excellent consistency (< 2% variation) and spatial uniformity (< 3.4% variation), without substrate pre-treatment. Due to rapid ink drying (< 10 s at < 60 °C), printing causes minimal oxidation. Following encapsulation, the printed black phosphorus is stable against long-term (> 30 days) oxidation. We demonstrate printed black phosphorus as a passive switch for ultrafast lasers, stable against intense irradiation, and as a visible to near-infrared photodetector with high responsivities. Our work highlights the promise of this material as a functional ink platform for printed devices.

Low-Power Wideband Analog Channelization Filter Bank Using Passive Polyphase-FFT Techniques

Polyphase-FFT (P-FFT) techniques allow for low power implementations of high performance multi-channel filter banks by utilizing computation sharing like a standard fast Fourier transform (FFT). Additionally, it enables a longer “effective window length” than is possible in a standard FFT. This characteristic breaks the trade-off between the main-lobe width and the side-lobe amplitudes in normal finite impulse response filters. Thus, P-FFT techniques have been employed for the channelization of wideband input signals in high speed digital communication receivers. In this paper, we present a prototype analog P-FFT based filter bank in discrete time that is used to channelize wideband input signals so as to reduce the speed and dynamic range requirement of the ADCs. The four-channel I/Q prototype is implemented using TSMC’s 65 nm GP technology. Based on passive switches, the design operates at high speed, consumes low power, and offers high linearity performance. The measured transfer function shows >38 dB side-lobe suppression at 1 GS/s operation. The average measured IIP3 is +25 dBm differential power and the total integrated output noise is 208 $\mu V_{\mathrm{ rms}}$ . The total power consumption for the P-FFT filter bank (eight-channels total) is 34.6 mW (34.6 pJ/conv).

Tantalum Passive Persistence Shunts for On-Chip Current Trapping in Metallic Magnetic Calorimetry

Ultrahigh resolution photon detectors based on metallic magnetic calorimeters (MMCs) employ a weakly magnetized paramagnetic sensor to measure the energy of the absorbed particles. MMCs can require large on-chip magnetizing currents of order ∼100 mA to achieve optimal performance. To minimize noise injected from room-temperature current supplies, it is useful to trap these currents in on-chip persistent superconducting loops. These loops have so far used electrically heated persistent current switches. However, wire count can be reduced and design flexibility increased by using a passive superconducting persistent current switch with a $T_{{\rm{c}}}$ intermediate between $T_{{\rm{c}}}$ of the Nb loop and the operating temperature of the MMC. In addition, it is desirable for the $T_{{\rm{c}}}$ of the switch to be above the regeneration temperature on single-shot adiabatic demagnetization refrigerators (ADRs). We present passive persistent current switch measurements obtained with Ta film grown on a 100 A Nb base layer. We have demonstrated trapping of up to 150 mA with no evidence of flux creep over 20 h, and persistence of 100 mA trapped current through several regeneration cycles of our ADR with a regeneration temperature of ∼2 K.

A Novel High Linear CMOS Fully Integrated PA for the Design of Zigbee Transmitters

This paper describes a 863–870-MHz transmitter for wireless sensor applications. The fully integrated designed circuit is based on AMS 0.35-μm CMOS standard technology. The transmitter presented is composed by four stages: quadrature voltage-controlled ring oscillator (QVCO) controlled by a voltage (VCTRL), two passive switch mixers, two combiners (a substractor and an adder), and a novel high linear power amplifier (PA). Combiners and the PA has the distinction of being based on CMOS inverter circuit. The post-layout simulation of the fully differential transmitter, at the desired oscillation frequency and under a supply voltage of 3.3 V, shows that proposed circuits satisfy specifications desired especially the output power level and PA linearity.

Reduction in Current THD of Grid Parallel Inverters Using Randomized PR Control

In grid connected system, unity power factor current injection into the grid is vital. This can be achieved by choosing the right inverter topology, passive filter components, current controllers, and PWM switching scheme. This paper compares the output current harmonics profile between when using the conventional proportional resonant (PR) current controller and when using the modified PR current controller. By applying the latter technique, via experimental validation using TMS320F2812, the THD of the injected grid current in a parallel connected inverters system is improved.

Influence of locking and passive soft switching on hydraulic circuit efficiency

Throttling and fluid compressibility losses are the major losses which occur during the valve transition in a switched mode hydraulic circuit. To minimize the throttling energy loss, a soft switch concept with lock and release mechanism was introduced by different researchers. In the literature, two different kinds of soft switches, one locking and another passive, were introduced in a hydraulic circuit. Thereafter, experimental validation was reported considering only a locking-type soft switch. But the influence of the passive soft switch on the performance of the hydraulic system was not reported. In this article, how the passive soft switch would affect the system efficiency has been investigated through bond graph model simulation. It has been shown both numerically and experimentally by other researchers that the use of a passive soft switch and a locking mechanism, depending upon configuration, can lead to more than 66.1% reduction in throttling energy loss. In this article, it has been further shown that an additional 3.25% throttling energy is saved when the passive soft switch is discarded from the system and only the locking mechanism is retained. The critical parameters of the locking soft switch have been optimized through multi-run simulation and, thereafter, a relationship between the critical parameters of the locking soft switch and the throttling energy loss of the valve has been obtained by using multiple regression analysis. Also, the variations of energy losses with respect to different valve orifice areas, duty cycles, and pulse width modulation frequencies are investigated through simulation.