The SiC mosfet in the medium-voltage direct-current (MVdc) transportation electrification system features faster switching performance, while simultaneously binging more significant electromagnetic interference (EMI) issues within the rolling stocks, substations, and radiated disturbance into space along the catenaries and tracks. Due to the necessity to involve both the transient characteristics of power semiconductor devices and the stray parameters of all the equipment in the analysis of EMI, it is considerably challenging to perform wideband device-level simulation on traditional commercial software for such a complex system with numerous trains and stations. A computationally efficient method for wideband modeling and simulation of the MVdc high-speed railway system for the assessment of conducted EMI during the project design stage is proposed in this article. Physical characteristics of the semiconductor devices, parasitic parameters of the mosfet package, and converter topology are all taken into consideration to provide not only accurate system-level performance of the system but also an insight into high-frequency characteristics under different operation conditions. The calculation burden is alleviated by a hierarchical circuit partitioning architecture based on the frequency-dependent time-domain transmission line model and the Norton equivalent parameter extraction of each mosfet module to split the whole system into several smaller subcircuits in terms of matrix size, and a fully parallel implementation of the MVdc system is carried out on the graphics processor. The developed program is used to study the case of Jing–Zhang high-speed railway system topology, which is compatible to be modified to the MVdc project. Simulation results show that it is essential to estimate the EMI level comprehensively considering the alternative of speed and dc voltage.