Phase-locked Loop Parameters Research Articles

An improved derivative‐based phase‐locked loop for single‐phase grid synchronization under abnormal grid conditions

SummaryGenerating a quadrature signal in a single‐phase system using a second‐order generalized integrator (SOGI) requires accurate frequency information. The standard SOGI phase‐locked loop (PLL) includes frequency feedback to the SOGI. However, during grid abnormalities such as voltage sag/swell and phase angle jumps, the SOGI‐PLL faces frequency disturbances that propagate to the phase detector (PD) and affects the quadrature signal generator (QSG). Furthermore, the SOGI‐PLL having two loops dependent on each other creates loop coupling phenomena; either a change in phase or frequency affects each other. SOGI‐PLL is tuning sensitive, as the SOGI block has a gain that needs to be adjusted, increases the complexity, and affects the performance of the system. There is a trade‐off between SOGI gain and PLL parameters that needs to be considered for adequate parameter design to provide accurate grid synchronization while maintaining the stability of the system. To attain better performance, researchers have proposed derivative‐based PLL (DPLL). The conventional DPLL faces challenges to noise and harmonics amplification. This paper presents an improved DPLL for single‐phase grid synchronization under adverse grid conditions. The improved derivative‐based PLL (IDPLL) comprises two improved derivative‐based quadrature signal generator (IDQSG) blocks to extract the phase‐error information for accurately estimating phase and frequency. The detailed mathematical modeling and bode plot for the IDQSG and IDPLL are presented. The proposed IDQSG eliminates the requirement of gain tuning, hence reducing complexity. Moreover, there is no interdependent loop in the IDPLL, which significantly improves the dynamic performance. A hardware setup is developed to evaluate the performance of the system in real‐time. The experimental results are obtained using an field programmable gate array (FPGA)‐based controller.

Parameter identification of PLL for grid‐connected inverter based on parameter sensitivity analysis

AbstractUnder the condition of weak grid, the phase‐locked loop (PLL) is one of the main reasons for the sub‐synchronous oscillation of the grid‐connected inverter. Therefore, it is necessary to identify the PLL parameters of the grid‐connected inverter for the analysis of the inverter operating performance. This paper uses the sequence impedance model and measured impedance data of grid‐connected inverter to construct the identification function for parameter identification of PLL, and the function is calculated by particle swarm optimization algorithm to overcome the nonlinear problem of sequence impedance model. In addition, the identification frequency band is selected based on PLL parameter sensitivity to improve the parameter identification accuracy under the same impedance measurement error. At different frequencies, the positive correlation between the sensitivity of the PLL parameters and the identification accuracy is proven to determine the definite frequency band for PLL parameter identification of grid‐connected inverter. Finally, the feasibility and effectiveness of the above research are verified by simulation and semi‐physical experiments.

Subsynchronous oscillation suppression strategy of wind turbine’s phase-locked loop based on optimal damping ratio

The dynamic characteristics of the phase-locked loop (PLL) of the wind turbine are the key to the synchronous operation of these renewable energy sources with the power grid. In this paper, the coupled dynamic model of PLL of the permanent magnet synchronous generator (PMSG)-base wind turbine and power grid is established firstly. The complex torque method is used to calculate the synchronous and damping torque coefficients in the PLL oscillation mode. Secondly, the influence of the PLL parameter, voltage at the point of common coupling (PCC), wind turbine’s output power and electrical distance on the oscillation damping behavior of the PLL is analyzed. Further, a novel control strategy based on optimal damping ratio is proposed to suppress the subsynchronous oscillation of the system caused by wind turbine’s PLL in weak interconnected grids. Finally, a simulation model of regional power network with high penetration of wind power generation is built to demonstrate the effectiveness of the proposed control scheme in suppressing the system’s subsynchronous oscillation caused by the wind turbine’s PLL.

A Reconstructed Singular Return Ratio Matrix for Optimizing Design of the PLL in Grid-Connected Inverters

Phase-locked loop (PLL) is essential for the grid-connected inverter to ensure grid synchronization. Since the PLL introduces an negative-resistive admittance to be in parallel with the original inverter output admittance, it poses an instability risk for the grid-connected inverter under weak grid. The system stability can be evaluated by the return ratio matrix, which is the ratio of the inverter output admittance to the grid admittance. Due to the non-singular and non-diagonal properties of this matrix, its eigenvalues are irrational functions, leading to inconvenience of stability analysis and PLL parameters design. To address this issue, this paper reconstructs the return ratio matrix to make it singular. Thus, the eigenvalues become simpler, including a zero eigenvalue and a non-zero eigenvalue. Based on the non-zero eigenvalue, the relation between the gain margin and the PLL parameters is established, and an optimizing design method of the PLL parameters is proposed to achieve system stability and satisfactory PLL dynamic response. Finally, experimental results from a 10-kVA prototype of three-phase grid-connected inverter are provided to verify the validity of the proposed design method.

Enhanced Position Estimation Based on Frequency Adaptive Generalized Comb Filter for Interior Permanent Magnet Synchronous Motor Drives

Accurate rotor position estimation is critical to ensure the high-performance operation of position sensorless interior permanent magnet synchronous motor (IPMSM) drives. However, the back electromotive force (BEMF) estimated by the model-based observers is usually nonideal, which may further degrade the position estimation accuracy. In this paper, a frequency adaptive generalized comb filter (FAGCF) with a quadrature phase-locked loop (PLL) is adopted to suppress the rotor position estimation errors by filtering out the dominant distortions in the BEMF, including the (6k±1)th harmonics caused by inverter nonlinearity and flux spatial harmonics, as well as the DC offset from the inaccurate current measurements. This proposed filter is constructed by multiple digital delay blocks and therefore has the advantage of easy implementation with less online parameters tuning effort. Meanwhile, a linearized model is derived for PLL parameter design, with which the stability of the FAGCF-PLL position estimation system can also be analyzed theoretically. The effectiveness of the proposed sensorless control strategy has been validated with the experimental results on a 1.5-kW IPMSM drive.

Reduced Order DFIG Models for PLL-Based Grid Synchronization Stability Assessment

This paper presents a reduced-order modeling approach to study the grid synchronization stability of type-3 wind turbine generator (WTG) by considering the dynamics of the phase-locked loop (PLL) alone. The proposed model is validated by comparing its time-domain response and small-signal results with the full-order dynamical model of a type-3 WTG system. Extension of the proposed reduced-order model is shown in a wind farm with N numbers of the WTGs, and time-domain simulations are performed under stable and unstable scenarios. The developed model is further utilized for directly assessing the transient stability of a doubly-fed induction generator-based wind turbine generator (DFIG-WTG) system leveraging Lyapunov's direct method. From the direct transient stability assessment methodology, an approximate estimate of the critical clearing time (CCT) is obtained for the DFIG-WTG system to ensure large-signal stability following severe grid fault. Finally, the parametric conditions are derived theoretically, which can determine the stable and unstable region of operation of the DFIG-WTG system with respect to the PLL parameters, grid impedance, and input wind speed.

PLL phase margin design and analysis for mitigating sub/super-synchronous oscillation of grid-connected inverter under weak grid

Under weak grid, the grid-connected inverter can easily cause sub/super-synchronous oscillations, which are determined by the oscillation modes of system. Firstly, based on the eigenvalue analysis, the sub/super-synchronous oscillation modes of the grid-connected inverter are revealed with considering the phase-locked loop (PLL) and control delay. With the decline of grid stiffness, the typical roots of sub-synchronous oscillation (SSO) mode gradually shift from the left-half plane to the right-half plane, which means that the grid-connected inverter will oscillate under weak grid. By analyzing the participation factor of SSO mode, it finds that PLL is the dominant factor. Based on the root locus analysis, the stable regions of PLL parameter are obtained. Then, according to the stable regions of PLL parameter, the phase margin of PLL can be calculated, which can make the grid-connected inverter operate stably. It finds that PLL phase margin should be increased for suppressing this SSO. However, when the PLL phase margin is greater than a certain value, the system will enter a supersynchronous oscillation mode, which can cause a supersynchronous oscillation. Thus, to suppress the sub/super-synchronous oscillations of the grid-connected inverter under weak grid, the phase margin of PLL should neither be too small nor too large. Finally, the proposed suppression strategy of the sub/super-synchronous oscillations for the inverter integrated into a weak grid is validated with the simulation and experimental studies.

NSRR Microwave Sensor Based on PLL Technology for Glucose Detection

Microwave biosensor shows great potential in mediator-free glucose detection. However, most microwave biosensors are passive devices; therefore, the high-stability and SNR frequency spectrum are necessary for ensuring the detection precision. In this article, a nested split-ring resonator (NSRR) microwave sensor integrated with phase-locked loop (PLL) technology is proposed for building a portable glucose detection system. PLL drives the NSRR operating at the specific frequency, in which the insertion loss is utilized to characterize the glucose level. By establishing the noise contribution model of PLL to NSRR, the loop parameters of PLL are optimized for higher linearity and sensitivity. The results show that when the loop bandwidth <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$K$ </tex-math></inline-formula> is set to 20 kHz for a Type-II fourth-order PLL, −76.3 dBc of spur suppression is achieved in the noise-sensitive area (660–760 MHz). In this case, the operation frequency is set at 743 MHz to realize a sensitivity of 17.2 dB/mg mL−1 and linearity of 0.97 for glucose detection.

PLL Based Sub-/Super-Synchronous Resonance Damping Controller for D-PMSG Wind Farm Integrated Power Systems

Existing sub-/super-synchronous (SSO) suppression methods for the direct-drive permanent magnet synchronous generators (D-PMSG) integrated power systems are mainly achieved by external devices or sub-synchronous resonance damping controller (SSRDC) at the converters, facing challenges of considerable control costs, complex parameters tuning, or inadaptability to various operating conditions. To address these problems, this paper proposes an adaptive SSRDC based on the phase-locked loop (PLL) for D-PMSG integrated power systems. Firstly, the PLL parameter is found critical to SSO suppression by a comprehensive sensitivity analysis on the dominant poles of the impedance closed-loop transfer function. Motivated by this finding, this paper then designs a PLL-based SSRDC, which features a simple structure, easy parameter tuning, and flexible adaptability to various operating modes. The simplicity in structure is guaranteed by the avoidance of phase compensation. Benefiting from the simple structure, only one key parameter needs to be tuned. Moreover, two principles of parameter tuning are proposed to enhance the efficiency, robustness, and adaptability of the proposed SSRDC. The controller-hardware-in-the-loop (CHIL) tests verify the validity of the proposed SSRDC under various operating conditions. Finally, some concerns about this method such as frequency estimation, computational efficiency and potential impacts on PLL are thoroughly analyzed and clarified.

Delay-Based Phase-Locked Loop Parameters Design Based on Stability Region of Grid-Connected Single-Phase Inverter Under Grid Voltage Sags

For the grid-connected inverter, grid voltage sag can be a typical phenomenon. From the prospective of safe and robust operation, the inverter should be stable when the grid voltage sag (or large disturbance) occurs. Although the inverter stability in this case has attracted considerable attentions, few studies have given suggestions on the system stability boundary and parameter design. To fill this gap, this article deeply discusses the large-signal stability of the system under different situations and reveals the quantified impact of the phase-locked loop (PLL) on the large-signal stability of the system based on the fundamental current-source model. The large-signal stability criterion and boundaries for grid voltage sags are established, which are instructive to the design of PLL parameters. Besides, a novel design guideline for the PLL parameters is proposed to ensure the robust operation of the system both under the steady-state and grid voltage sags, as well as to achieve good dynamic performance after large disturbance occurs. The theoretical, simulation, and experimental results show that the proposed stability boundary has certain accuracy and the PLL parameters design guideline can ensure the system stability both under steady-state and grid voltage sag conditions.

Optimized Luenberger Observer-Based PMSM Sensorless Control by PSO

In the real applications, we found that it is difficult to achieve good control performance through manually tuning proportional–integral (PI) parameters of phase locked loop (PLL) and speed-loop of Luenberger observer (LO) for the PMSM sensorless control system. Therefore, this paper is to use the particle swarm optimization (PSO) algorithm to optimize the PI parameters of PLL and speed-loop of Luenberger observer of the system. Firstly, the ranges of PLL parameters are obtained by analyzing the PLL subsystem stability. Then, the ranges of PI parameters of PLL and speed-loop are set based on theoretical estimation and empirical values. The control system model is realized in MATLAB/Simulink that considers the constraints such as the saturation. The integral time absolute error is the objective function, and the PSO with different topologies is used to optimize the PI parameters. The simulation and experimental results show that the proposed method is feasible, and the optimized parameters can effectively improve the precision of position estimation and speed estimation. Moreover, the simulations and experiments are carried out to verify the robustness of the proposed method, and the results show that the optimized system can achieve good performance when there are uncertainties or disturbances.

Novel Design of a Digital PLL for Power Reduction

Very large-scale integration (VLSI) circuits operating at ultra-low power are currently acquiring more attention from the research group and the industries too. Recently, the performance of many applications depends on the size and energy consumption of sensor nodes. The energy efficient sensor nodes with reduced size are much preferred among applications such as wireless sensor networks, pollution and plant monitoring. The biggest challenge faced by the VLSI designers in present day life is designing a product of new generation which operates on minimum possible power. Power consideration is the eventual design criteria in different real-life applications like pacemakers etc. Phase Locked Loop is a framework that produces an output which is in phase with the input signal. In Phase Locked Loop (PLL), the focus is at the input signal’s phase with its output oscillator signal’s phase and thus modifies the recurrence frequency of the Voltage Controlled Oscillator (VCO) for phase co-ordination. The output signal from the Phase Frequency Detector is utilized to control the oscillator in a feedback circle also. As an operational gadget, the PLL has wide scope of utilization in media transmission, PCs and electronic applications. In this paper, designing and analysis of PLL with numerous outputs has been proposed to be implemented by changing the closed loop frequency control framework PLL blocks. As such, highly effective, low power, ideal area chip can be used for PLL with four various yields as PLL 8x, PLL 4x, PLL 2x and PLL 1x with different frequencies separately. Likewise, it is planned to utilize multi-threshold or sleep transistors to minimize the leakage current in the circuit. Further, the execution or performance verification of various parameters of PLL are done to acquire negligible power. Direct toolbox YALMIP is used as programming solver as an optimization tool. In addition to this, another method of Non- dominated sorting genetic algorithm (NSGA-II) Correlation for optimization is also introduced between both the strategies to find the best outcomes.

Coherent Optical Frequency Transfer via a 490 km Noisy Fiber Link

We demonstrate the coherent transfer of an ultrastable optical frequency reference over a 490 km noisy field fiber link. The fiber-induced phase noise power spectrum density per-unit-length at 1 Hz offset frequency can reach up to 510 rad2⋅Hz−1⋅km−1, which is much higher than the fiber noise observed in previous reports. This extreme level of phase noise is mainly due to the fiber link laying underground along the highway. Appropriate phase-locked loop parameters are chosen to complete the active compensation of fiber noise by measuring the intensity fluctuation of additional phase noise and designing a homemade digital frequency division phase discriminator with a large phase detection range of 212 π rad. Finally, a noise suppression intensity of approximately 40 dB at 1 Hz is obtained, with fractional frequency instability of 1.1 × 10−14 at 1 s averaging time, and 3.7 × 10−19 at 10000 s. The transfer system will be used for remote atomic clock comparisons and optical frequency distribution over a long-distance communication network established in China.

Optimal PID Tuning of PLL for PV Inverter Based on Aquila Optimizer

Phase-locked loop (PLL) is a fundamental and crucial component of a photovoltaic (PV) connected inverter, which plays a significant role in high-quality grid connection by fast and precise phase detection and lock. Several novel critical structure improvements and proportional-integral (PI) parameter optimization techniques of PLL were proposed to reduce shock current and promote the quality of grid connection at present. However, the present techniques ignored the differential element of PLL and did not acquire ideal results. Thus, this paper adopts Aquila optimizer algorithm to regulate the proportional-integral-differential (PID) parameters of PLL for smoothing power fluctuation and improving grid connection quality. Three regulation strategies (i.e., PLL regulation, global regulation, and step regulation) are carefully designed to systematically and comprehensively evaluate the performance of the proposed method based on a simulation model in MATLAB/Simulink, namely, “250-kW Grid-Connected PV Array”. Simulation results indicate that PLL regulation strategy can effectively decrease power fluctuation and overshoot with a short response time, low complexity, and time cost. Particularly, the Error(P) and the maximum deviation of output power under optimal parameters obtained by PLL strategy are decreased by 418 W and 12.5 kW compared with those under initial parameters, respectively.

INFLUENCE OF PLL ON BROADBAND OSCILLATION UNDER WEAK GRID

The integration of large-scale renewable energy into the weak power grid has aroused a series of broadband oscillation problems. Converter is an important link between renewable energy and power grid, in which phase locked loop (PLL) can track the phase angle and frequency of power grid. At present, the influence of PLL parameters on system stability is often studied. With the increase of PLL bandwidth, the frequency range of converter negative damping increases, and the system is prone to broadband oscillation. This paper further studies the influence of the coupling between PLL and the steady-state operation point. The converter admittance can be divided into two parts. One part is only related to the converter circuit and control, and the other affected by the interaction of PLL and the operation point. Then, the system stability is analysed according to the generalized Nyquist criterion (GNC), and the grid impedances and converter power levels required for the system stability are given. The research can provide reference for field test and operation.

Impact of PLL and Virtual Inertia on Deregulated AGC System Integrated with Parallel AC/HVDC

This article investigates the impact of phase-locked loop (PLL) systems along with virtual inertia on system dynamics of a parallel AC/HVDC tie-line integrated two-area automatic generation control (AGC) system under a deregulated scenario. The multi-area AGC system comprises two thermal and hydro-gas in area-1, 2. An attempt is made to utilize a new secondary controller named the two-degree-of-freedom tilt-integral-derivative (2DOF-TID) controller. Its gains and PLL parameters are optimized by a novel meta-heuristic algorithm called a bird swarm algorithm (BSA). The system dynamics corresponding to the proposed 2DOF-TID are compared with 2DOF-PID, 2DOF-PI explored better system dynamics with a 2DOF-TID controller. The system dynamics are compared with AC alone, AC/HVDC, AC/HVDC tie-line incorporating with PLL, virtual inertia revealed the better performance of the latter. Moreover, the effect of variation in PLL parameter on the system dynamics are also analyzed and studies suggested that the obtained response at the nominal value of natural frequency (ωn ) and damping coefficient (ζ) reduces the subsequent oscillation and provides better dynamics other than varying condition.

Influence of phase‐locked loop aggregation on the dynamic aggregation of wind farm strings with heterogeneous parameters

Offshore wind farms are cornerstone solutions for enabling large-scale integration of renewable energy. Due to the large number of wind turbines in a wind farm, each with their individual complex control structure, a detailed time-domain model for analysis of wind farms is impractical from a computational burden perspective. Accordingly, aggregated models have been presented to reduce the computation time. Despite the high activity in aggregated modelling of wind farms, dynamic aggregation considering heterogeneous converter controllers and filter parameters, including different phase-locked loop (PLL) parameters have not been discussed previously. To remedy this issue, this study proposes an aggregated structure-preserving model of a wind farm string where all converters have heterogeneous parameters. The proposed model is verified by simulations against a detailed numerical model of the wind farm string, showing its accuracy in preserving the wind farm string dynamics under a severe grid fault with different short-circuit ratios and PLL parameters. Through a comparison of four different PLL aggregation methods under the considered case studies, it is found that the PLL aggregation has a negligible influence on the aggregated response and, hence, the particular aggregation method employed is not of great importance.

A Robust Circuit and Controller Parameters’ Identification Method of Grid-Connected Voltage-Source Converters Using Vector Fitting Algorithm

This article presents a vector fitting (VF) algorithm-based robust circuit and controller parameters’ identification method for grid-connected voltage-source converters (VSCs). The <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$dq$ </tex-math></inline-formula> -domain impedance frequency responses (IFRs) of the VSCs are first measured using the frequency scanning method, based on which the corresponding measured phasor-domain IFRs are calculated. Then, polynomial transfer functions are generated by applying the VF algorithm on the measured phasor-domain IFRs, from which the circuit and controller parameters, i.e., <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$LCL$ </tex-math></inline-formula> filter parameters, digital sampling time, current controller parameters, and phase-locked loop parameters, are identified. The influence of measurement noise on parameters’ identification accuracy and corresponding countermeasure to mitigate the adverse influence are also theoretically investigated. The proposed method is able to identify the circuit and controller parameters when detailed parameters are missing due to industrial secrecy or parameters variation caused by operating condition change, temperature fluctuation, or aging. The effectiveness of the proposed circuit and controller parameters’ identification method is validated by theoretical demonstration, OPAL-RT-based real-time simulation, and experimental validation.

Overview of SOGI-Based Single-Phase Phase-Locked Loops for Grid Synchronization Under Complex Grid Conditions

Synchronization is the key part to ensure the high performance of grid-connected systems. Phase-locked loop (PLL) is one of the most popular synchronizations due to its simple implementation and robustness under certain grid variations. Particularly, in single-phase applications, PLL based on second-order generalized integrator (SOGI-PLL) is widely used because of its simple structure, certain filtering ability and frequency adaptability. The sensitivity of SOGI-PLL to the dc offset and low-order harmonics has been studied a lot in the literature and many solutions have been proposed. However, as more and more power electronic devices are integrated into the power grid recently, the grid condition becomes more complex. As a result, the nonlinear loop coupling phenomenon of SOGI-PLL is more severe and obvious and thus the performance of SOGI-PLL is degraded a lot, especially under the conditions of grid frequency variations and weak grid. A popular method is to use the frequency-fixed SOGI-PLL (FFSOGI-PLL) while how to eliminate the estimation error under frequency variations remain an important task. Though some scattered methods have been proposed, a simple yet effective strategy is still missing. Besides, it has been shown that the system stability margin will be reduced due to the negative-resistance behavior of PLL. However, the models derived in the current documents cannot accurately reveal the instabilities caused by the standard SOGI-PLL for missing the dynamics of the frequency feedback loop. Moreover, the PLL parameters are usually designed according to the PLL bandwidth to guarantee system stability under a weak grid. How to optimize the parameters is still unclear. In view of this, this article further summarizes and reviews the existing achievements of single-phase SOGI-PLL, and points out the problems to be solved and the development direction to improve the SOGI-PLL under more complex and non-ideal grid conditions.

Impact of VCO and PLL Phase Noise on Distributed Beamforming Arrays With Periodic Synchronization

Distributed beamforming between separate wireless nodes in a distributed antenna array requires significant coordination of the relative electrical states of the systems to achieve and maintain a phase-coherent state. A principal factor impacting distributed phase coherence is the relative stability of the local oscillators on each node. Ensuring a coherent state requires the distribution of a reference frequency such that all nodes are operating on the same basis frequency. To support distributed beamforming, the reference frequency must furthermore be distributed wirelessly, typically using a phase-locked loop (PLL) on the secondary nodes. In large arrays, the wireless link used for frequency distribution will have limited capacity, necessitating intermittent updates during which the oscillators are locked, and between which their frequencies will drift. The stability of the oscillator therefore plays an important role in the overall performance relative to the update time. In this paper, we discuss the sources of phase noise generated by the reference oscillator and the PLL, and analyze the impacts of phase noise and update interval on distributed beamforming performance. We provide a framework for analyzing distributed beamforming performance from oscillator and PLL parameters in general, and we analyze beamforming performance for two specific cases using nominal high-stability and low-stability voltage-controlled oscillators, with a parametric comparison between their impact on beamforming performance.