Microelectronic Packaging Research Articles

Crystallinity of Co-P coating on microstructure and mechanical properties of Co-Sn intermetallic compounds at Sn-Ag/Co-P/Cu Interface

In advanced microelectronic packaging technology, the interfacial brittleness of Cu/Sn solder joints puts forward higher requirements for high-performance diffusion barriers. Cobalt–Phosphorus (Co-P) alloy coating becomes ideal candidates for its good wettability and diffusion resistance. In this work, for Co-P with different crystallinity, the barrier properties of electrodeposited Co-P coatings as well as the mechanical properties of Co-Sn intermetallic compounds (IMCs) at the Co-P/Sn-Ag interface were investigated. According to the XRD results, the crystallinity of the Co-P coating was directly related to the phosphorus (P) content, and Co-P were classified into three types: crystalline state, mixed state and amorphous state. The morphology, composition, phase characterization, and mechanical properties of the Co-Sn IMCs at the interface were investigated by SEM, EPMA, TEM, and nanoindentation methods, respectively. After 180 °C aging test for 120 h, the thickness of CoSn3 generated at the interface of crystalline Co-4.2 at.% P/Sn-Ag was the smallest among a total of 18 Co-P coatings, where P content ranged from 0.9 at.% to 20.8 at.%, showing the best barrier properties. The hardness of (Co,Cu)Sn3 at the amorphous Co-P/Sn-Ag interface was the lowest (3.2 GPa), which was only 47% of that of Ni3Sn4, exhibiting the lowest brittleness tendency. The mixed crystalline-amorphous Co-P could greatly improve the diffusion barrier properties while sacrificing a small degree of brittleness comparing to the amorphous coatings, and had the potential to become a general-purpose alloy coating. This work could provide a scientific basis for the selection of Co-P barrier layers with excellent barrier properties and mechanical properties leading to different application scenario in electronic packaging.

Low-Temperature Sandwich Structure Wafer-Level Hermetic Packaging via Three-Layer Simultaneous Bonding for 3-D Microsystems

A sandwich structure, which is stacked by a wafer-level copper–copper (Cu–Cu) thermocompression bonding and a silicon–silicon (Si–Si) direct bonding, has been investigated for potential application as a hermetic seal in 3-D microsystem packaging. First, the bottom and middle layers are prebonded by hydrophilic Si direct bonding. Oxygen plasma is employed for surface activation. Then, the prebonded wafers and the top wafer are bonded via Cu thermocompression bonding at a bonding temperature of 300 °C and a bonding force of 8000 mbar for a duration of 1 h. The entire bonding process of the three layers has borne only one heating procedure, which could effectively reduce the residual stress after bonding. Cavities are etched to a volume of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$21.4\times 10^{-3}$ </tex-math></inline-formula> cm3 following the MIL-STD-883E standard prescribed for microelectronics packaging. The helium leak test demonstrates that 96.8% of the samples present a superior leak rate smaller than <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1.7\times 10^{-8}$ </tex-math></inline-formula> atm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\cdot $ </tex-math></inline-formula> cm3/s. Moreover, the interfacial adhesion energy between the Cu–Cu bonding interface and the Si–Si bonding interface was projected at 16.4 ± 4.6 J/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{m}^{2}$ </tex-math></inline-formula> and Si breakage energy. The results hold great promise for 3-D microsystem wafer-level packaging.

Physics-Based Model for Understanding Electromigration-Induced Cavity Evolution in Advanced Narrow Line Copper Interconnects

In the interconnects of microelectronic package with high current density and high-frequency fluctuation, electromigration (EM) events cause the cavities nucleation at the metal lines cathode and hillock pile-up at anode, which further lead to short circuit/open circuit and influence the overall device reliability substantially. In this work, mechanical modeling of EM-induced cavity failure was investigated and a modeling theory of efficient EM cavity morphology evolution based on physics was comprehensively introduced. According to mass diffusion theory, a dynamic model of elliptical cavity shape evolution with velocity and shape parameters was established. Meanwhile, kinetic equations of shape evolution expansion connected to cavity velocity and shape were proposed to explain the cavity expansion and cavity collapse processes, respectively. Based on the surface morphology analysis, it is obvious that cavity evolution form is determined by the competition between surface tension and electron wind. It is revealed that both them encourage cavity stretching in the direction of electric field intensity while compressing in the opposite. In addition, the mismatch of matter concentration between the left and right ends of the cavity will drive the cavity to migrate against the electric field intensity.

Tensile properties dependency on crystal size and direction of single crystal Ag3Sn intermetallic compound: a molecular dynamics study

The necessities of lead-free solder alloys have been expanded by the advent of eco-friendly technologies of microelectronic packaging industry. Mostly lead-free solder alloys are SAC, which is the alloy of tin, silver and copper metal. Ag3Sn, Cu3Sn and Cu6Sn5 inter-metallic compounds are formed during microelectronic packaging, which reduce the properties of SAC solder joints adversely. The present study explores direction dependent tensile properties of various sized single crystal anisotropic Ag3Sn. Molecular dynamics simulation platform LAMMPS is used to examine the elastic behavior of these crystals by modified embedded atom method (MEAM) potential parameters. The atomistic investigation is performed for four crystal sizes of 30×30×30, 60×60×60, 90×90×90 and 120×120×120 Å3 at a temperature of 298 K and a strain rate of 1010 s−1. A comprehensive insight from this work is that the tensile properties fluctuations due to direction are within 13–25% at any distinct crystal size, whereas fluctuations at any specific direction are within 5–17% for mentioned interest of crystal sizes. An optimum crystal size of 60×60×60 Å3, exhibits maximum tensile properties. However, the fracture initiation patterns are quite similar for all sizes and directions where the natures are investigated as ductile.

Control of alignment of h-BN in polyetherimide composite by magnetic field and enhancement of its thermal conductivity

In this study, hexagonal boron nitride (h-BN) - polyetherimide (PEI) composites were prepared by a simple solution casting method, where the h-BN particles were aligned by an external magnetic field. Prior to the preparation of the composite samples, the h-BN platelets were firstly decorated by iron oxide nanoparticles (Fe 3 O 4 ) to achieve the desired magnetic properties. Due to the alignment of h-BN particles, the composite exhibited greatly enhanced thermal conductivity along that direction. At a filler loading of 20 wt%, an enhancement of 166% was obtained, compared to that of the unaligned composite. Furthermore, the composite samples showed a low dielectric loss (~ 0.01) with the filling ratio below 20 wt% and a tensile modulus of up to 2.34 GPa. Bearing such thermal conductivity, electrical insulation properties, and mechanical properties, these composites with magnetically aligned h-BN particles show potentials for microelectronic packaging applications. • h-BN were added into polyether imide (PEI) to prepare flexible composite films. • h-BN micro-platelets were aligned by an external magnetic field. • h-BN micro-platelets were firstly decorated by iron oxide nanoparticles to achieve magnetic properties. • The vertically aligned h-BN/PEI composite is promising for high-performance electronic packaging applications.

Elucidating the large variation in ion diffusivity of microelectronic packaging materials

The risk of corrosion poses a challenge to meet the stringent reliability requirements of microelectronic devices that are used in harsh environments. Microelectronic devices are often encapsulated in polymer packaging materials, which protect them from corrosion. These polymers are, however, not completely hermetic and thus allow small amounts of ions and moisture to reach the device, which might cause corrosion of the microelectronic circuitry. To improve and predict the reliability of the device, it is important to quantify the ion diffusivity in these materials. Previously reported values for the ion diffusivity vary by multiple orders of magnitude for a single class of material. Here, we investigate the causes for this discrepancy using three experimental methods: (i) saltwater immersion, (ii) diffusion cell measurements, and (iii) transient electric current measurements. Several materials, such as silicone, epoxy, and polyamide, were tested to cover the broad spectrum of polymers used by the microelectronics industry. We found that the discrepancies are likely due to the strong dependence of the ion diffusivity on both the moisture content within the polymers, as well as on the salt concentration and pH of the solutes. Furthermore, we found that the very low ion diffusivity causes long measuring times, and thus a large risk for errors from contamination, leakage, or minor defects in the samples.

Forming mechanism and growth of Kirkendall voids of Sn/Cu joints for electronic packaging: A recent review

For the common Cu-Sn interconnection system in microelectronics packaging, a significant concern is the sporadic interfacial void formation within the Cu–Sn interface and intermetallic compound (IMC) layer during the service. The existence of these voids affects the electrical and mechanical properties of the joint and thus deteriorates reliability. Most scholars simply attribute the Kirkendall voids problem to the Kirkendall effect caused by the difference in Cu/Sn inter-diffusion coefficients. However, Kirkendall voids are formed for a combination of many reasons. The plating additives, current density, surface roughness, coating thickness, and substrate types affect the formation of Kirkendall voids. We believe that among the many factors affecting the formation of voids, the unbalanced diffusion of elements (Kirkendall effect) is the root cause, and impurities and Cu microstructure are the dominant factors. The addition of alloying elements to the solder affects the formation of voids by changing the unbalanced diffusion of elements. This paper releases the possible mechanism of Kirkendall voids and gives the perspective summary from three steps of void formation, and the available suppression method is given based on the final solution.

Design and Evaluation of a Cyanate Ester Containing Oxaspirocyclic Structure for Electronic Packaging

A type of pentaerythritol cinnamaldehyde bisphenol dicyanate ester (PCBDCy) containing oxaspirocyclic structure is well designed and synthesized in three steps from cinnamaldehyde, pentaerythritol, phenol, and cyanogen bromide. The products in each step are characterized by elemental analysis, Fourier transform infrared (FT-IR) spectroscopy, and 1H NMR spectroscopy. The mechanical properties, dielectric properties, thermostability, and water absorption of PCBDCy are investigated in detail. The results show that compared with bisphenol A dicyanate (BADCy), the PCBDCy possesses more excellent comprehensive properties. The bending strength and flexural strength are increased by 10.71% and 47.62%, respectively. The fracture toughness K IC and G IC are 1.5 times and 2 times of BADCy, respectively, indicating that its mechanical properties have been considerably improved. The dynamic mechanical curves indicates that the degree of phase separation is significantly reduced, the tan (δ) value representing the flexible phase is obviously shifted to the high temperature region, and the initial decomposition temperature was 12°C higher than that of BADCy, indicating that the material has excellent thermal stability. In addition, the dielectric constant and loss tangent are almost as same as those of BADCy, maintaining good dielectric properties. The water absorption rate has increased to 1.03 ± 0.03 % . Compared with BADCy, its comprehensive performance is more suitable for the field of microelectronic packaging.

Microstructural evolution of intermetallic compounds between crystalline/amorphous Cobalt-Phosphorous coatings and lead-free solders

In the advanced microelectronic packaging, Cu/Sn joints require high-quality diffusion barriers to inhibit Cu–Sn intermetallic compounds (IMCs) growth and improve the interface brittleness. Cobalt-Phosphorous (Co–P) alloy coatings are ideal candidates due to their good wettability, promising diffusion resistance and low interfacial brittleness. In this work, the microstructural evolution of IMCs between crystalline/amorphous Co–P coatings and lead-free solders during the solid-state diffusion were systemically investigated. The microstructure, phase distribution, and grain characteristics of coatings and IMCs were carefully characterized by SEM, EPMA, EBSD, and TEM. It was found that the consumption rate of crystalline Co–P, 21.2 nm/h, was significantly slower than that of amorphous Co–P, 96.4 nm/h, and exhibited an excellent diffusion resistance, which was attributed to the nanocrystalline structure and the P-rich layer which performed the diffusion barriers for Sn and Cu atoms. Compared with Ni, amorphous Co–P coatings could better improve the interfacial brittleness with soft and ductile Co–Sn compounds (hardness of 3.0 GPa) growing with the rapid diffusion of Co, and the toughened Co–Sn–P attributing to the diffusion of Sn. Kinetic analysis showed that the growth rate-controlling process of Co–Sn IMCs was jointly controlled by interfacial reaction and volume diffusion, and the effect of the interfacial reaction is more pronounced in the amorphous system, which leads to coarse Co–Sn grains that are beneficial to the softness and ductility of IMCs. Crystalline and amorphous Co–P coatings can be applied to the surface treatment for die pads and print-circuit-board pads according to their own characteristics, respectively.

Thermomechanical Optimization of Three-Dimensional Low Heat Generation Microelectronic Packaging Using the Boundary Element Method

This paper presents a simulation based on the boundary element method for the optimization of the thermomechanical behavior of three-dimensional microchip-dissipator packaging when the heat generation produced is medium-low. Starting from a basic architecture studied in the literature, different modifications affecting both elastic boundary conditions and the contact interface between the microprocessor and the heatsink are included and studied in order to improve heat dissipation. A nonlinear interface material is included at the interface of both solids. Thus, a thermal contact conductance as a function of the normal contact traction is simulated. Finally, all these improvements in both contact interface and boundary conditions are applied to study the maximum heat generation that this kind of architecture can efficiently dissipate, so that the microchip will not be damaged due to thermal deformations.

A photonic MEMS interposer to solve electronic and optical assembly challenges

AbstractPhotonic applications often face industry‐specific assembly requirements that can be challenging to overcome. There is a need for micron‐accurate alignment, device miniaturization and integration in challenging form factors. Special materials and packaging must be developed for the best performance of the devices in exacting environmental conditions. In the medical field, these requirements are additionally complicated by the demanding ISO 13485 regulations. The article demonstrates how solutions are found in a combination of new and existing technology in microelectronics packaging and now made suitable for photonics.

Chemically crosslinked polyimide-POSS hybrid: A dielectric material with improved dimensional stability and dielectric properties

One kind of the leading polymers applied in microelectronic packaging is polyimide (PI)-tethered polyhedral oligomeric silsesquioxane (POSS) hybrids. However, a well-known problem is that PI-POSS hybrids usually suffer from the serious thermal expansion at elevated temperature, leading to deteriorated reliability in electronic devices. In this work, a series of PI-POSS hybrids is successfully fabricated using aminopropylisobutyl-POSS as a reactive filler, and then the phenolic hydroxyl groups on side chains of hybrids react with terephthaloyl chloride at room temperature to form a crosslinked network. The well-designed crosslinked network suppresses the thermal expansion and improves the dielectric properties of hybrids together with POSS. As an example, after 24 h of crosslinking reaction, the coefficient of thermal expansion of the crosslinked hybrid with 14.6 wt% POSS (CPIH-2-24H) is 24 ppm/K, revealing a 59% reduction against the unmodified PI (82 ppm/K). Meanwhile, the dielectric constant and loss of CPIH-2-24H are decreased by ∼27% (2.68 vs. 3.68) and ∼72% (0.007 vs. 0.025), respectively, compared with the corresponding values for the unmodified PI. These data indicate that the resultant crosslinked PI-POSS hybrids may be used as microelectronic packaging materials, and the work provides a feasible approach to restrict the thermal expansion of PI-POSS hybrids by room-temperature chemical crosslinking.

Bonding strength enhancement of low temperature sintered SiC power module by femtosecond laser induced micro/nanostructures

In this work, a low-temperature and low-pressure method was proposed for the bonding strength enhancement of SiC chips and substrates using micro/nanostructures fabricated by femtosecond laser. It is demonstrated that a reliable bond was achieved at 180 °C without assistant pressure. When the sintering temperature reached 250 °C and the assistant pressure was 10 MPa, the average shear strength reached 45 MPa, which was more than 3 times that of the flat substrate. The fracture surface morphology and the cross-section of the sample were characterized by SEM to analyze the enhancement mechanism of shear strength. The shear strength under different sintering conditions was also discussed. The thermomechanical coupled finite element simulation results demonstrate that the power module possessed excellent thermal capability and reliable lifetime under a temperature shock environment (−50 °C–250 °C). It is proved that the measured temperature distribution of the joint is in agreement with the simulation results. This method has great application prospects in microelectronic packaging, especially for wide-bandgap power semiconductors.

Electromechanical Performance of Microprobe Test With Cuboid Magnetorheological Damper in Microelectronic Packaging

To avoid the damage of the microprobe to the wafer, the magnetorheological (MR) damping loading was used. The problem of low repeated positioning was solved by limiting the relative rotation between the probe and cylinder. The experimental results show that the damping performance was similar between the cuboid and cylinder damper. The repetition accuracy of cuboid was more than circular cylinder damper two times. Then, the electrical properties of probe with the cuboid damper were tested under different damping currents, loading velocities, and loading displacements, and the contact resistances fluctuated in the range of 0.85–1.4 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Omega $ </tex-math></inline-formula> . Finally, the mathematical models of pressure and contact resistance were established using the loading speed of 20 mm/s and loading displacement of 300 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> . The relationship between the pressure and contacting resistance of probe was revealed with the new damper during loading process and unloading process.

Welding defect signal extraction technology based on GAMP-SBL algorithm

Flip chip technology has been rapidly developed and widely used in the field of microelectronic packaging, and defect detection has also received more and more attention. Aiming at the problem that noise affects the location and extraction of signal defects in ultrasonic testing, the sparse Bayesian learning based on generalized approximate message passing (GAMP-SBL) algorithm is used to extract signal defects, and the over-complete Gabor dictionary is used to reconstruct signal defects to effectively improve Sparse decomposition algorithm. The precision experiment tested the defect simulation signal and the actual ultrasonic signal respectively, and compared with the greedy algorithm. The experimental results show that the GAMP-SBL algorithm can more effectively extract the defect signal under the noise background.

A novel ultrasonic transducer with multiple vibrations in microelectronic packaging

Ultrasonic wire bonding is a typical packaging for semiconductor devices. Compared with single longitudinal transducer, we propose a novel ultrasonic transducer with multiple vibrations for the microelectronic packaging. The transducer is designed to excite the longitudinal and bending vibration individually or simultaneously. By simulation calculation, three longitudinal vibrations and a bending vibration is attained in the same node flange. The transducer structure is established by optimizing a balance and a Z-shaped flange, which can achieve the optimal modal shape. Under the 10 kg·cm torque for clamping the piezoelectrics stacked, the frequency of longitudinal vibration is 64.8 kHz 103.4 kHz 142.8 kHz and bending vibrations is 70.5 kHz. A dual channel driver with Field Programmable Gate Array (FPGA) and Digital Signal Processing (DSP) controller is self-developed to excite the multiple vibrations. In experiment, each vibration is excited individually, switched or simultaneously. It is found that all vibration for each operating modes is higher than 1 µm, and the vibration profile can be controlled as a rectangle or parallelogram, which has potential to be a new bonding process.

Tailoring the Properties of Polyurethane Coatings with Epoxidized Bio-Polyol Spin-Coated onto Glass and P-Type Si(100) Substrates

High-performance plastics or engineering polymers have been actively studied for various microelectronic applications as the demand for faster processing speeds increases. Taking advantage of its high Young’s modulus ideal for inter-layer dielectric applications, polyurethane (PU), a class of linearly-segmented polymer primarily made by reacting isocyanate and polyol, were deposited on borosilicate glass and p-type Si (100) substrates via spin coating method utilizing epoxidized soybean oil as a bio-polyol replacement. Optical micrographs showed that 100% ESBO-based PU coatings exhibited homogeneous and superior quality coatings in contrast to 50% ESBO-and 100% petroleum-based PU coatings as confirmed by scanning electron micrographs and EDX analysis. Based on the surface profilometry data, we found out that PU coatings with film thickness ranging from 6 μm to 28.5 μm can be achieved. FTIR-ATR analysis revealed that maintaining the stoichiometric ratio between O–H and N–C–O vibrational modes closer to unity is a vital factor to produce a high-quality PU coating regardless of the choice of substrate. The average bandgap energy of 4.35 ± 0.03 eV was estimated from the UV-vis reflectance spectra, and the electrical resistance of 107–1010 orders of magnitude was measured using a two-probe method which are typical for dielectric materials. Preliminary insights about the dielectric response of the fabricated PU coatings were investigated using electrochemical impedance spectroscopy and a low κ-value of 2.749 was calculated from the Nyquist plot of the 7.9-μm thick 100% ESBO-based PU coating deposited at 6000 rpm for 45 seconds. These promising results proved that PU coatings from bio-polyols can be tailored to achieve desired coating properties that are amenable for next-generation microelectronic packaging and curable photoresists.

Effects of temperature and strain rate on tensile properties of (Ag,Cu)-Sn intermetallic compounds: A molecular dynamics study

With the advent of environment friendly microelectronic packaging technologies, the demand of lead-free solders alloy has escalated. Leadfree solder material is an alloy of Tin (Sn), Silver (Ag) and Copper (Cu) and is widely known as SAC solder. Intermetallic compounds (IMC) like Ag3Sn, Cu3Sn and Cu6Sn5 are proven to adversely affect the mechanical properties of lead-free solder joints. This study presents the effects of temperature and strain rate on mechanical performances of these IMCs found in SAC solders. In addition, weakest and most sensitive IMC among these is detected. Modified embedded atom method potential parameters are used in LAMMPS to simulate the stress-strain behavior with deformation evolution of intermetallic compounds in different temperature and strain rates. The simulation was performed at 298 K–498 K with 50 K regular increment and at the strain rates of 108 s−1, 109 s−1, and 1010 s−1. Insight from this study suggest that the tensile properties of these IMCs increased with the increased in strain rates and decrease in temperature. Furthermore, the effect of temperature on tensile strength is observed to be higher at low strain rate whereas strain rate influence is lower at low temperatures. Among all the intermetallic, Ag3Sn exhibits lowest tensile properties with lowest stability, conversely Cu3Sn exhibits highest tensile properties with highest stability.

Mitigating board endorsement through re-spinning with surface-mounted device under test pad

The two-part legacy board device under test (DUT) pad has been very useful for testing of microelectronic packages. However, &lt;span lang="EN-US"&gt;this board has been subjected to many repair endorsements due to open connection of DUT pad and cut traces of the board components as recorded. Board re-spin is used to improve the performance of the test boards in microelectronic packages production. It improves the board development to create more functional printed circuit boards for testing and introduces the use of modern tools and software applied to the schematic creation up to the production board debugging. This paper presents a method of creating test boards for the development and manufacturing of microelectronic packages and integrated circuits. The two-part board is converted into a single board interface which eliminates the open DUT connections. A surface-mounted DUT pad is introduced to replace the old hypertact pins which are included in the re-spin board for a more robust performance. The schematic creation and board debugging were done to lessen problems caused by connection faults. In result, producing re-spin boards mitigates board endorsement which in return increases the manufacturing output performance. A faster and convenient setup was achieved when the old two-board setup was &lt;/span&gt;eliminated.

Size effects on IMC growth of Cu/Ni/Sn-3.5Ag microbump joints during isothermal aging and prediction of shear strength using ANN

Significant downsizing trend is currently directing the advanced microelectronic packaging industry, which poses new challenges to the manufacturing process and reliability of high-density chip interconnections. In this paper, to investigate the size effect of microbump joints on the interfacial structure and bonding strength, the chip-to-chip bonding joints fabricated by microbumps of same Cu/Ni/Sn-3.5Ag construction but of various sizes were experimentally examined. After thermocompression bonding process to fabricate the chip-to-chip microbump interconnections, the intermetallic compound (IMC) growth on the Ni/Sn-3.5Ag interface during 150 °C isothermal aging was compared for joints of 100, 40 and 25 μm in diameter as well as 35, 25 and 15 μm in solder layer height, using field emission electron microscopy and electron probe microanalysis. A clear size effect on the thickness and morphology of Ni3Sn4 IMC was observed, showing thicker IMC in joints of smaller diameter and lower height. The Ni concentration distribution in the solder layer was verified to be dependent on the joint size, with possible reasons being enhanced sidewall diffusion and grain boundary diffusion through IMC grains in small-diametered joints, as well as shorter diffusion path in lower joints. The shear strength of chip-to-chip bonding vehicles was also found to be size-dependent. In addition, artificial neural network (ANN) approach was applied to establish the numerical correlation of structural factors and bonding strength. It was found that a properly constructed ANN model can successfully predict the influence of the complex combinations of geometric and interfacial factors with highly accurate output, providing an effective tool for design and optimization of microbump interconnection structures and processes.