Oxide Thickness Research Articles

High-κ monocrystalline dielectrics for low-power two-dimensional electronics.

The downscaling of complementary metal-oxide-semiconductor technology has produced breakthroughs in electronics, but more extreme scaling has hit a wall of device performance degradation. One key challenge is the development of insulators with high dielectric constant, wide bandgap and high tunnel masses. Here, we show that two-dimensional monocrystalline gadolinium pentoxide, which is devised through combining particle swarm optimization algorithm and theoretical calculations and synthesized via van der Waals epitaxy, could exhibit a high dielectric constant of ~25.5 and a wide bandgap simultaneously. A desirable equivalent oxide thickness down to 1 nm with an ultralow leakage current of ~10-4 A cm-2 even at 5 MV cm-1 is achieved. The molybdenum disulfide transistors gated by gadolinium pentoxide exhibit high on/off ratios over 108 and near-Boltzmann-limit subthreshold swing at an operation voltage of 0.5 V. We also constructed inverter circuits with high gain and nanowatt power consumption. This reliable approach to integrating ultrathin monocrystalline insulators paves the way to future nanoelectronics.

Design and research of high voltage β-Ga2O3 /4H-SiC heterojunction LDMOS

Abstract In recent years, gallium oxide (Ga2O3), one of the ultra-wide band-gap semiconductor materials, has been regarded as one of the most promising materials in the field of high-voltage and high-power electronic devices in the future because of its unique electrical properties and low preparation cost. However, it is difficult for β-Ga2O3 materials to form effective P-type doping, so the PN junction is not formed in most of its power devices, which greatly limits the improvement of its voltage resistance. A novel lateral double-diffused metal-oxide-semiconductor field-effect transistor (LDMOS) is proposed to realize a junction β-Ga2O3 power device and improve the voltage resistance performance of β-Ga2O3 power devices. In this device, a β-Ga2O3 power device with a junction is realized by using P-type 4H-SiC to form a PN junction with N-type β-Ga2O3, and the voltage resistance of the β-Ga2O3 power device is improved. Sentaurus TCAD software was used to simulate the device structure and electrical performance. The device is optimized by adjusting the length of the drift zone, drift zone concentration, SiC channel concentration, and gate oxide thickness. Optimized, the device exhibits a positive threshold voltage of 3.42 V, a breakdown voltage of 2203 V, a specific on-resistance of 7.80 mΩ·cm2, and a power figure of merit of 622 MW/cm2. The results show that the heterojunction device is significant for realizing high-performance junction β-Ga2O3 power devices.

Characterization of thin oxide layers formed by Ti-Nb Alloy anodization

Ti-Nb alloys are gaining more prominence in the industrial and scientific environment due to their high biocompatibility, mechanical strength/weight ratio, and exceptional corrosion resistance compared to other metallic materials. Metals exhibiting this passivation characteristic are known as metal valves and may exhibit semiconductive or insulating oxides. Controlling the growth of distinct thickness layer films is possible through tunning anodization conditions. In this work, a Ti-Nb binary system is anodized, and the grown oxide layer is comprehensively characterized using ellipsometry based on its optical properties and thickness at different applied potentials. Confocal Microscopy assessed their surface roughness, and SEM/EDS probed the surface material's elemental composition. CF-LIBS successfully confirmed the 70/30 composition of the Ti-Nb alloy. Raman spectra have detected the presence of amorphous TiO2 and Nb2O5 at potentials higher than 80V, 100V, and 120V. Finally, a linear dependence of the oxide thickness with the applied potential was observed.

Synthesis, characterization, and optical sensing of hydrophilic anodic alumina films

Herein, the anodization of 2.6 μm Al-0.2 at. % Cu (Al-0.2Cu) films on TiN/p-type Si substrate were performed using common acidic mediums at different ranges of anodization voltage () to produce porous anodic alumina (PAA) nanostructures with high porosity. The anodization of Al-0.2Cu in 1 M H2SO4 at range of 10-30 V produced a higher oxide thickness, and hence, a higher volume expansion factor, compared to the anodization in 0.75 M H3PO4 at Va range of 100-140 V. The increase in Va, as expected, increases the inter-pore distance, pore size, and porosity of the PAA and improves the anodization rate. The optical sensing performance of the synthesized PAA under different conditions was investigated. The maximum surface wettability was attained for PAA anodized in 1 M H2SO4 at 20 and 30 V. Moreover, the Vickers hardness (HV) of PAA was improved by forming a thin alumina layer on the Al-0.2Cu surface, and the anodized Al-0.2Cu in 0.3 M C2H2O4 revealed the highest HV compared to other acids. The synthesized PAA was tested as an optical sensor for some liquids by monitoring the refractive index. The synthesized PAA structure demonstrated a sensitivity of 180 nm/RIU. The anodization of Al-0.2Cu films using a one-step anodization process in different acidic mediums, and the resulting multifunctional properties (improved hardness, tunable wettability, and competitive sensitivity) existing a novel and potentially impactful approach.

The Influence of Surface Segregation on the Anodizing of AlSi11Cu2(Fe) Diecastings

A positive segregation is usually formed on the casting surfaces produced by high-pressure die casting (HPDC). In diecast Al-Si-Cu alloy components, this segregation shows a higher content of Si compared to the nominal composition of the alloy and it drastically affects the anodizing response of the casting surface. In the present work, HPDC components were produced by AlSi11Cu2(Fe) alloy, grit-blasted, and then anodized in a sulfuric acid electrolyte at the temperature of -4.5°C. Before the anodizing process, some regions of the casting were also milled, in order to completely remove the surface segregation. Microstructural investigations were carried out on grit-blasted and milled surfaces to characterize the initial substrates before anodizing, and to study their effect on the growth of the anodic layer. Scratch and wear tests were also performed to investigate the surface mechanical properties after anodizing. The results show that the surface segregation and the rough surface present on grit-blasted substrate leads to the formation of a thin and homogeneous anodic layer. On the contrary, a thicker and scalloped oxide film is formed on the milled surfaces. After anodizing, grit-blasted surfaces show lower wear and scratch resistance than milled substrates. The presence of surface segregation prevents the thickening of the anodic layer, negatively affecting the surface wear resistance due to the reduced oxide thickness.

Super High-k Unit-Cell-Thick α-CaCr2O4 Crystals.

High-dielectric-constant (high-k) insulators are indispensable components to integrate semiconductors into metal-oxide-semiconductor field-effect transistors with sub-10 nm channel length, where the equivalent oxide thickness (EOT) of high-k insulator needs to be decreased to subnanometer scale. The traditional insulators, including Al2O3, SiO2, and HfO2, fit well with the existing silicon industry but suffer from serious degeneration of insulating properties, such as large leakage currents caused by high-density borders and interface traps, when their thicknesses are reduced to a few nanometers. Here, we synthesize a high-quality nonlayered ultrathin α-CaCr2O4 crystal down to unit-cell thickness (∼1.2 nm) by an elements slow-supply chemical vapor deposition (CVD) method. The unit-cell-thick α-CaCr2O4 crystals show a super high dielectric constant of 87.34, which is over 20 times higher than that of well-known layered insulator h-BN and corresponds to an EOT below 1 nm. Furthermore, it has a high breaking strength (39 GPa) and excellent stability. This strategy can also be used to fabricate other ultrathin ternary oxides, such as high-k ultrathin FeNb2O6 crystals, demonstrating the universality of the CVD method.

Water vapor oxidation of SiC layer of tristructural isotropic particles

AbstractTristructural isotropic (TRISO) fuel particles, developed for use in high‐temperature gas‐cooled nuclear reactors, can be subjected to oxidizing environments in off‐normal accident scenarios. In this study, surrogate TRISO fuel particles were oxidized at 1000–1350°C for 4 h in 20 kPa water vapor atmosphere balanced with ultrahigh‐purity helium gas. The oxide scale morphology and thickness were studied via scanning electron microscopy, focused ion beam, and transmission electron microscopy. The oxide thickness increased as the oxidation temperature was increased. Although the oxide scale at 1000°C was completely amorphous, pockets of crystalline oxide were observed on particles oxidized at 1200 and 1300°C. Kinetic analysis was performed to deduce the oxidation mechanism by determining the apparent activation energy using linear regression analysis. The oxidation mechanism was consistent for temperatures from 1000 to 1200°C with an activation energy of 412.4 ± 8.8 kJ/mol. The activation energy then dropped to approximately 201 ± 7.1 kJ/mol for temperatures 1200–1350°C. Therefore, there is a change in oxidation mechanism at ∼1200°C. This change is attributed to the existence of a network of significant bubbles in the oxide layer at higher temperatures, which serve as rapid diffusion pathways for the transport of oxidants from the surface to the SiC/SiO2 interface, instead of relying on the bulk diffusion through the SiO2 layer at lower temperatures where only small bubbles are present along the SiC/SiO2 interface.

Numerical Simulation on the Impact of Back Gate Voltage in Thin Body and Thin Buried Oxide of Silicon on Insulator (SOI) MOSFETs

Silicon-on-Insulator (SOI) technology provides a solution for controlling Short-Channel Effects (SCEs) and enhancing the performance of Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs). However, scaling down SOI MOSFETs to a nanometer scale does not necessarily yield further scaling benefits. Introducing multiple gates, such as a double gate configuration, can effectively mitigate SCEs. Nonetheless, fabricating a flawless double gate structure is an exceedingly challenging endeavor that remains unrealized. The adoption of a back gate bias, with an asymmetrical thickness arrangement between the front and back gates, mimicking the behavior of a double gate, offers an alternative approach. This approach has the potential to modify the electrical characteristics of the device, thus potentially leading to improved control over SCEs. In this study, we employed 2D simulations using Atlas to investigate the influence of back gate biases, namely, -2.0 V, 0 V, and 2.0 V on a 10 nm silicon thickness at the top and a 20 nm buried oxide thickness for n-channel MOSFETs. We focused on key parameters, including threshold voltage (VTh), Drain Induced Barrier Lowering (DIBL), and Subthreshold Swing (SS). The results demonstrate that a negative back gate bias is the most favorable configuration, as it yields superior performance. This translates into more effectively controlled SCEs across all the parameters of interest.

Electrical and UV-sensing performance of N-doped-Ba(Ti,Zr,Mo,Hf,Ta)O3-dielectric and ZnSnO-channel-based flexible thin-film transistors

Flexible thin-film transistors (TFTs) based on N-doped Ba(Ti,Zr,Mo,Hf,Ta)O3 dielectric and ZnSnO channel show high electrical and UV-sensing performance. The optimal N-doped Ba(Ti,Zr,Mo,Hf,Ta)O3 compositions with low equivalent oxide thicknesses (≈2 nm) and high-entropy (configurational entropy ≈ 1.59 R) are efficiently determined from a wide composition space (library). The film library is patterned to 450 metal–insulator-metal stacks, revealing dielectric constants ≈ 262–322 and loss (tan δ) ≈ 0.01–0.30 for the N-doped Ba(Ti,Zr,Mo,Hf,Ta)O3 at 1 kHz. The library is further integrated to 63 TFTs, and the promising ones exhibit the remarkable parameters: current on/off ratio of 108, threshold voltage (VT) of 0.02 V, saturation field-effect mobility of ≈76 cm2⋅V−1⋅s−1, and subthreshold swing of 0.062 V dec−1. The devices also exhibit desirable long-term stability for up to five months and perform reliably with small or negligible changes in VT and drain-source current under various gate-bias stress and temperature conditions. Furthermore, the TFT-based ultraviolet (253 nm) detector demonstrates impressive sensitivity (≈ 2 × 106) and responsibility (≈ 1171.9 A W−1). There is no substantial degradation in electrical or sensing characteristics under various levels of deformation. Charge transport in constructed energy band diagrams is used to elucidate the observed remarkable performance.

WS2 Nanosheet-Based Ultrascaled Field-Effect Transistor for Hydrogen Gas Sensing: Addressing the Sensitivity-Downscaling Trade-Off.

In this paper, we propose an ultrascaled WS2 field-effect transistor equipped with a Pd/Pt sensitive gate for high-performance and low-power hydrogen gas sensing applications. The proposed nanosensor is simulated by self-consistently solving a quantum transport equation with electrostatics at the ballistic limit. The gas sensing principle is based on the gas-induced change in the metal gate work function. The hydrogen gas nanosensor leverages the high sensitivity of two-dimensional WS2 to its sur-rounding electrostatic environment. The computational investigation encompasses the nanosensor's behavior in terms of potential profile, charge density, current spectrum, local density of states (LDOS), transfer characteristics, and sensitivity. Additionally, the downscaling-sensitivity trade-off is analyzed by considering the impact of drain-to-source voltage and the electrostatics parameters on subthreshold performance. The simulation results indicate that the downscaling-sensitivity trade-off can be optimized through enhancements in electrostatics, such as utilizing high-k dielectrics and reducing oxide thickness, as well as applying a low drain-to-source voltage, which also contributes to improved energy efficiency. The proposed nanodevice meets the prerequisites for cutting-edge gas nanosensors, offering high sensing performance, improved scaling capability, low power consumption, and complementary metal-oxide-semiconductor compatibility, making it a compelling candidate for the next generation of ultrascaled FET-based gas nanosensors.

Artificial synapses based on HfOx/TiOy memristor devices for neuromorphic applications

As a result of enormous progress in nanoscale electronics, interest in artificial intelligence (AI) supported systems has also increased greatly. These systems are typically designed to process computationally intensive data. Parallel processing neural network architectures are particularly noteworthy for their ability to process dense data at high speeds, making them suitable candidates for AI algorithms. Due to their ability to combine processing and memory functions in a single device, memristors offer a significant advantage over other electronic platforms in terms of area scaling efficiency and energy savings. In this study, single-layer and bilayer metal-oxide HfOxand TiOymemristor devices inspired by biological synapses were fabricated by pulsed laser and magnetron sputtering deposition techniques in high vacuum with different oxide thicknesses. The structural and electrical properties of the fabricated devices were analysed using x-ray reflectivity, x-ray photoelectron spectroscopy, and standard two-probe electrical characterization measurements. The stoichiometry and degree of oxidation of the elements in the oxide material for each thin film were determined. Moreover, the switching characteristics of the metal oxide upper layer in bilayer devices indicated its potential as a selective layer for synapse. The devices successfully maintained the previous conductivity values, and the conductivity increased after each pulse and reached its maximum value. Furthermore, the study successfully observed synaptic behaviours with long-term potentiation, long-term depression (LTD), paired-pulse facilitation, and spike-timing-dependent plasticity, showcasing potential of the devices for neuromorphic computing applications.

Bipolar Membranes Via Divergent Synthesis: On the Interplay between Ion Exchange Capacity and Water Dissociation Catalysis.

Bipolar membranes (BPMs) enable the operation of electrochemical reactors with electrode compartments in different chemical environments or pH. The transport properties at the microscopic scale are dictated by the composition and morphology of the interfacial junctions as well as the specific chemistry of the ion-exchange layers that support the current of protons and hydroxide ions. This work elucidates the relation between water-dissociation efficiency and the physicochemical properties of the individual ion-exchange membrane layers in the poly(styrene-b-poly(ethylene-ran-butylene)-b-polystyrene) (SEBS)-based BPM. The optimal water dissociation performance of three previously reported water-dissociation catalysts in the SEBS-based BPM was examined, with junction thickness of graphene oxide > TiO2 > SnO2, resulting in disparate junction morphologies at the BPM's interface. A hybrid junction system, which included both the effective water dissociation catalyst SnO2 and direct contacting of the ion-exchange membrane layer, exhibited high water dissociation efficiency. This was likely due to the immediate ion transport pathway provided by direct membrane contact around the catalyst, which also improved the interfacial adhesion. A higher ion exchange capacity (IEC) in BPMs substantially enhanced the water dissociation performance in BPMs without water-dissociation catalysts. However, the incorporation of the effective SnO2 catalyst into the BPMs with a lower IEC significantly improved performance, an effect attributed to the hybrid junction system. Additionally, the increase in water uptake and ion conductivity of the cation exchange layer with higher IEC suggested that the cation exchange layer and its interface to the water-dissociation catalyst layer may play a key role in water dissociation. This study identifies the key parameters of individual BPM components and their interactions to water dissociation performance, offering new insights to guide in the construction of future BPMs optimized for enhanced water dissociation efficiency at high current densities.

Air Oxidation Behavior of Sanicro-25 with Different Surface Finishes

AbstractSanicro-25 is a high-temperature material used as the structural material for steam superheaters and reheaters in advanced ultra-supercritical power plants. The air oxidation behavior of Sanicro-25 with various surface roughnesses is being assessed at 650 °C for about 1000 h. Different surface-roughened samples were studied, namely polishing the sample up to diamond finish, grinding up to (80-grit finish and 600-grit finish) and grit blasted. The diamond finish sample showed more weight gain than others, and higher weight gain was observed in the initial oxidation stage. Attributed to different surface preparations leads to defects at different levels, which further alters the diffusion of various elements. The diamond finish sample showed the presence of Cr-rich oxides, and other samples showed the presence of Fe-rich oxides. Smooth surfaces promoted the formation of thick protective oxide scales.

A simple picowatt 7.6 ppm/°C, 0.029 %/V line sensitivity fully-CMOS voltage reference with DIBL cancelation

In this paper, a 4-transistor sub-one-volt voltage reference with picowatt power consumption is presented. To achieve ultra-low power consumption and low-voltage operation, all transistors are designed to operate in subthreshold region. By proper design of the circuit, DIBL effect is also compensated to enhance temperature coefficient of the circuit and line sensitivity. The proposed circuit consists of only four different transistors (i.e. thick oxide, native VTH, medium VTH) in a self-biased scheme such that eliminates the need for any start-up circuit. A prototype of the proposed circuit that generates a 341-mV voltage reference is designed and simulated in a standard 0.18-µm CMOS technology. The proposed reference circuit exhibits an average temperature coefficient of 7.6 ppm/°C across all process corners while the total power consumption is as low as 249 picowatt. The average line sensitivity of the circuit is 0.029 %/V within a wide supply range of 0.6 to 3.3 V. Ultra-low power consumption and line sensitivity, and excellent thermal stability render it ideal for integration into RFID and IoT applications.

Tunnel silicon oxynitride phase transformation for n-type polysilicon passivating contacts in crystalline silicon solar cells

The study investigates the fabrication and characterization of tunnel oxynitride (TON) layers produced using Plasma-Enhanced Chemical Vapor Deposition (PECVD) at different pressure and power variations. The aim is to explore TON layers as potential substitutes for conventional SiO2 in Tunnel Oxide Passivated Contact (TOPCon) solar cells. Foe this purpose, an effective oxide thickness (EOT) of 1.1–1.2 nm and 1.5–1.6 nm has been achieved by treating the TON samples with NH3 and N2 gas plasma, respectively. Fourier Transform Infrared Spectroscopy (FTIR) analysis revealed critical variations in the chemical bonding within TON layers, which exhibit different properties based on the deposition conditions. The presence of nitrogen-nitrogen and nitrogen–hydrogen bonds is prominently influenced by changes in the PECVD parameters, directly affecting the layer’s optical and electronic properties. Notably, the presence of hydroxyl (O–H) and amino (NH2) groups within the TON structure suggests an improvement in surface passivation, essential for optimizing solar cell performance and durability. A lifetime of 737 and 823 μs has been recorded for N2 and NH3 samples, compared to the NAOS 710 μs reference sample. NH3 plasma-treated samples show an improved iVoc of 736 mV, indicating better phase transformation and passivation quality than N2 plasma treatment and the NAOS reference sample.

Effect of H2S on the corrosion behavior of austenitic and martensitic steels in supercritical CO2 at 550 °C and 20 MPa for Brayton cycle system

Corrosion of alloy materials significantly influences the stability and efficiency of the supercritical carbon dioxide (S-CO2) Brayton cycle. In this study, we investigated the corrosion behavior of the austenitic alloy SP2215 and the martensitic alloy X19CrMoNbVN11-19 (X19) in S-CO2 at 550°C and 20 MPa. The effect of impurities, H2S, on corrosion behavior was studied. After 900 hours, SP2215 formed a 1.1 μm thick oxide layer (Cr2O3). X19 formed a loose and porous double oxide layer of 4.1 μm (outer: Fe3O4, inner: FeCr2O4). After H2S doping, SP2215 had an oxide layer of 6.2 μm (FeS, SiO2, and Cr2O3), while X19 was 9.8 μm (outer: Fe3O4, SiO2, FexSy and Fe2O3, inner: FeCr2O4, Fe2SiO4 and Cr2S3). Metal sulfides formed and the corrosion layer thickened. This indicates that H2S not only changes the corrosion mechanism but also aggravates the corrosion. However, the corrosion of CO2 is dominant. SP2215 has better corrosion resistance than X19.

Controlling the digital-to-analog switching in HfO2-based memristors via modulating the oxide thickness

The HfO2-based memristors have been acknowledged as a highly potential candidate for nonvolatile memory and neuromorphic computing applications. However, the analog resistive switching behavior of the HfO2-based memristors still needs improvement. In this work, Cu/HfO2/Pd devices with different oxide layer thicknesses were prepared by the magnetron sputtering process. The resistance switching characteristics related to oxide layer thickness were explored, revealing significant differences in the forming, SET, and RESET characteristics depending on oxide thickness. The conduction mechanism of the Cu/HfO2/Pd memristors is mainly attributed to the space charge limited current (SCLC) model. Thinner devices tend to show a more abrupt SET behavior and larger SET voltage, while thicker devices exhibit more gradual SET behavior and a lower SET voltage. In addition, as the thickness of the oxide layer increases, the Cu/HfO2/Pd memristors transition from digital resistive switching to analog resistive switching. The formation and rupture of oxygen vacancy filaments are predominant in thicker device, and the shape of the conduction filaments has been proposed as responsible for the abrupt and gradual changes in resistive switching. This work demonstrates that the thickness of the oxide layer plays an important role in engineering digital logic and neuromorphic behavior in HfO2-based memristors.

Effects of Size and Mechanical Pre-Treatment on Aluminium Recovery from Municipal Solid Waste Incineration Bottom Ash

Municipal solid waste (MSW) is incinerated to reduce the volume and recover energy and materials. The generation of MSW has been increasing over the past few decades due to the increase in population and changing consumption habits. Rising environmental and economic concerns have increased the importance of waste treatment and recovery. Currently, MSW may take three alternate or parallel routes: direct recycling, incineration, or landfill, depending on the country and location. MSW incineration has three products in addition to energy: bottom ash, fly ash, and off-gas. After incineration, bottom ash usually still contains many materials to be recovered, such as glass, ceramics, and metals with a degree of oxidation. This study focuses on aluminium recovery from MSW incineration bottom ash from two different countries. The 2–30 mm fraction of aluminium particles was characterized in terms of its size, shape, and oxide thickness, and its effects on aluminium recovery were investigated. In addition, the ability of mechanical pre-treatment to remove oxides prior to melting was studied. The results were compared with the analytical modeling developed in this study. An increasing particle size and surface area resulted in an increase in aluminium recovery. Mechanical pre-treatment increased the yield for smaller particles to a larger extent than larger particles due to the difference in the oxide/metal ratio.

Impact of source/drain lateral straggle on GIDL current of low SS NC-FinFET

ABSTRACT In this paper, the gate-induced drain leakage (GIDL) issue in negative capacitance (NC-FinFET) has been comprehensively addressed using Sentaurus 3-D TCAD simulations. Incorporation of ferroelectric (FE) materials in the gate stack of NC-FinFET increases with current by 12% compared to that of baseline FinFET. A steeper sub-threshold swing (SS) of 8 mV/dec is achieved at a FE-thickness of 5 nm at a lateral straggle; (σ) = 0 nm. GIDL behaviour with respect to the variation of source/drain σ and gate oxide thicknesses of NC-FinFET with and without the presence of the GateTunneling model is thoroughly investigated. Investigations demonstrate that in NC-FinFET, there are steeper energy band profiles near source/drain owing to coupling of fringing fields to the ferroelectric layer, which exhibits a larger and prior commencement of the longitudinal band to band tunnelling current compared to conventional FinFET. Moreover, the effect of variation of σ on various parameters viz. SS, capacitance and transconductance has also been investigated, which shows better results for lower σ values. At σ = 0 nm, drain-induced barrier lowering is −187.23 mV/V as compared to that of σ = 5 nm, which is −355.3 mV/V. Furthermore, we have also investigated drain current noise spectral density (SID) and gate voltage noise spectral density (SVG) with respect to fin width (WFIN) at the optimised σ value.

Ferroelectricity in Ultrathin HfO2-Based Films by Nanosecond Laser Annealing.

Nonvolatile memory devices based on ferroelectric HfxZr1-xO2 (HZO) show great promise for back-end integrable storage and for neuromorphic accelerators, but their adoption is held back by the inability to scale down the HZO thickness without violating the strict thermal restrictions of the Si CMOS back end of line. In this work, we overcome this challenge and demonstrate the use of nanosecond pulsed laser annealing (NLA) to locally crystallize areas of an ultrathin (3.6 nm) HZO film into the ferroelectric orthorhombic phase. Meanwhile, the heat induced by the pulsed laser is confined to the layers above the Si, allowing for back-end compatible integration. We use a combination of electrical characterization, nanofocused scanning X-ray diffraction (nano-XRD), and synchrotron X-ray photoelectron spectroscopy (SXPS) to gain a comprehensive view of the change in material and interface properties by systematically varying both laser energy and the number of laser pulses on the same sample. We find that NLA can provide remanent polarization up to 2Pr= 11.6 μC/cm2 in 3.6 nm HZO, albeit with a significant wake-up effect. The improved TiN/HZO interface observed by XPS explains why device endurance goes beyond 107 cycles, whereas an identical film processed by rapid thermal processing (RTP) breaks already after 106 cycles. All in all, NLA provides a promising approach to scale down the ferroelectric oxide thickness for emerging HZO ferroelectric devices, which is key for their integration in scaled process nodes.