Oxide Lifetime Research Articles

Gate stack insulator breakdown when the interface layer thickness is scaled toward zero

To fully profit from the advantages of high-K materials in metal-oxide-semiconductor gate insulator stacks, the reduction in the silicon oxide interfacial layer thickness is being pursued. In the framework of the percolation model, we explore the effects of reducing the interfacial layer thickness on the dielectric breakdown of the gate stack. If the reduction in interface layer thickness is performed at constant equivalent oxide thickness, a significant improvement of oxide lifetime is predicted. Our results also suggest that it is possible to scale the equivalent oxide thickness without degrading the breakdown-related reliability.

EEPROM tunnel oxide lifetime reliability prediction based on fast electrical stress tests

It is shown how floating gate memory cell behaviour during retention tests can be predicted relying on static electrical stress tests. Retention tests are usually performed at high or low temperature bake to provide warning of an impending failure of the capability of memory cells to store data. These tests are very useful to screen out defective cell populations but induce significant test time overhead. To overcome this limitation, a correlation between stress time and retention time is established to anticipate retention test results. Experimental results based on an EEPROM test chip are presented in order to show the correlation between retention tests and electrical stress tests.

Effect of superalloy substrate and bond coating on TBC lifetime

Several different single-crystal superalloys were coated with different bond coatings to study the effect of composition on the cyclic oxidation lifetime of an yttria-stabilized zirconia (YSZ) top coating deposited by electron beam physical vapor deposition from a commercial source. Three different superalloys were coated with a 7 μm Pt layer that was diffused into the surface prior to YSZ deposition. One of the superalloys, N5, was coated with a low activity, Pt-modified aluminide coating and Pt-diffusion coatings with 3 and 7 μm of Pt. Three coatings of each type were furnace cycled to failure in 1 h cycles at 1150 °C to assess average coating lifetime. The 7 μm Pt diffusion coating on N5 had an average YSZ coating lifetime > 50% higher than a Pt-modified aluminide coating on N5. Without a YSZ coating, the Pt-modified aluminide coating on N5 showed the typical surface deformation during cycling, however, the deformation was greatly reduced when constrained by the YSZ coating. The 3 μm Pt diffusion coating had a similar average lifetime as the Pt-modified aluminide coating but a much wider scatter. The Pt diffusion bond coating on superalloy X4 containing Ti exhibited the shortest YSZ coating lifetime, this alloy-coating combination also showed the worst alumina scale adhesion without a YSZ coating. The third generation superalloy N6 exhibited the longest coating lifetime with a 7 μm Pt diffusion coating.

Impact of Oxidation Conditions and Surface Defects on the Reliability of Large-Area Gate Oxide on the C-Face of 4H-SiC

This paper discusses the issues regarding reliability of large-area (up to 25mm2) gate oxide on the C-face of 4H-SiC. We have shown that the TDDB characteristics of large-area gate oxide improved by separating gate oxidation processes into oxide growth by dry-oxidation and successive interface control by anneal in N2O ambient or that by wet-oxidation followed by anneal in H2 ambient. In particular, dry-oxidation followed by anneal in N2O ambient for interface treatment (dry+N2O process) is effective for the suppression of the random failure in TDDB characteristics. The estimated lifetime of gate oxide of less than 9mm2 by the dry+N2O process is six-digits larger than 30 years. In the case of the TDDB characteristics of 25mm2 gate oxide grown by the dry+N2O process, the initial and random failure in TDDB characteristics is dominant. However, even in this case, we have confirmed that the evaluated lifetime of 25mm2 gate oxide is more than 30 years. In order to clarify the mechanism of the degradation of the TDDB characteristics of large-area gate oxide, we examined the effect of the surface defect on the TDDB characteristics by observing the surface of each broken MOS capacitor after the TDDB test. We have found following results. (1) The initial failures in TDDB characteristics are mainly due to surface defects such as “down fall”, “comet”, and “triangular defect”. (2) The footprints of random failure do not correspond to the positions of smaller surface defects such as “bump”. Finally, we have found that the quality of the epitaxial layer affects random failure rate in the TDDB characteristics of large area gate oxide; the random failure in the TDDB characteristics of 25mm2 gate oxide on epitaxial layer grown by a certain epitaxial vendor is almost suppressed. However, the cause of the difference in TDDB characteristics is not identified.

Effective Rate Constants and Uptake Coefficients for the Reactions of Organic Molecular Markers (n-Alkanes, Hopanes, and Steranes) in Motor Oil and Diesel Primary Organic Aerosols with Hydroxyl Radicals

Hydroxyl radical (OH) uptake by organic aerosols, followed by heterogeneous oxidation, happens nearly at the collision frequency. Oxidation complicates the use of organic molecular markers such as hopanes for source apportionment, since receptor models assume markers are stable during transport. We report the oxidation kinetics of organic molecular markers (C(25)-C(32) n-alkanes, hopanes and steranes) in motor oil and primary organic aerosol emitted from a diesel engine at atmospherically relevant conditions inside a smog chamber. A thermal desorption aerosol gas chromatograph/mass spectrometer (TAG) and Aerodyne high resolution time-of-flight aerosol mass spectrometer (HR-ToF-AMS) were used to measure the changes in molecular comosition and bulk primary organic aerosol. From the measured changes in molecular composition, we calculated effective OH rate constants, effective relative rate constants, and effective uptake coefficients for molecular markers. Oxidation rates varied with marker volatility, with more volatile markers being oxidized at rates much faster than could be explained from heterogeneous oxidation. This rapid oxidation can be explained by significant gas-phase OH oxidation that dominates heterogeneous oxidation, resulting in overall oxidation lifetimes of 1 day or less. Based on our results, neglecting oxidation of molecular markers used for source apportionment could introduce significant error, since many common markers such as norhopane appear to be semivolatile under atmospheric conditions.

Reactivity of oleic acid in organic particles: changes in oxidant uptake and reaction stoichiometry with particle oxidation

The heterogeneous reaction of ozone with oleic acid has been studied extensively as a simple model system for investigating the oxidation of organic compounds in atmospheric particles. In this work, we simultaneously quantify oleic acid and ozone decay during three stepwise oxidation events, allowing us to quantify reactivity of oleic acid throughout the oxidative lifetime of initially pure particles. Throughout their lifetime, uptake in these particles is driven by reaction, as evidenced by similar timescales for ozone and oleic acid decay. The oleic acid decay rate slows with increasing particle oxidation, most likely due to the continued dilution of the particles with oxidation products. However, the initial stoichiometry is as high as 3.75 oleic acid molecules destroyed per ozone molecule lost. This significantly exceeds the 2:1 ratio that can be explained by an initial ozonolysis reaction and known secondary chemistry between the Criegee intermediate and the organic acid moiety. It implies that there is additional, previously unrecognized secondary chemistry that likely involves the carbon backbone. Our understanding of reactivity, even in this simple system, remains incomplete.

TDDB Measurement of Gate SiO<sub>2</sub> on 4H-SiC Formed by Chemical Vapor Deposition

The reliability of CVD gate oxide was investigated by CCS-TDDB measurement and compared with thermally grown gate oxide. Although the QBD of thermal oxide becomes smaller for the larger oxide area, the QBD of CVD oxide is almost independent of the investigated gate oxide area. The QBD at F = 50% of CVD oxide, 3 C/cm2, is two orders of magnitude larger for the area of 1.96×10-3 cm2 at 1 mA/cm2 compared to that of thermal oxide. More than 80% of the CVD oxide breakdown occurs at the field oxide edge and more than 70% of the thermal oxide breakdown in the inner gate area. These results suggest that the lifetime of CVD oxide is hardly influenced by the quality of SiC, while the defects and/or impurities in SiC affect the lifetime of thermally grown oxide.

NMOSFET의 제조를 위한 습식산화막과 질화산화막 특성에 관한 연구

본 논문에서는 핫 케리어 효과, 항복전압 전하, 트랜지스터 Id Vg 특성곡선, 전하 트래핑, SILC와 같은 특성들을 비교하기 위하여 HP 4145 디바이스 테스터를 사용하여 습식 산화막과 질화 산화막으로된 <TEX>$0.2{\mu}m$</TEX> NMOSFET를 만들어 측정하였다. 그 결과 질화 산화막으로 만들어진 디바이스가 핫 케리어 수명(질화 산화막은 30년 이상인 반면에 습식 산화막 소자는 0.1년임), Vg의 변화, 항복전압, 전계 시뮬레이션, 전하 트래핑면에서도 습식 산화막 소자보다 우수한 결과를 얻을 수 있었다. In this paper we fabricated and measured the <TEX>$0.26{\mu}m$</TEX> NMOSFET with wet gate oxide and nitride oxide gate to compare that the charateristics of hot carrier effect, charge to breakdown, transistor Id_Vg curve, charge trapping, and SILC(Stress Induced Leakage Current) using the HP4145 device tester. As a result we find that the characteristics of nitride oxide gate device better than wet gate oxide device, especially hot carrier lifetime(nitride oxide gate device satisfied 30 years, but the lifetime of wet gate oxide was only 0.1 year), variation of Vg, charge to breakdown, electric field simulation and charge trapping etc.

Strained Si/SiGe MOS technology: Improving gate dielectric integrity

Strained Si is recognised as a necessary technology booster for the nanoelectronics regime. This work shows that high levels of stress attainable from globally strained Si/SiGe platforms can benefit gate leakage and reliability in addition to MOSFET channel mobility. Device self-heating due to the low thermal conductivity of SiGe is shown to be the dominating factor behind compromised performance gains in short channel strained Si/SiGe MOSFETs. Novel thin virtual substrates aimed at reducing self-heating effects are investigated. In addition to reducing self-heating effects, the thin virtual substrates provide further improvements to gate oxide integrity, reliability and lifetime compared with conventional thick virtual substrates. This is attributed to the lower surface roughness of the thin virtual substrates which arises due to the reduced interactions of strain-relieving misfit dislocations during thin virtual substrate growth. Good agreement between experimental data and physical models is demonstrated, enabling gate leakage mechanisms to be identified. The advantages and challenges of using globally strained Si/SiGe to advance MOS technology are discussed.

Reliability of ultra-thin titanium dioxide (TiO 2) films on strained-Si

Ultra-thin high-k titanium oxide (equivalent oxide thickness ~ 2.2 nm) films have been deposited on strained-Si/relaxed-Si 0.8Ge 0.2 heterolayers using titanium tetrakis iso-propoxides (TTIP) as an organometallic source at low temperature (< 200 °C) by plasma enhanced chemical vapor deposition (PECVD) technique in a microwave (700 W, 2.45 GHz) plasma cavity discharge system at a pressure of 66.67 Pa. The trapping/detrapping behavior of charge carriers in ultra-thin TiO 2 gate dielectric during constant current (CCS) and voltage stressing (CVS) has been investigated. Normalized trapping centroid and trapped charge density variation with injected fluences have been investigated and also empirically modeled. Oxide lifetime is predicted using empirical reliability model developed. Dielectric breakdown and reliability of the dielectric films have been studied using constant voltage stressing. A high time-dependent dielectric breakdown (TDDB, t bd > 1000 s) is observed under high constant voltage stress.

Monte Carlo Based Weibull Lifetime Uncertainty Calculations and Statistical Comparison of Semiconductor Manufacturing Process Module Changes for Lifetime Improvement

Weibull statistics are used in generation of gate oxide lifetimes from time dependent dielectric breakdown (TDDB) data. However, error bounds for the Weibull generated predicted lifetimes are not usually presented. Statistical methods to judge the impact of process improvements on Weibull lifetimes are also presented. Each of three electric fields was used to generate 1000 points point sets with probability of occurrence determined from a fixed, known underlying distribution. This distribution represents a population of points with a Weibull distribution. From the 1000 points, a sample of 10 to 25 points was randomly selected for each of the three applied electric fields. The subset of points were placed in rank order, and analyzed using the Maximum Likelihood procedure. These steps were repeated to obtain Monte Carlo based statistical information about the impact of sample size on our knowledge of the population. Additionally, similar methods were used to determine the experimental design required to statistically valid information regarding the impact of process changes on gate oxide lifetime.

Advanced Plasma and Advanced Gate Dielectric—A Charging Damage Prospective

Current status of plasma charging damage is assessed. The impact of wide adaptation of high density plasma in IC processing to charging damage is examined for advanced CMOS technology where ultrathin gate oxide is used. The issue of measurement is high-lighted. The resulting misconception of plasma charging damage is no longer a problem when gate oxide is ultrathin is explained as a result of measurement difficulty as well as previously unexpected longer oxide lifetime.

A Study on the Reliability and Stability of High Voltage 4H-SiC MOSFET Devices

Gate oxide reliability measurements of 4H-SiC DMOSFETs were performed using the Time Dependent Dielectric Breakdown (TDDB) technique at 175°C. The oxide lifetime is then plotted as a function of the electric field. The results show the projected oxide lifetime to be &gt; 100 years at an operating field of ~3 MV/cm. Device reliability of 2.0 kV DMOSFETs was studied by stressing the gate with a constant gate voltage of +15 V at a temperature of 175°C, and monitoring the forward I-V characteristics and threshold voltage for device stability. Our very first measurements show very little variation between the pre-stress and post-stress conditions up to 1000 hrs of operation at 175°C. In addition, forward on-current stressing of the MOSFETs show the devices to be stable up to 1000 hrs of operation.

Gate oxide reliability in an integrated metal-oxide-semiconductor field-effect transistor-microelectromechanical system technology

We have demonstrated a simple technique for building n-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) and complex micromechanical systems simultaneously instead of serially, allowing a more straightforward integration of complete systems. The fabrication sequence uses few additional process steps and only one additional masking layer compared with a microelectromechanical system (MEMS)-only technology, but exposes the MOSFET gate oxide to the extreme temperatures of MEMS processing. We find that the high-temperature MEMS anneals can greatly change the current-voltage characteristics of the SiO2 gate oxide film. Defects are introduced by the high-temperature processing which result in considerable positive-charge trapping at short times that leads to increased currents using high bias fields and short bias times. At longer times, the current across the oxide decays as 1/time suggesting electron traps that are uniformly distributed in the bulk of the oxide. A traditional reliability evaluation of the thick oxides using time-dependent dielectric breakdown is greatly hampered by excessive impact ionization that occurs at high gate voltages. This makes a rigorous evaluation of gate oxide lifetime at use fields difficult. We do note that while the current below breakdown is altered by the positive-charge trapping, the voltages at breakdown seen in ramps are not severely impacted by the high-temperature annealing. Breakdown voltages of films annealed at the highest of the temperatures studied here are about the same as those of unannealed films. The breakdown fields of these stressed oxides are 10–11MV∕cm, suggesting that reliable SUMMiT™ field-effect transistor process gate oxides can be fabricated as long as the use voltage is well below the onset for impact ionization.

Photochemical generation and 1H NMR detection of alkyl allene oxides in solution

Irradiation of substituted 5-alkyl-4,5-epoxyvalerophenones leads to the formation of alkyl allene oxides that, in some cases, are sufficiently long-lived to be detected at room temperature by 1H NMR spectroscopy. Absolute lifetime measurements show that the size of the alkyl group has a significant influence on the reactivity of the allene oxide, with tert-butyl allene oxide having a lifetime of 24 h in CD3CN at room temperature that is considerably longer than the 1.5 h lifetime of the ethyl allene oxide. The allene oxides react rapidly with water to give α-hydroxyketones. The mechanism involves nucleophilic attack to the epoxide carbon to give an enol, which can also be detected as an intermediate by 1H NMR spectroscopy.Key words: allene oxides, mechanisms, absolute reactivity, kinetics, photochemistry.

Reliability for Recessed Channel Structure n-MOSFET

Recessed channel (Rch) structure n-MOSFET has been stressed under hot carrier injected condition and constant voltage stress (CVS). The degraded data are compared with planar channel (Pch) structure. We discuss difference of hot carrier (HC) degradation and oxide lifetime, which can be explained by the electrical field suppression and gate oxide thickness (tox) reduction in recessed channel area.

Hydrogen-related influence of the metallization stack on characteristics and reliability of a trench gate oxide

We discuss influences of the metallization / passivation stack on the 30 nm thick gate oxide of a trench DMOS. A variation in the metallization stack directly influences the gate oxide lifetime, but also the transfer characteristics of the device and the interface trap density revealed by charge-pumping measurements. Surprisingly, a better anneal of the Si-SiO2 interface and the bulk-oxide, resulting in a smaller measured interface-trap density on virgin wafers, implies a reduced GOX reliability. These effects are attributed to the release of reactive hydrogen from PECVD deposited silicon-nitride layers.

Erratum to “The effect of carbon and reactive element dopants on oxidation lifetime of FeAl” [Scripta Mater. 52 (2005) 1199–1204

Erratum to “The effect of carbon and reactive element dopants on oxidation lifetime of FeAl” [Scripta Mater. 52 (2005) 1199–1204

Hot-carrier degradation characteristics and explanation in 0.25 μm PMOSFETs

The hot-carrier effect (HCE) of deep-submicron PMOSFETs has been investigated. It is found that the HCE includes both generation of interface states and formation of positive fixed charges in the gate oxide. We present experimental evidences showing that two degradation mechanisms are important in the case of deep-submicron PMOSFETs. Firstly, the generation of positive fixed oxide charges is significant in the case of deep-submicron PMOSFETs, which degrades the threshold voltage and even limits the transistor lifetime. For advanced analogy and mixed signal applications, process and device reliability limits need to be set up based also on threshold voltage shift, in addition to traditional methods of the transconductance degradation or gate oxide lifetime. Secondly, the generation of interface states by holes influences the device characteristics. Some speculation on the HCE formation process is included.

Effects of N&lt;sub&gt;2&lt;/sub&gt;O Anneal on Channel Mobility of 4H-SiC MOSFET and Gate Oxide Reliability

The effect of N2O anneal on channel mobility of inversion-type 4H-SiC n-channel MOSFET has been systematically investigated. It is found that the mobility increases with increasing anneal temperature from 900 to 1150°C. The highest field effect mobility of 30 cm2/Vs is achieved by 1150°C anneal for 3 h, which is about 20 times higher than that for non-annealed MOSFET. In order to investigate the oxide reliability, TDDB measurement has been performed on SiO2 grown on n-type 4H-SiC. The oxide lifetime is found to be drastically improved by N2O anneal.