Output Word Research Articles

A Digital Frequency-Locked Loop System for Capacitance Measurement

Similar to phase-locked loops, frequency-locked loops (FLLs) are useful in many applications involving waveform synchronization or synthesis. Simple logic circuit-based relaxation oscillators convert capacitance to frequency, which is a characteristic inverse relationship between output frequency and input capacitance. The oscillator's logic level square-wave output can be fed into an all-digital FLL that will frequency lock to the input signal and produce a digital output word <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N</i> , where <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N</i> is inversely proportional to the input frequency. The result is that <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N</i> is linearly proportional to the unknown capacitance in the oscillator. This novel approach allows a simple FFL implementation for capacitance measurement and is demonstrated in hardware using a capacitive sensor that measures the mass of small quantities of water with an output capacitance range of 75-185 pF.

A 10-b Ternary SAR ADC With Quantization Time Information Utilization

The design of a ternary successive approximation (TSAR) analog-to-digital converter (ADC) with quantization time information utilization is proposed. The TSAR examines the transient information of a typical dynamic SAR voltage comparator to provide accuracy, speed, and power benefits. Full half-bit redundancy is shown, allowing for residue shaping which provides an additional 6 dB of signal-to-quantization-noise ratio (SQNR). Synchronous quantizer speed enhancements allow for a shorter worst case conversion time. An increased monotonicity switching algorithm, stage skipping due to reference grouping, and SAR logic modifications minimize overall dynamic energy. The architecture has been shown to reduce capacitor array switching power consumption and digital-to-analog converter (DAC) driver power by about 60% in a mismatch limited SAR, reduce comparator activity by about 20%, and require only 8.03 average comparisons and 6.53 average DAC movements for a 10-b ADC output word. A prototype is fabricated in 0.13-μm CMOS employing on-chip statistical time reference calibration, supply variability from 0.8 to 1.2 V, and small input signal power scaling. The chip consumes 84 μ W at 8 MHz with an effective number of bits of 9.3 for a figure of merit of 16.9 fJ/C-S for the 10-b prototype and 10.0 fJ/C-S for a 12-b enhanced prototype chip.

Parameterizing by the Number of Numbers

The usefulness of parameterized algorithmics has often depended on what Niedermeier has called “the art of problem parameterization”. In this paper we introduce and explore a novel but general form of parameterization: the number of numbers. Several classic numerical problems, such as Subset Sum, Partition, 3-Partition, Numerical 3-Dimensional Matching, and Numerical Matching with Target Sums, have multisets of integers as input. We initiate the study of parameterizing these problems by the number of distinct integers in the input. We rely on an FPT result for Integer Linear Programming Feasibility to show that all the above-mentioned problems are fixed-parameter tractable when parameterized in this way. In various applied settings, problem inputs often consist in part of multisets of integers or multisets of weighted objects (such as edges in a graph, or jobs to be scheduled). Such number-of-numbers parameterized problems often reduce to subproblems about transition systems of various kinds, parameterized by the size of the system description. We consider several core problems of this kind relevant to number-of-numbers parameterization. Our main hardness result considers the problem: given a non-deterministic Mealy machine M (a finite state automaton outputting a letter on each transition), an input word x, and a census requirement c for the output word specifying how many times each letter of the output alphabet should be written, decide whether there exists a computation of M reading x that outputs a word y that meets the requirement c. We show that this problem is hard for W[1]. If the question is whether there exists an input word x such that a computation of M on x outputs a word that meets c, the problem becomes fixed-parameter tractable.

Error-Pattern-Correcting Cyclic Codes Tailored to a Prescribed Set of Error Cluster Patterns

A new class of cyclic codes is discussed which is highly tailored to a prescribed set of dominant error cluster patterns. The cyclic code construction is based on a generator polynomial that produces a distinct syndrome set for each error pattern in the target set. By tailoring the generator polynomial specifically to the set of dominant error patterns, the code becomes highly effective in handling single and multiple occurrences of dominant error patterns at a very high code rate. A list decoding strategy based on a set of test word-error events is developed for the proposed codes, which efficiently utilizes both the algebraic information from the captured syndrome and the reliability measures provided by the local correlators matched to the dominant error patterns. By forcing a decoder to correct a single-pattern event for each test input word, multiple decoders running in parallel on the list of test words can effectively correct multiple error-pattern occurrences within the channel detector output word.

Cellular wave computer algorithms with spatial semantic embedding for handwritten text recognition

AbstractThe recognition of cursive handwritten texts is a complex, in some cases unsolvable, task. One problem is that in most cases it is difficult or impossible to identify each letter, even if the words are separated. In our new method, the identification of letters is not needed due to the extensive and iterative use of semantic and morphological information of a given language. We are using a spatial feature code, generated by a cellular nonlinear network (CNN) based cellular wave computer algorithm, and combine it with the linguistic properties of the given language. Most general‐purpose handwriting recognition systems lack the ability to integrate linguistic background knowledge because they use it only for post‐processing recognition results. The high‐level a priori background knowledge is, however, crucial in human reading and similarly it can boost recognition rates dramatically in case of recognition systems. In our new system we do not treat the visual source as the only input: geometric and linguistic information are given equal importance. On the geometric side we use word‐level holistic feature detection without letter segmentation by analogic CNN algorithms designed for cellular wave computers (IEEE Trans. Circuits Syst. 1993; 40:163–173; Cellular Neural Networks and Visual Computing, Foundations and Applications. Cambridge University Press: Cambridge, U.K., New York, 2002). The linguistic side is based on a morpho‐syntactic linguistic system (Proceedings of COLING‐2002, vol. II, Taipei, Taiwan, 2002; 1263–1267). A novel shape coding method is used to interface them, and their interaction is enhanced via an inverse filtering technique based on features that are global or of a low confidence value. A statistical context selection method is also applied to further reduce the output word lists. Copyright © 2008 John Wiley &amp; Sons, Ltd.

Resulted word counts optimization—A new approach for better automatic image annotation

One of major problems in image auto-annotation is the difference between the expected word counts vector and the resulted word counts vector. This paper presents a new approach to automatic image annotation—an algorithm called resulted word counts optimizer which is an extension to existing methods. An ideal annotator is defined in terms of recall quality measure. On the basis of the ideal annotator an optimization criterion is defined. It allows to reduce the difference between resulted and expected word counts vectors. The proposed algorithm can be used with various image auto-annotation algorithms because its generic nature. Additionally, it does not increase the computational complexity of the original annotation method processing phase. It changes output word probabilities according to a pre-calculated vector of correction coefficients.

Partial error tolerance for bit-plane FIR filter architecture

Whereas some applications require correct computation many others do not. A large domain where perfect functional performance is not always required is multimedia and DSP systems. Relaxing the requirement of 100% correctness for devices and interconnections may dramatically reduce costs of manufacturing, verification, and testing. The goal of this paper is to develop a method for trading computational correctness for an additional chip area involved by fault-tolerance implementation. The method is demonstrated for the BP array in the following way: only the most significant bits of the output word are made fault-tolerant. By introducing the concept of partially error-tolerant BP array, designers achieve one more degree of tradeoff freedom. Formal definitions of the proposed terms are given. A mathematical path based on transitive closure that generates an error significance map for the BP array is proposed. The design tradeoff is demonstrated through FPGA implementation. The achieved area savings are presented as a function of a number of most significant fault-tolerant bits.

On the Stabilization of Linear Systems Under Assigned I/O Quantization

This paper is concerned with the stabilization of discrete-time linear systems with quantization of the input and output spaces, i.e., when available values of inputs and outputs are discrete. Unlike most of the existing literature, we assume that how the input and output spaces are quantized is a datum of the problem, rather than a degree of freedom in design. Our focus is hence on the existence and synthesis of symbolic feedback controllers, mapping output words into the input alphabet, to steer a quantized I/O system to within small invariant neighborhoods of the equilibrium starting from large attraction basins. We provide a detailed analysis of the practical stabilizability of systems in terms of the size of hypercubes bounding the initial conditions, the state transient, and the steady-state evolution. We also provide an explicit construction of a practically stabilizing controller for the quantized I/O case.

Output position and word relatedness effects in a DRM paradigm: Support for a dual-retrieval process theory of free recall and false memories

Five experiments investigated predictions—derived from a dual-retrieval process approach to free recall (Brainerd, C. J., Wright, R., Reyna, V. F., & Payne, D. G. (2002). Dual-retrieval processes in free and associative recall. Journal of Memory and Language, 46, 120–152.)—about false memories in a DRM-like paradigm. In all the experiments, the presence of the critical words in the study lists was manipulated within subjects. In all the experiments, the output position of presented critical words was earlier than the output position of nonpresented critical words and the output positions of both types of words was closer to the center than to the ends of the recall protocols. In Experiments 2–5, unrelated words were intermixed with related words in the study lists. In all of these experiments, recall of related words was greater than recall of unrelated words. However, in Experiments 4 and 5, the advantage for recall of related words was greater after the critical item was output than before it was output. These findings were consistent with the notions that: (1) there are two successive retrieval processes (direct access of verbatim traces and reconstruction from gist traces) in free recall, (2) items are recalled in ascending order of strength during direct access and descending order of strength during reconstruction from gist, and (3) false memories for words are attributable to reconstruction from gist traces.

Changes in argument structure in the course of derivation in Hungarian

For all types of derivation characterised as productive by Kiefer (2000), the original version of Model Tau (Alberti 1997), dealing only with verbal derivation coming with no category change, can be extended to the entire spectrum of derivations; moreover, it can be extended in a straightforward way: the single novel factor is the central case frame peculiar to particular word categories. For instance, if the predicator is a noun, what corresponds to the case frame <Nom, Acc≯ in the sphere of verbs, is the case frame <Nom, Poss≯; this mapping is immediately observable in the case of -ÓjA (Laczkó 2005a), a suffix forming nouns in an argument-structure retaining way (elcsábít 'seduce' -≯ elcsábítója '(someone's) seducer'). The case frame characteristic of the output word category supplies an upper limit, within which the actual realization can belong to five types that precisely coincide with the five basic types of category-preserving verbal (and participial) derivation discussed Alberti (1997). How can these five basic types be derived? The crucial factor of each argument-structure transition is "advancement" of an argument (parallel with the "degradation" of another argument) in a sense that can be precisely defined in Model Tau.

Fixed-Point Configurable Hardware Components

To reduce the gap between the VLSI technology capability and the designer productivity, design reuse based on IP (intellectual properties) is commonly used. In terms of arithmetic accuracy, the generated architecture can generally only be configured through the input and output word lengths. In this paper, a new kind of method to optimize fixed-point arithmetic IP has been proposed. The architecture cost is minimized under accuracy constraints defined by the user. Our approach allows exploring the fixed-point search space and the algorithm-level search space to select the optimized structure and fixed-point specification. To significantly reduce the optimization and design times, analytical models are used for the fixed-point optimization process.

Generation and perception of F0 markedness for communicative speech synthesis

Aiming at natural F 0 control for conversational speech synthesis using attributes of constituent output words, F 0 characteristics are analyzed from both generation and perception viewpoints. We recorded commonly used two-phrase utterances consisting of Japanese adjective and adverb phrases expressing different degree of markedness under designed conversational situations, and compared their F 0 characteristics. The comparison showed the consistent F 0 control dependencies not only on adverbs themselves but also on the attribute of following adjective phrases. Strong positive or negative correlation is observed between the markedness of adverbs and F 0 height when an adjective phrase showing positiveness or negativeness is followed to the current adverb phrase. These consistencies have been perceptually confirmed by naturalness evaluation tests using the same two-phrase samples with different F 0 heights. Finally, a computational model of conversational F 0 control is proposed using lexical information of adjectives showing positiveness or negativeness and adverbs expressing markedness. F 0 estimation experiments quantitatively showed the possibility of F 0 control for natural conversational speech synthesis using the attribute of constituent output words.

A new time distributed DCT architecture for MPEG-4 hardware reference model

This paper presents the design of a new time distributed architecture (TDA) which outlines the architecture (ISO/IEC JTC1/SC29/WG11 MPEG2002/M8565) submitted to MPEG4 Part9 committee and included in the ISO/IEC JTC1/SC29/WG11 MPEG2002/9115N document. The proposed TDA optimizes the two-dimensional discrete cosine transform (2-D-DCT) architecture performance. It uses a time distribution mechanism to exploit the computational redundancy within the inner product computation module. The application specific requirements of input, output and coefficients word length are met by scheduling the input data. The coefficient matrix uses linear mappings to assign necessary computation to processor elements in both space and time domains. The performance analysis shows performance savings in excess of 96% as compared to the direct implementation and more than 71% as compared to other optimized application specific architectures for DCT.

Do type and token effects reflect different mechanisms? Connectionist modeling of Dutch past-tense formation and final devoicing

In this paper, we show that both token and type-based effects in lexical processing can result from a single, token-based, system, and therefore, do not necessarily reflect different levels of processing. We report three Simple Recurrent Networks modeling Dutch past-tense formation. These networks show token-based frequency effects and type-based analogical effects closely matching the behavior of human participants when producing past-tense forms for both existing verbs and pseudo-verbs. The third network covers the full vocabulary of Dutch, without imposing predefined linguistic structure on the input or output words.

Modified Montgomery modular multiplication and RSA exponentiation techniques

Modified Montgomery multiplication and associated RSA modular exponentiation algorithms and circuit architectures are presented. These modified multipliers use carry save adders (CSAs) to perform large word length additions. These have the attraction that, when repeatedly used to perform RSA modular exponentiation, the (carry save) format of the output words is compatible with that required by the multiplier inputs. This avoids the repeated interim output/input format conversion, needed when previously reported Montgomery multipliers are used for RSA modular exponentiation. Thus, the lengthy and costly conventional additions required at each stage are avoided. As a consequence, the critical path delay and, hence, the data throughput rate of the resulting Montgomery multiplier architectures are also word length independent. The approach presented is based on a reformulation of the solution to modular multiplication within the context of RSA exponentiation. Two algorithmic variants are presented, one based on a five-to-two CSA and the other on a four-to-two CSA plus multiplexer. The practical application of the approach has been demonstrated by using this to design special purpose RSA processing units with 512-bit and 1024-bit key sizes. The resulting RSA units exhibit the highest data rates reported in the literature to date, reflecting the very low and word length independent critical path delay achieved.

PATTERN RECOGNITION APPROACHES FOR SPEECH-TO-SPEECH TRANSLATION

We propose a statistical approach to speech-to-speech translation that uses finite-state models in all levels. Acoustic hidden Markov models (HMMs) model the pronunciation of the input-language phonemes and words, while the input–output word mapping, along with the syntax of the output language, are jointly modeled by means a large stochastic finite-state transducer. This allows for a complete integration of all the models so that the translation process can be performed by searching for an optimal path of states through the integrated network. As in speech recognition, HMMs can be trained from an input-language speech corpus, and the translation model is learned automatically from a parallel (text) training corpus. This approach has been assessed in the framework of the EuTrans project, funded by the European Union. Extensive experiments have been carried out with speech-input translations from Spanish to English and from Italian to English in applications involving the interaction (by telephone) of a customer with the front desk of a hotel. A summary of the most relevant results is presented.

Inferring finite transducers

We consider the inference problem for finite transducers using different kinds of samples (positive and negative samples, positive samples only, and structural samples). Given pairs of input and output words, our task is to infer the finite transducer consistent with the given pairs. We show that this problem can be solved in certain special cases by using known results on the inference problem for linear languages.

On special properties of a composition of automata

We suggest algorithms for constructing models of a finite automaton which are new automata such that the equations describing the functioning of these models are consequences of the equations describing the functioning of the initial automaton. These new automata are constructed with the use of powers of the initial automaton and some additional functions on the output words. Applications of the results are related to the problem on determining the state of an automaton on the base of the input sequences and the corresponding output sequences.

On special properties of a composition of automata

We suggest algorithms for constructing models of a finite automaton which are new automata such that the equations describing the functioning of these models are consequences of the equations describing the functioning of the initial automaton. These new automata are constructed with the use of powers of the initial automaton and some additional functions on the output words. Applications of the results are related to the problem on determining the state of an automaton on the base of the input sequences and the corresponding output sequences.

Coded modulation schemes with turbo and list detection for high-order partial response channels

Structured Set Partition (SSP) of PR channel output words was proved to be a useful tool to increase linear densities when combined with multilevel concatenated coding. In this paper, we describe a method for constructing SSP's with good spectra of minimum Euclidean distances using multiple embedded linear subspaces and their cosets. Examples of some simple SSP precoders are provided. Bit-error-rate (BER) performances of various partial responses and multilevel modulation schemes are compared using bit-by-bit simulations. Partial responses are defined by the classical and modified target polynomials, while multilevel modulation schemes include (1) an SSP, (2) a set of conventional block codes with different error correcting capabilities, and (3) a variety of iterative decoders such as the List Trellis Decoder (LTD), the BCJR algorithm, and soft decoders for low-density parity check codes. Simulation results show that the ME/sup 2/PR4 channel with two iterations of LTD using only two paths in the list gives gains of 3.3 dB and 3.8 dB at BER 10/sup -6/ compared to the 16/17 (0,6/6) coded E/sup 2/PR4 channel for linear densities 2.5 and 3.0, respectively. The LTD scheme does not use soft decisions or additional distance-enhancing constraints, like d=1, maximum-transition-run (MTR), or quasi-MTR codes. An additional coding gain of 0.5-1.0 dB can be achieved by combining the BCJR algorithm (instead of LTD) with the soft decoding of low density parity check codes.