Output Current Variation Research Articles

Study of performance evaluation of various characteristics of a single phase full bridge inverter circuit using surrounded channel junctionless field effect transistor

This paper reports the characteristics study of a single phase full bridge power electronic inverter circuit with a new type of technology namely surrounded channel junctionless field effect transistor (SCJLFET) as a switch. The inverter circuit has been designed using mixed mode simulation platform of TCAD device simulator. The transient characteristics for various temperatures and work functions have been analysed. In the steady state analysis the output current and voltage variation with input voltage with various temperatures and work functions have been studied. The power factor variations with gate oxide thickness and dielectric constant of gate dielectric. The simulation and designing process along with pros and cons have been characterized. The SCJLFET would be one of the strongest participants for advanced power electronics technology as a switches, with various virtues of high-speed operation, low power consumption and low budget process integration. It has also been found that single phase full bridge inverter is giving best results when made using SCJLFET.

Fabrication of Flexible Double‐Gate Organic Thin Film Transistor For Tactile Applications

AbstractIn this work, the development of a flexible Double‐Gate (DG) organic thin film transistor (DG‐OTFT), and its employment is reported for the realization of multimodal tactile sensors. Due to the self‐encapsulation of the stacked DG architecture, highly stable organic transistors are obtained that show almost negligible degradation after 6 months. Moreover, such configuration is also very useful for the development of sensing devices. In the case, one of the two gates is used to bias and set the working point of the devices, whereas the second one is connected to a polyvinylidene fluoride(PVDF)‐capacitor, a pyro/piezoelectric material. It is demonstrated that the charge displacement induced by the PVDF capacitor due to an applied external pressure or due to a temperature variation led to a reproducible variation of the device's output current. Using this approach high‐performing multimodal tactile sensors are obtained with sensitivity to up to 241 nA N−1 and 442 nA °C−1 respectively.

An Integrated Charge Pump for Phase-Locked Loop Applications in Harsh Environments

Among all the functions that electronics currently perform, clock synthesis has a backbone role. Charge pump phase-locked loops (CP-PLL) are widely used to accomplish clock synthesis thanks to their versatility. One of the most critical parts of CP-PLLs is the charge pump, which greatly influences the system’s performance. Even though several high-performance charge pumps have been proposed in the past, with the quick spread of electronics in all the engineering fields, the design of such electronic devices has encountered several additional challenges dictated by external environmental conditions. Examples of these engineering sectors are space, aerospace, industrial, and automotive applications, where the charge pump has to face high environmental temperatures and radiation effects. As a consequence, its design and experimental characterization have to be performed to ensure reliability when operating in harsh conditions. However, to the best of the authors’ knowledge, no works in the literature have ever presented a complete charge pump design and characterization in such harsh environments. Therefore, to fill this gap, this paper presents a charge pump for PLL applications specifically designed to reach operating temperatures up to 200 °C and total ionizing dose levels up to 100 Mrad. All design choices have been experimentally verified and are discussed throughout the paper in detail. With the proposed design, we obtained an output current variation of less than 8% at 200 °C and less than 2.5% at 100 Mrad. As opposed to the CPs that can be found in the literature, these results were measured on silicon. The performed measurements confirm that the current variation at 200 °C is better than that of the state-of-the-art CPs operating at lower temperatures, which, moreover, were only simulated.

Broad-Range-Response Battery-Type All-in-one Self-Powered Stretchable Pressure-Sensitive Electronic Skin.

Highly sensitive self-powered stretchable electronic skins with the capability of detecting broad-range dynamic and static pressures are urgently needed with the increasing demands for miniaturized wearable electronics, robots, artificial intelligence, etc. However, it remains a great challenge to achieve this kind of electronic skins. Here, unprecedented battery-type all-in-one self-powered stretchable electronic skins with a novel structure composed of pressure-sensitive elastic vanadium pentoxide (V2 O5 ) nanowire-based porous cathode, elastic porous polyurethane /carbon nanotube/polypyrrole anode, and polyacrylamideionic gel electrolyte are reported. A new battery-type self-powered pressure sensing mechanism involving the output current variation caused by the resistance variation of the electrodes and electrolytes under external pressure is revealed. The battery-type self-powered electronic skins combining high sensitivity, broad response range (1.8Pa-1.5MPa), high fatigue resistance, and excellent stability against stretching (50% tensile strain) are achieved for the first time. This work provides a new and versatile battery-type sensing strategy for the design of next-generation all-in-one self-powered miniaturized sensors and electronic skins.

Circular Capacitive Coupler With Multilayer Interleaving for Stable Output

Capacitive power transfer (CPT) is able to utilize the benefits of electric field and offers an alternate wireless charging solution. However, the basic capacitive couplers usually suffer from the misalignment issue. The coupler parameter shift leads to dramatic output perturbation. In order to stabilize the output, three types of coupling (mutual, self, and cross) are defined to simplify the coupler structure evaluation, and a circular capacitive coupler (CCC) is optimized to stabilize the mutual coupling under various movements. Furthermore, the multilayer interleaving is applied the circular coupler to enhance the self-coupling and minimize the cross coupling. The final experiment implements a series compensated system with the proposed coupler. The output current variation is less the 3.5% within the charging area.

A Misalignment Tolerance and Lightweight Wireless Charging System via Reconfigurable Capacitive Coupling for Unmanned Aerial Vehicle Applications

This letter proposes a novel capacitive power transfer system for the unmanned aerial vehicles (UAVs) with lightweight in receivers and robust misalignment tolerance characteristics. The design and analysis of a reconfigurable capacitive coupler are presented at first. The transmitter adopts four rectangular copper plates, which can be reconfigured according to the landing positions and directions. The receiver includes two hollow cylindrical copper-foil sleeves wrapped at the bottom of UAV landing gears, thereby leading to the adaption of the UAV's structure and the tolerance to lateral-, longitudinal-, and angular misalignment. Then, simulation and prototype experiments are carried out to verify the proposal. The results show that the prototype has low leakage electric flux at the UAV fuselage and can deliver 212.1 W with a dc-to-dc efficiency of 82.5%. Especially the proposal allows UAV to be powered within ±0.76 A of output current variation for different landing positions and directions, and the system dc-to-dc efficiency variation is within ±1%.

Suppression of Ripples of Controllable Rectifiers for Power Supply of Magnetic Systems

A number of requirements are imposed on installations associated with regulated DC sources, including low voltage and current ripple in the load, as well as a wide range of output current variation. Such installations are traditionally made on controlled rectifiers or pulse-width converters in which voltage ripples are always present. The paper considers a method for reducing the voltage ripple of powerful rectifiers for powering magnetic systems based on the insertion of a compensating voltage equal in magnitude and opposite in phase to the ripple voltage into the load circuit. The possibility of using ripple compensators connected in parallel and in series with the load, as well as methods of obtaining a compensating voltage is shown. Methods for obtaining compensating voltage are given. In order to exclude the magnetization of the ripple compensator transformer, it is proposed to use several versions of the compensating transformer and the inclusion of ripple compensators. Practical schemes of passive compensators (with a demagnetizing circuit and a bifilar winding) are analyzed. The problem of developing ripple compensators for multiphase rectifiers, as well as ways to solve it, is considered. Practical recommendations for choosing a core material and calculating a transformer are given. On the basis of the presented theoretical and practical considerations for the design of the ripple compensators, simulation models have been developed in the Simulink pack-age of the MATLAB program. A technique for studying ripple compensators using the simulation models of a symmetrical 12-pulse rectifier that has been developed is presented. The results of simulation of passive ripple compensators, performed in two versions, showed their effectiveness, while the scheme was relatively simple and economic costs were relatively low. Also, the time of setting the set current in the system in the presence of a ripple compensator increases by no more than 3 %, and the accuracy and stability of operation do not change.

A Load-Independent Output Current Method for Wireless Power Transfer Systems with Optimal Parameter Tuning

In current study, a method for achieving a load-independent output current with the ability to optimize the parameter tuning, which is applied to wireless power transfer (WPT) systems, is analyzed. The proposed technique is based on the immittance property in a passive resonant network (PRN) with the purpose of transforming a voltage/current resource into a current/voltage resource. This study determines an immittance conditions-qualified family of PRN, which is associated with a more appropriate topological description in WPT applications. Considering the resource and sink type, a comprehensive specification of the coupling coefficient-based design condition and operating point is carried out. Moreover, the parameters of each proposed topology are reconfigured by adjusting the proportion of active power to reactive power ratios as an index to optimize the topology size as well as a reduction of voltage/current stresses on their elements without changing the specified system-level parameters, such as the loosely coupled transformer operating frequency, and specified constant current outputs. The sample topology selection is also carried out with respect to the absorption of the parasitic components and achieving the inherent dc-blocked transformer. Zero-voltage-switching (ZVS) operation of the switches, minimum conduction losses of the rectifier diodes within an extensive variety of load variations, and capability of consistent generation of stable load-regulated current are also achieved. Analytical results show that the proposed compensation has the minimum output current fluctuation versus variations of the coupling coefficient and other parameters. Finally, the effectiveness of the proposed methodology is evaluated through simulations, and practical experiments, and compared with the conventional design method.

Analysis and Design of a T/S Compensated IPT System for AGV Maintaining Stable Output Current Versus Air Gap and Load Variations

Inductive power transfer (IPT) technology for automatic guided vehicles wireless charging has widely drawn attention. The displacement of the air gap is inevitable due to tire pressure and spring deformation when vehicles are loaded with various weights. It can degrade the performance of the IPT system because the loosely coupled transformer parameters (self-inductances and mutual inductance) deviate from the designed values due to the position deviation of both sides’ ferrite cores. In this article, a parameter design method based on T-series (T/S) topology is proposed to maintain stable output current versus air gap and load variation. Then, the parameter design process of the T/S topology to improve air gap misalignment performance is elaborated. Finally, a 20 A/1 kW experimental setup was built to verify the validity. Experimental results show that the output current fluctuation is within 4.71% when the load varies from 1.2 to 2.4 Ω and the air gap decreases from 90 to 30 mm (primary self-inductance, secondary self-inductance, and mutual inductance increase by 4.71%, 30.22%, and 121.52%, respectively). Moreover, the overall output current fluctuation is less than 6% when the secondary side moves along the track with the air gap varying from 30 to 90 mm.

Negative-to-Positive Differential Resistance Transition in Ferroelectric FET: Physical Insight and Utilization in Analog Circuits.

In this article, for the first time, we explained a detailed physical insight for negative differential resistance (NDR) to positive differential resistance (PDR) transition in a ferroelectric (FE)-based negative capacitance (NC) FET and also its dependence on the device terminal voltages. Using extensive well-calibrated TCAD simulations, we have investigated this phenomenon on fully depleted silicon on insulator (FDSOI)-NCFET. The NDR-to-PDR transition occurs due to FE layer capacitance changes from a negative to positive state during channel pinchoff. This, in turn, results in a valley point in the output characteristic ( IDS - VDS ) at which the output resistance is infinite. We also found that we could alter the valley point location by modulating the vertical electric field through the FE layer in the channel pinchoff region using body bias ( VBB ). The interface oxide charges also impacted the NDR to PDR transition, and a positive interface charge results in faster NDR to PDR transition. Furthermore, we have utilized the modulation in the NDR-to-PDR transition due to VBB for designing a current mirror. Results show that the output current ( IOUT ) variation due to VDS reduces from ~8% to ~2% with VBB . We have also designed a single-stage common source (CS) amplifier and provided design guidelines to achieve a higher gain in the NDR region. The results obtained using a small-signal model of the FDSOI-NCFET demonstrate that ~25% higher gain can be achieved with the discussed design guidelines in the NDR region compared to the transition region of IDS - VDS . We have also explored the device scaling effect on the amplifier gain and found that ~ 2.23× gain can be increased with smaller channel length and higher device width.

Fuzzy-Logic Controller for Smart Drives

The fuzzy logic controller, or FLC, is a sort of artificial intelligence (AI) control that provides improved signal waveforms at the output and decreases oscillations when compared to traditional control (such as output speed variation, torque variation, and current variation for the three phases). This paper shows two FLC scenarios, one with 25 rules and the other with 49 rules, for PMSMs with an external permanent magnet (Ld=Lq). The FLC can be implemented in real time since it is designed to be computationally light. Permanent magnet synchronous machines (PMSMs) with high torque density, low losses-to-torque ratio, high power factor, and rapid torque and speed responsiveness offer a broad range of novel application possibilities.

BOX engineering to mitigate negative differential resistance in MFIS negative capacitance FDSOI FET: an analog perspective

Till date, the existing understanding of negative differential resistance (NDR) is obtained from metal-ferro–metal–insulator–semiconductor (MFMIS) FET, and it has been utilized for both MFMIS and metal–ferro–insulator–semiconductor (MFIS) based NCFETs. However, in MFIS architecture, the ferroelectric capacitance (C FE) is not a lumped capacitance. Therefore, for MFIS negative capacitance (NC) devices, the physical explanation which governs the NDR mechanism needs to be addressed. In this work, for the first time, we present the first principle explanation of the NDR effect in MFIS NC FDSOI. We found that the output current variation with the drain to source voltage (V DS), (i.e. g ds) primarily depends upon two parameters: (a) V DS dependent inversion charge gradient (∂n/∂ V DS); (b) V DS sensitive electron velocity (∂v/∂ V DS), and the combined effect of these two dependencies results in NDR. Further, to mitigate the NDR effect, we proposed the BOX engineered NC FDSOI FET, in which the buried oxide (BOX) layer is subdivided into the ferroelectric (FE) layer and the SiO2 layer. In doing so, the inversion charge in the channel is enhanced by the BOX engineered FE layer, which in turn mitigates the NDR and a nearly zero g ds with a minimal positive slope has been obtained. Through well-calibrated TCAD simulations, by utilizing the obtained positive g ds, we also designed a V DS independent constant current mirror which is an essential part of analog circuits. Furthermore, we discussed the impact of the FE parameter (remanent polarization and coercive field) variation on the device performances. We have also compared the acquired results with existing literature on NC-based devices, which justifies that our proposed structure exhibits complete diminution of NDR, thus enabling its use in analog circuit design.

A Strong Misalignment Tolerance Dual-Channel Coupler for Wireless Power Transfer System

In order to improve the transmission performance of the wireless power transfer (WPT) system under misaligned conditions, a novel type of dual-channel DDP type transmitter coil is proposed inspired by the traditional LCC compensation circuit and DD coil. The proposed DDP coil is a combination of DD coil and P coil, which jointly establishes the main flux for magnetic coupling and power transmission. At the same time, the P coil also acts as the resonant inductor of the LCC compensation circuit of the WPT system. When the system parameters are well designed, we can achieve relatively more stable output current during the offset of the primary and secondary sides. Experimental results indicate that when the misalignment varies from 0 m to 0.15 m, the output current variation range is 2.92 A to 3.68 A, the current fluctuation rate is 11.5%. Compared with the traditional DD coil with LCC topology, the proposed dual-channel transmitter DDP coil shows better performance in misalignment tolerance.

Development of fast and hybrid charger for lithium ion batteries in light weight electric vehicles

This paper introduces a battery charging circuit, which utilizes solar and grid power for charging lightweight electric vehicles. The novelty of the proposed approach is the development of hybrid charger with control algorithm that charges the electric vehicle battery using dual input power. This hybrid charging provides electricity to start the electrically powered vehicle and also powers the additional vehicle. The controller can act as fast charger by closed loop operation with battery parameters as input. The speed of the charge level is varied based on the state of charge (SOC) of battery and parameters detected from battery side. Battery state estimation is defined through adopted battery model and their precision affects the accuracy of state estimation. Micro controller acts as a smart charger that controls the parameter of voltage and current level for battery charging. Battery output performance, voltage, and current variation in battery simulator during stage 1 to 2 charging level, current variation during stage 1 to 2 and stage 2 to 3 charging level by simulation and experimental results are also exhibited in the proposed work. Average power usage for conventional charger with proposed one during day and night time was compared. Time taken to reach 100% SOC for conventional charger with proposed system, probability of battery capacity, energy demand of charging station, effects of charging and discharging of battery, and charging capacity and temperature of battery is also further studied. The result analysis part proves that the proposed strategy shown to be superior to its existing methodologies.

Saturation curves of low-voltage ionization chamber for ITER at 10–30 keV

A low voltage ionization chamber (LVIC) is a very promising alternative to ITER X-ray detectors owing to its outstanding radiation tolerance. To investigate the characteristics of the LVIC preliminary prototype and evaluate its application in ITER, the saturation curves corresponding to 10–30 keV monochromatic radiations were measured in the Shanghai Synchrotron Radiation Facility. In the saturation region, the output current variation was linear with respect to input power, indicating that the LVIC can be used to detect X-ray emissions. Based on the saturation curves and related simulation, it is speculated that the saturation voltages needed for LVICs of the external and internal cameras in ITER might be no greater than 150 V and 300 V respectively. Responsivity (R) derived from experimental results was compared with theoretical calculations, showing good agreement at 15–20 keV, but significant deviations at 10 keV and 30 keV, which will be studied in the future. It is estimated that R of the LVIC ranges from 2.66 × 10−2 to 1.89 × 10−3 A/W between 10 to 30 keV. The experimental results show promising potential for LVIC application in ITER as an X-ray detector.

Simulation-Based Power-Loss Optimization of General-Purpose High-Voltage SiC MOSFET Circuit Under High-Frequency Operation

This investigation focuses on a simulation-based power-loss optimization scheme, which is applied to laboratory developed general-purpose inverter-stack circuit, fabricated using high-voltage SiC-MOSFET. The optimization mainly addresses the external elements under fixed output current. It is found, that an increase in switching frequency causes increased loss, which is however less than that calculated by following the conventionally predicted linear dependence on the frequency. The switching loss is also strongly varying, in accordance with the output current variation, which is determined by the circuit requirements. Here, it is demonstrated, that circuit simulation with an accurate compact model can be successfully applied to realize significant improvements, leading to lower power loss under the requested operating condition. It is also found that the SiC-MOSFET can maintain the efficiency of nearly 98% even for high-frequency operations.

Influence of output current on decolorization efficiency of azo dye wastewater by a series system with multi-stage reverse electrodialysis reactors

A series system with multi-stage reverse electrodialysis reactor (REDR) can harvest salinity gradient energy (SGE) from working fluids as much as possible to treat organic wastewater. In this paper, the series system simulated with a single REDR system to degrade azo dye wastewater was investigated experimentally. The results showed that the series system could not only degrade azo dye wastewater effectively, but also output a certain of electric energy simultaneously. In the series system, the salinity gradient variations of working fluids which flowing through each stage REDR affected only on the output voltage of each stage REDR, but which almost did not affect on the decolorization efficiency of azo dye wastewater of each stage REDR. However, the output current variations of the series system effected significantly on the decolorization efficiency. Although the increase of output current was benefit to the decolorization efficiency for each reactor in the series system, the number of reactors in the series system will reduce quickly, which results in total decolorization rate of azo dye wastewater decrease. When the current was 0.1A, the overall performances of the series system would be relatively optimal under the experimental conditions. The number of reactors, total decolorization rate of azo dye wastewater, utilization efficiencies of SGE and membrane area, and net output power could reach 19, 1.91 mg·s−1, 6.92 mg·J−1, 31.21 mg·m−2s−1 and 0.68 W, respectively.

A 245-mA Digitally Assisted Dual-Loop Low-Dropout Regulator

A digitally assisted high-current low-dropout (LDO) regulator is proposed in this article. The LDO architecture combines two main types of regulators: digital LDOs and analog LDOs. The proposed architecture uses the digital loop for tracking large output current variations and the analog loop for steady-state operation. The dual loops have a loop controller for coherent operation. Hence, the proposed LDO inherits some advantages from both sides. It achieves high power supply rejection (PSR) from the analog part without ripples at the output. Compared with the analog loop, the digital loop has a faster settling time while consuming minimum static power. In this design, the maximum load is 245 mA. The PSR is −42 dB at 1 MHz for heavy loading conditions. The quiescent current ( ${I}{Q}$ ) is 300 $\mu \text{A}$ . When the 300-/100-ns (rising/falling) current step is applied at the load, the voltage peak is 71/37 mV, respectively. The proposed LDO achieves a competitive 7.4-ps figure of merit (FOM). The active area is approximately 0.056 mm2 in a TSMC40-nm process.

Adaptive current distribution method for parallel-connected PEMFC generation system considering performance consistency

The proton exchange membrane fuel cell (PEMFC) stacks are not widely utilized in the sector of the transportation industry, due to their limited efficiency and durability. In order to apply FC stacks in high-power occasions, the FC stacks are usually connected in parallel to form a multi-stack FC system (MFCS). During the operation, since the current from the stacks changes dynamically with different operating parameters, they usually present different performance. In the MFCS, if the performance of one stack is unsatisfactory, operating the underperforming stack without corresponding protection measures may further degrade its performance and thus break down the system. In order to slow down the performance degradation of the FC stacks and keep the consistency of stacks’ performance in MFCS, this paper has considered the effects of different stacks operating state and membrane area on the output current variations of stacks. And then an adaptive current distribution method realized by virtual droop technique considering the performance consistency of FC is proposed. Besides, this study builds a parallel-connected PEMFC generation system to verify the effectiveness of the proposed method. The validity of the proposed method has been demonstrated with experimental results. In addition, compared with the conventional control algorithm, the presented virtual droop control algorithm could get more satisfactory results. Such as improving the load voltage regulation and reducing the magnitude of the deviation between the actual output current and the reference current.

Coupled Ion‐Gel Channel‐Width Gating and Piezotronic Interface Gating in ZnO Nanowire Devices

AbstractThe piezotronic effect has been extensively investigated and applied to the third generation of semiconductors. However, there currently is no effective method compatible with microelectronics techniques to harness the piezotronic effect. In this work, a facile and low‐energy‐consuming method to couple the channel‐width gating effect with piezotronic devices is developed by precisely patterning ion‐gel electrolyte on ZnO NW. The ultrahigh capacitance of ion gel resulting from electrical double layers allows efficient modulation of the charge carrier density in ZnO NW at low gate voltage (2 V) to compensate for the piezotronic effect. The obtained output current variation under negative gate voltage (420%, i.e., enhanced piezotronic effect) is two times higher than that under zero or positive gate biases (200%). Through quantifying the reverse‐biased Schottky barrier height and charge carrier density, it is found that the applied negative gate voltage depletes free electrons in ZnO NW and alleviates the screening effect on piezoelectric polarization charges, leading to enhanced piezotronic effect. Based on this, an ion‐gel‐gated piezotronic strain sensor is fabricated with enhanced gauge factor and tunable logic devices. It is believed that the coupled ion‐gel and piezotronic gating effect is of great significance to the design of sophisticated and practical piezotronic devices.