On-wafer Calibration Research Articles

Establishing On-Wafer Calibration Standards for the 16-Term Error Model: Application to Silicon High-Frequency Transistor Characterization

Establishing On-Wafer Calibration Standards for the 16-Term Error Model: Application to Silicon High-Frequency Transistor Characterization

On-Wafer Vector-Network-Analyzer Measurements at mK Temperatures

We describe a system for performing on-wafer vector-network-analyzer measurements from 100 MHz to 15 GHz at mK temperatures ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">i.e.</i> , less than 20 mK). We first demonstrate a camera-less probe positioning system and calibrate this system at 4.4 K. We then use this positioning system to perform both on-wafer scattering-parameter calibrations and on-wafer large-signal-network-analysis calibrations at 4.4 K and mK temperatures. The scattering-parameter calibrations were based on cooled printed transmission lines while the power and electrical phase calibrations required for on-wafer large-signal network analysis calibrations were performed by transferring room temperature coaxial power and electrical phase calibrations through long attenuated coaxial lines to our cryogenic on-wafer reference plane. Finally, we perform scattering-parameter measurements of common interconnect structures and measurements of modulated-signals typical of those used to control superconducting transmon qubits commonly used in quantum-computing applications. We also demonstrate our ability to predistort the modulated signals we created, and we assess the drift and stability of our system, which we found to be on the order of a few tenths of a dB and a few degrees.

Parasitic Parameter Extraction for Calibration Standards Using an Optimization Strategy

This article presents a novel extraction method for parasitic parameters of on-wafer calibration standards using an optimization strategy. Based on the physical models of the calibration standards, the parasitic parameters of all calibration standards can be extracted using the Bayesian optimization method with a fast calculation speed and high accuracy. Compared with the conventional thru-reflect-line (TRL) extraction method, the proposed approach can work well in systems with high crosstalk. The methodology is validated through on-wafer measurements using a ground–signal–ground (GSG) probe with low crosstalk and a ground–signal (GS) probe with high crosstalk. The proposed method shows a comparable accuracy with the TRL method in the low-crosstalk case, while it has higher accuracy in the high-crosstalk scenario.

An Advanced Calibration Method for Probe Leakage Correction in On-Wafer Test Systems

This article presents an advanced calibration method for solving the error terms due to probe-probe leakage in an on-wafer test system. A new 12-term error model for the on-wafer test system including vector network analyzer (VNA), frequency extenders, cables/waveguides, probes, probe contact pads and probe-probe leakage is introduced. A two-step calibration process and an algorithm with four on-chip calibration standards including one undefined Thru, two pairs of undefined symmetrical Reflects such as Open-Open and Short-Short pairs, and a pair of known Match loads has been developed. In addition, an improved circuit model for the Match load is proposed for enhanced accuracy. The calibration method has been tested on a mismatched attenuator for the frequency range between 0.2 and 110 GHz, and the results are compared with numerical simulation and existing calibration methods. It is shown that the attenuator’s <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\vert S_{11}\vert $ </tex-math></inline-formula> is more consecutive and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\vert S_{21}\vert $ </tex-math></inline-formula> has been improved by up-to 1.7 dB. It is evident that the proposed calibration method has a simpler calibration process and less stringent requirements on calibration standards which are key for on-wafer system calibration at millimeter-wave and terahertz frequencies. More importantly, the new calibration method is more suitable for measurements in which DUTs have variable lengths.

Design of On-Wafer Calibration Kit for Accurate Pyramid Probe Card-Based Surface Acoustic Wave Filter Measurements

Design of On-Wafer Calibration Kit for Accurate Pyramid Probe Card-Based Surface Acoustic Wave Filter Measurements

Design of On-Wafer TRL Calibration Kit for InP Technologies Characterization up to 500 GHz

This article reports a detailed approach toward optimization of on-wafer thru-reflect-line (TRL) calibration structures for submillimeter-wave characterization of a state-of-the-art indium-phosphide (InP) technology, validated by thorough experimentation and electromagnetic (EM) simulation. The limitations of the existing RF test structures for high-frequency measurements beyond 110 GHz are analyzed through EM simulation. Using an optimization procedure based on calibration of raw EM simulated data, on-wafer TRL calibration structures were developed and fabricated in a subsequent run of this technology. Measurements could be achieved up to 500 GHz on the passive devices and up to 330 GHz on the InP double heterojunction bipolar transistors (DHBTs). The transistor measurements were validated by comparison with the HiCuM compact model simulation to 330 GHz for the InP DHBTs.

Determination of Characteristic Impedance of Planar Transmission Lines on Lossy/Dispersive Substrates by Using Series Resistor With Frequency-Dependent Inductance

This article presents a simple derivation and fast-solving scheme to extract the characteristic impedance of planar transmission lines (TLs) on lossy/dispersive substrates, by using a series resistor after one-tier multiline thru-reflect-line (TRL) calibration, for on-wafer calibration applications. The proposed method is based on the constant resistance condition of the series resistor and linear frequency response of the conductance of TL per unit length, where the parasitic inductance of the series resistor can be frequency-dependent; thus, the deviation caused by the constant inductance assumption can be observed in millimeter-wave frequencies. The proposed method is investigated using a coplanar waveguide (CPW) on a high-resistivity silicon substrate by using an integrated passive device (IPD) technology with verifications of the calibration comparison method in a frequency range of 2–110 GHz.

Electronic Calibration for Submillimeter-Wave On-Wafer Scattering Parameter Measurements Using Schottky Diodes

A proof-of-concept demonstration of on-wafer electronic calibration in the submillimeter-wave band (325–500 GHz) is presented. A GaAs Schottky diode shunting a coplanar transmission line is employed as an electronic standard that is tuned by bias applied through wafer probes. Error-corrected scattering parameter measurements, based on a Thru-Reflect-Line (TRL) calibration, are used to characterize the on-wafer diode and establish it as a standard for electronic calibration. Subsequently, ensembles of measurements from a multiline TRL calibration and the diode calibration standard are performed and compared to assess the uncertainty associated with the two approaches. It is found that the error coefficients estimated using the electronic standard are in good agreement with those found from the multiline TRL calibration. Moreover, the electronic standard exhibits a significant improvement in precision compared with the TRL standards, consistent with previous work showing that error in probe placement between measurements was a principle source of uncertainty for TRL-based calibration.

A combined technique for amplifier oriented small‐signal noise model extraction

Based on the earlier experimental investigation of the existing GaAs pHEMT small-signal modeling approaches and their applicability to different manufacturing processes, a combined automatic small-signal noise model extraction technique, suitable for design of low-noise and buffer amplifiers is proposed. The technique is based on the usage of measured S-parameters of passive test structures and S-parameters of the transistor in cold modes. Expressions are given for extraction of the intrinsic parameters of an equivalent circuit using linear regression. It is shown that the application of the proposed method allows extracting a small-signal GaAs pHEMT model both in the probe-tip reference planes and at on-wafer calibration planes. The moving average algorithm was applied for preprocessing the results of measurements of the 50 Ohm noise figure during extraction of the noise model. The results of S-parameters and noise figure simulation agree well with the measurements. The new technique was implemented as a plugin in a commercial EDA tool and enables to derive a ready-to use small-signal noise model from measured S-parameters and 50 Ohm noise figure of a 0.15 μm GaAs pHEMT.

On-Wafer Cryogenic Characterization Technique of an SIS-Based Frequency Up and Down Converter

This paper describes an on-wafer characterization system and calibration technique for frequency up and down converters based on a superconductor–insulator–superconductor (SIS) tunnel junction. The measurement system uses a 4-K probe station in combination with a vector network analyzer which allows measurement of both up- and down-conversion gains and reflection coefficients. We employed and verified a scalar mixer calibration technique for accurate characterization of the conversion properties. We present the detailed measurement technique and verification using an SIS frequency converter sample.

THz Characterization and Modeling of SiGe HBTs: Review (Invited)

This article presents a state-of-art review of on-wafer S-parameter characterization of THz silicon transistors for compact modelling purpose. After, a brief review of calibration/de-embedding techniques, the paper focuses on the on-wafer calibration techniques and especially on the design and dimensions of lines built on advanced silicon technologies. Other information such as the pad geometry, the ground plane and the floorplan of the devices under test are also compared. The influence of RF probe geometry on the coupling with the substrate and adjacent structures is also considered to evaluate the accuracy of the measurement, especially using EM simulation methodology. Finally, the importance of measuring above 110 GHz is demonstrated for SiGe HBT parameter extraction. The validation of the compact model is confirmed thanks to an EM-SPICE co-simulation that integrates the whole calibration cum de-embedding procedure.

Optimal Series Resistors for On-Wafer Calibrations

The series resistor (SR) is a common on-wafer device typically used in the series-resistor (SR) calibration and for estimating the capacitance per unit length of coplanar waveguide (CPW) transmission lines. While much work has been done using SRs, this article addresses the design of the resistor itself, considering both its dc resistance value and geometry, and evaluates which resistor is the best resistor. We fabricated 48 different SRs with dc resistances ranging from approximately 1 $\Omega $ to over 6 $\text{k}\Omega $ and tested their utility in the SR calibration and in extracting the capacitance per unit length of CPW transmission lines. We found that a dc resistance near 100 $\Omega $ produces the best SR calibration when compared to multiline thru-reflect-line. For extracting the capacitance per unit length, resistors with a dc resistance near 150 $\Omega $ and shorter than 20 $\mu \text{m}$ long gave the capacitance values with the lowest uncertainty. In addition, we provide some guidance on choosing frequency bounds for the capacitance estimation. These results are of interest to anyone who performs on-wafer calibrations.

On-Wafer Noise Characterization of an Automotive Monostatic Radar Transceiver With Self-Interference Evaluation

We present a novel microwave on-wafer measurement system for fast evaluation of an automotive monostatic radar transceiver. In the first development phase of a radar transceiver, building blocks and the whole transceiver have to be analyzed in detail. The setup includes a vector network analyzer (VNA) combined with 110-GHz frequency extension converters and an 85-GHz spectrum analyzer. By means of the proposed measurement system structure, switching between noise figure (NF) observation of the device under test (DUT) at microwave frequencies (e.g., for LNAs) or in the IF domain (frequency conversion devices, e.g., for mixers), can be handled by replugging of one coaxial cable. Consequently, the setup calibration can be reused after switching, which is beneficial for the setup time effort and accuracy. Applying the direct-noise method (DNM), the need for reassembly or use of a waveguide switch to connect a noise-source after on-wafer calibration is eliminated. Furthermore, the use of the VNA in combination with the DNM allows precise deembedding. Improvements achieved by the deembedding methodology proposed are demonstrated and compared with the results of Y-factor measurements. To verify DUT usability for monostatic frequency-modulated continuous-wave (FMCW) applications, the NF can be obtained in the presence of self-interference caused by TX–RX leakage (i.e., blocker signal). Reusing the VNA as a signal source for the blocker signal, this RF signal was analyzed in detail in terms of amplitude and phase noise. For the first time, the amplitude noise of the signal source is considered as well and even suppressed in the blocker measurements at the mm-wave frequency range. Amplitude noise suppression has been verified by a custom amplitude modulation (AM) circuit, which is added in the common VNA signal path and thus can be switched transparently for the remaining configurations. The proposed measurement system has been used successfully to characterize a monostatic radar transceiver for FMCW applications.

A Comparative Study of On-Wafer and Waveguide Module S-Parameter Measurements at D-Band Frequencies

In this paper, we present a comparative study of S-parameter measurements of electronic components on planar substrates performed with a waveguide module and in a conventional on-wafer probing environment. Measurements were conducted at three well-established measurement laboratories for the investigation of reproducibility at frequencies from 110 to 170 GHz. For the comparison, we fabricated waveguide modules for six passive structures, including devices under test (DUTs). Four of these structures are related to using a second tier calibration to achieve the same reference planes for the waveguide module measurements as used for the on-wafer probing measurements. Additionally, we processed three complete on-wafer calibration sets, including DUTs, equipped with different probe-to-pad interfaces. In this comparison, the DUT measurement from the waveguide module acts as a reference standard, with reduced crosstalk behavior in comparison to the on-wafer measurement. With the waveguide reference, we are able to assess the ability of two techniques to compensate for crosstalk and higher order modes influencing the on-wafer S-parameter measurements. On the one hand, we use a shielded probe-to-pad transition and on the other hand, we use an algorithm-based crosstalk correction scheme. To the best of our knowledge, this is the first time that such a comparison has been undertaken, comparing well-established waveguide calibrations with an equivalent on-wafer calibration.

Uncertainty Analysis Method Including Influence of Probe Alignment on On-Wafer Calibration Process

This paper describes an uncertainty analysis method, including a detailed analysis of the contributions of probe alignment in the $X$ -, $Y$ -, and $Z$ -coordinates, tilt angle, and rotation angle. The contribution of each contributor was analyzed through the Monte Carlo calculation with a multiline thru–reflect–line (mTRL) calibration algorithm. The contribution of each probe position was separated using a precision probing technique with a fully automatic probe station. Thru and line standards were found to have a larger impact on calibration reproducibility than the reflect standard. Furthermore, the distance between probes was found to be the most dominant uncertainty contributor. These results can be explained by the conventional vector analyzer system theories. Finally, uncertainties were estimated with the conventional manual probing and precision probing technique by the developed analysis algorithm. The analysis result shows that the precision probing technique significantly decreased uncertainty by reducing variations in probe positions, which provides the corroborative evidence of the improvement of measurement reproducibility by the precision probing technique.

Comparison of On-Wafer TRL Calibration to ISS SOLT Calibration With Open-Short De-Embedding up to 500 GHz

Sub-mm circuit design requires accurate on-wafer characterization of passive and active devices. In industry, characterization of these devices is often performed with off-wafer short-open-load-thru (SOLT) calibration. In this paper, the validity of this characterization procedure above 110 GHz is investigated by an exhaustive study of on-wafer and alumina off-wafer calibration using measurement and electromagnetic (EM) simulation up to 500 GHz. The EM simulation is performed at two different levels, first at the intrinsic level of the devices under test for reference and afterward up to the probe level to simulate different standards used in the off-wafer calibration or in the on-wafer calibration in the presence of the probe. Furthermore, EM simulation data are calibrated with the same procedures and tools that are used in the measurement; therefore, it includes the probe-to-substrate coupling. In addition, precise EM model of a commercial impedance standard substrate is developed and used to perform the SOLT calibration. A good agreement is observed between measurement and EM modeling for the off-wafer calibration as well as for the on-wafer calibration. Results clearly highlight a limitation of alumina off-wafer methodology above 200 GHz for characterization of silicon-based technologies. Finally, a discussion is given on the pros and cons of the off-wafer and on-wafer methodologies.

Quasi-Optical Testbed for Wideband THz On-Wafer Measurements

At mmW and THz band, on-wafer testing is very critical for on-wafer electronics devices and circuits as well as spectroscopy. Nevertheless, current measurement capabilities are limited by contact probe technology and vector network analyzers (VNAs). Recently, we proposed a non-contact method to tackle the issue of using expensive and brittle contact probes. Using quasi-optics and on-chip antennas, the signals from the THz VNA are coupled on the device under test (DUT) with low insertion loss and unmatched repeatability. However, the bandwidth and cutoff frequency limitations of VNAs limit the scope of THz measurements and increase the complexity. State-of-the-art VNAs use external frequency multipliers, namely VNA extenders, to up-convert the VNA signal to the THz band. The problem of using such extenders is three-fold: 1) The maximum cutoff barely breaks it into the THz band, 2) they are bandlimited, and 3) they are extremely expensive due to costs associated with waveguide micromachining and sophisticated semiconductor processes for the electronics. Here, we propose the design of a novel quasi-optical on-wafer testbed that is compatible with photonics-based sources and detectors (e.g., photomixers) and use THz optical components instead of traditional waveguide structures to route the THz signals. With photomixers we can implement cost effective THz sources or receivers that can be efficiently integrated with quasi-optics. They feature a relatively simple topology and operate in a very wide bandwidth, typically from less than 100 GHz to more than 3 THz. Since the optical components are frequency independent, by adopting photomixers as THz emitter and detectors, the proposed quasi-optical system has a potential to achieve ultra-wideband on-wafer measurement capabilities. First, we talk about the design of the quasi-optical coupler consists of two beam splitters, which is used to discriminate between the reference and the measurement signals. Through a rigorous theoretical analysis and experiments we verified a minimum 60 dB isolation and less than 3 dB of insertion loss in the 330–500 GHz band. Then, we discuss how to use this quasi-optical coupler to implement one-port free-space measurements. We also discuss the calibration process and present three calibration standards that eliminate the error terms of the one-port free-space measurement topology. The experimental results we collected from our free-space measurements are shown afterwards. The results for two different DUTs show a good agreement between the measurement and the theoretical reflection coefficients. Next, we present the on-wafer testbed, which is constructed by a quasi-optical coupler and a non-contact probe. We also briefly introduce the on-wafer calibration approach and on-wafer standards. We notice that, in order to couple the THz beam to the on-wafer DUT, all the on-wafer standards and DUTs need to be integrated with probing antennas. Finally, we show the experimental results we obtained from one-port on-wafer measurements. For two different on-wafer DUTs, the measurement results agree with the simulations very well. Besides, with multiple measurements, we also verified that the proposed quasi-optical testbed has a good repeatability.

Measurement and Modeling of Heterogeneous Chip-Scale Interconnections

We present precision scattering-parameter measurements of chip-to-chip connections in heterogeneous integrated circuits: indium phosphide or gallium nitride “chiplets” mounted on Silicon Complementary Metal-Oxide-Semiconductor carrier chips. We demonstrate methodology, experimental results, and modeling results of these chip-scale interconnections from dc to 110 GHz. We used thru-reflect-line on-wafer calibration to establish reference planes inside heterogeneous integrated circuits, and then, we translated those reference planes to the proximity of the chip-to-chip transitions to isolate their contribution to the scattering parameters.

Measurement and Modeling of Heterogeneous Chip-Scale Interconnections

We present precision scattering-parameter measurements of chip-to-chip connections in heterogeneous integrated circuits: indium phosphide or gallium nitride “chiplets” mounted on Silicon Complementary Metal-Oxide-Semiconductor carrier chips. We demonstrate methodology, experimental results, and modeling results of these chip-scale interconnections from dc to 110 GHz. We used thru-reflect-line on-wafer calibration to establish reference planes inside heterogeneous integrated circuits, and then, we translated those reference planes to the proximity of the chip-to-chip transitions to isolate their contribution to the scattering parameters.

Realization of Accurate On-Wafer Measurement Using Precision Probing Technique at Millimeter-Wave Frequency

This paper demonstrates a novel measurement technique that can be utilized in on-wafer calibration and device evaluation procedures. This technique can realize a repeatable determination of the distance between probes thorough RF signal detection. The measured S-parameters are analyzed to determine the origin coordinates of probes. As these procedures are automated, operator dependence in the alignment of the probe position and resolution of the microscope is eliminated. A fully automatic probe station is constructed, and an impedance standard substrate (ISS) with special alignment patterns is fabricated for realizing this technique. The origin coordinates of two probes are determined at a certain position above the alignment patterns. The obtained variation in the distance between the probes is a few micrometers, which is less than that in conventional manual probing. Measurement reproducibility is investigated by evaluating the standard deviations of the measured S-parameters of a matched transmission line on the ISS. The proposed technique exhibits lower standard deviations compared to those of conventional manual probing.