On-chip Optical Interconnects Research Articles

Substrate Effect on Light Emission of SSI-LEDs

A new type of solid-state incandescent light emitting device (SSI-LED) that emitted broad-band warm white light has been reported recently [1-4]. This kind of device is made from a simple MOS capacitor structure composed a high-k gate dielectric on p-type Si substrate [1-4]. The light emission principle is the thermal excitation of nano-sized conductive paths, i.e., nano-resistors, formed from the dielectric breakdown of the MOS capacitor upon the pass of a large current [4]. Since the whole device is made with IC-compatible materials and processes, one of the possible applications is the on-chip optical interconnect [5]. It also shows antifuse- and diode-like characteristics which are suitable for IC and other applications [6,7]. Since the nano-resistors are formed from the breakdown of the MOS structure, all materials in the current path, i.e., including the dopant concentration of the substrate, can contribute to the light emission process [8]. In this paper, authors investigated the Si substrate effect on light emission of the SSI-LED. SSI-LEDs made of p-type <100> Si wafers of two different dopant concentrations, i.e., p (~1015 cm-3) and p + (~1017 cm-3), were fabricated. The Zr-doped HfO2 (ZrHfO) dielectric film was sputtered from a Zr/Hf (12/88 wt. %) target on the substrate in Ar/O2 (1:1) at 5 mTorr and 60 W for 12 min. Then, the sample was annealed at 800°C in N2 for 3 min. Subsequently, an ITO film was deposited on top of the high-k stack and wet-etched into 300 µm-diameter dots as the gate electrodes. An Al film was deposited on the backside of the wafer to form the ohmic contact. Finally, the sample was annealed at 400°C in forming gas for 5 min. The complete SSI-LED was stressed at a gate voltage (Vg ) of -25 V for the light emission characteristics. Figure 1 are top-view photos of light emission from SSI-LEDs made on (a) p and (b) p+ Si wafers. Both photos showed that the light was emitted from many discrete bright dots evenly distributed across the gate electrode. Each dot corresponds to a nano-resistor. The p+ sample contains many more dots than the p sample does. The bright dots were almost distributed everywhere across gate electrode of the p+ substrate device. This is because the breakdown strength decreases markedly with the increase of the substrate doping concentration [8]. Therefore, under the same Vg stress, it is easier to form more conductive paths in the gate dielectric thin film in the p+ sample than in the p sample. The light emission photo of the former looks brighter than that of the latter. Figure 2 shows the light emission spectra of the p and p+ samples. Both spectra cover the same wavelength range including the visible and some of the near IR lights. The p+ sample has a much higher light intensity than the p sample has, which is consistent with the observation of Fig. 1. The more nano-resistors are formed, the stronger the light is emitted from the SSI-LED. The peak wavelengths of both devices are very close, i.e., 700 nm for the p substrate device and 707 nm for the p+ substrate device. The CIE color coordinates, color correlated temperature (CCT), and color rendering index (CRI) values were calculated and listed in Table 1. Both samples have similar CIE characteristics, which indicates the similar conductive path properties. In summary, the light emission characteristics of the SSI-LED is influenced by the dopant concentration of the Si wafer, which affects the breakdown of the MOS capacitor and the formation of nano-resistors. [1] Y. Kuo et al, APL, 102, 031117 (2013). [2] Y. Kuo et al, ESSL, 2, Q59 (2013). [3] Y. Kuo et al, SSE, 89, 120 (2013). [4] C.-C. Lin et al, APL, 106, 121107 (2015). [5] S. Zhang et al, ECS JSS, 6, Q39 (2017). [6] Y. Kuo, ECST, 69, 23 (2015). [7] Y. Kuo, ECST, 67, 183 (2015). [8] C. Osburn et al, JES, 119, 597 (1972). Figure 1

(Invited) Amorphous Zr-Doped HfO2 high-K Dielectric Thin Film for Electronic and Optoelectronic Applications

Metal oxides have been used as the high-k dielectric materials in ICs and TFTs for several decades. Recently, they are used as the gate dielectric in the nano-sized MOSFET to take the advantage of the low leakage current and other device properties. HfO2 is the most popular high-k gate dielectric for sub 1 nm EOT transistors and circuits. One of its main drawbacks is the low crystallization temperature, i.e., < 700°C, which can be a serious reliability problem. We have solved this problem by adding Zr into HfO2 to form the Zr-doped HfO2 (ZrHfO) film. This kind of high-k film can remain amorphous after been heated to above 900ºC. The material and electrical properties can be optimized by controlling the concentration of Zr in the film and the post deposition annealing (PDA) condition. In this talk, the author reviews his works in dielectric and non-dielectric applications of the amorphous ZrHfO thin film. They are highly dependent on the structure of the film. The amorphous ZrHfO high-k thin film can be transformed into heterogeneous structures for non-dielectric applications. For example, one or more of the nanocrystalline materials have been embedded into the ZrHfO thin film to serve as charge trapping media. Electrons and holes can be stored in this kind of film separately with the selection of the proper nanocrystal materials and the gate bias condition. This kind of nonvolatile memory device has a lifetime more than 10 years The amorphous ZrHfO high-k thin film can be prepared into another type of heterogeneous structure. After the hard breakdown process, many nano-resistors can be permanently and uniformly formed in the high-k thin film. Light can be emitted from nano-resistors upon the application of a voltage. This is a solid state incandescent light emitting device (SSI-LED) became the principle of light emission is the black body emission. The emitted light has the broad-band spectrum covering the whole visible and part of the near-IR wavelength range. Applications of SSI-LEDs include lighting, on-chip optical interconnect, and others. The nano-resistor structure can also be used as one-time-programmed memory devices, i.e., antifuses, because the leakage current ratio after and before the breakdown process can be larger than 105. Separately, the nano-resistor structure has the current rectification function, which makes it a diode device. However, different from the on-off function of the conventional p-n junction diode, which has a drastic change of the current upon a small increase of the driving voltage, the nano-resistor based diode has the gray-scale capability because of the gradual change of the current vs. voltage curve. There are many other possible applications of the amorphous ZrHfO high-k thin film beyond the conventional electronics and optoelectronics, which will also be discussed. This talk is dedicated to the memory of Prof. Samares Kar for his seminal contribution to this important ECS symposium series.

Laser Pooling: Static and Dynamic Laser Power Allocation for On-Chip Optical Interconnects

The advent of many-core processors with hundreds of processing cores collocated on single silicon dies requires scalable and efficient on-chip interconnects. Research suggests conventional electrical interconnects will be inadequate to support large-scale many-core processors. Thus, emerging technologies such as on-chip silicon nanophotonics may help meet the demands of future many-core processors by providing high-bandwidth and low-power communication over extended distances. Nanophotonic interconnects require a large external laser source which is often wasted during periods of low network utilization. We propose laser pooling techniques, where we share laser power among all the nodes and effectively share the link bandwidth and power. Furthermore, we design both static and dynamic techniques to scale laser power with network load. Evaluation and simulations of the proposed architecture estimate the proposed architecture, powering 16 optical channels with 0.5 dB/cm waveguide cladding losses, would require only 5.1 W of laser power versus 12.3 W of laser power for the baseline architecture, almost 58.5% laser power savings, while incurring only a 22% saturation throughput penalty.

Light coupling for on-chip optical interconnects

An on-chip optical interconnect of a light emitter, waveguide and photodetector based on p-n junction InGaN/GaN multiple quantum wells (MQWs) is fabricated to investigate the light coupling efficiency of suspended waveguides connecting the light emitter and photodetector. Optical characterizations indicate that the photocurrent of the photodetector is mainly induced by the emitted light that is transmitted through the waveguides. Suspended waveguides with and without air gaps are reported in this paper. A 1mA current injection into the light emitter induces a photocurrent of 17.3nA and 205.5nA for the photodetector connected to the waveguides that with 10μm air gaps and without air gaps, respectively. Finite-difference time-domain simulations are performed to analyze the gap effect on the coupling efficiency of the light transmission. Both the gap distance and the index variation of the gap materials are analyzed to verify the potential optical sensing functions of the on-chip optical interconnect. A possible strategy for increasing the light coupling efficiency is proven by simulations.

A parity-time symmetry single-mode laser based on graphene

The development of advanced optical systems, especially coherent optical systems demands high-performance single-mode lasers. Here, we proposed a parity-time symmetry single-mode laser based on graphene with superior performance over the widely utilized technologies of the index-coupled DFB laser working at telecommunication wavelength. The unique properties of graphene have been used to tune the III-V/Silicon hybrid laser to the PT symmetry broken phase where the lasing mode has a minimum overlap with graphene nanostructures while all other modes have been suppressed by the loss in graphene. Our results suggest a high-performance silicon-based laser source for photonic integrated circuits. Such a compact single-mode laser source can be widely used in some applications, such as on-chip optical interconnects, optical spectrometry, biochemical sensing and imaging.

Micron-scale Raman amplifier: another progressive step towards the maturity of silicon photonics

Notice of redundant publication "Micron-scale Raman amplifier: another progressive step towards the maturity of silicon photonics" It has been brought to the attention of the editors that this article contains redundancies when compared with an earlier article published by the authors in Datta T and Sen M 2017 Superlattices Microstruct. 109 107–16. The original article was not referenced. These concerns were identified after the article appeared as accepted but before publication of the final version. As a member of COPE this was been investigated in accordance with the COPE guidelines and it was agreed a notice of redundant publication should be applied. A new model for micron scale all-silicon amplifier has been proposed based on stimulated Raman scattering (SRS) in a slotted photonic crystal waveguide (SPCW). Silicon nanocrystal material is considered to be embedded in the slot of the SPCW to exploit its giant Raman gain coefficient. Moreover, the gain has further been enhanced by using the ultra-high optical confinement of the SPCW. Results of simulations show that the threshold power of a 3 μm long SPCW based Raman amplifier is in the order of merely 500 μW, while the CW Stokes is launched with a power of 50 μW. The simulations also show that a merely 1.5 μm long SPCW can offer ≈3 dB gain even at the 400 Gbps pulse repetition rate. However, pulse shape becomes disrupted by the SRS induced temporal broadening which has further been reduced considerably by operating the Stokes at a different resonance peak in the SRS gain spectrum. With these tremendous performances, the SPCW based Raman amplifier proves its potentiality for application in on-chip optical interconnects and also opens up a pavement for realizing the long desired micron-scale all-silicon Raman laser.

(Invited) Multifunctional Amorphous Metal Oxide Thin Films – Structure Transformation for Various Functions

Homogeneous amorphous metal oxide thin films can be transformed into heterogeneous structures for novel electronic, optoelectronic, thermal, and other applications. In all applications, the high quality dielectric properties of the original amorphous film remain unchanged, which is critical to device functions. Detailed discussions are carried out on processes of structure changes, mechanisms of device operations, and reliability issues. Examples of applications of the new heterogeneous metal oxide thin films on memories, diodes, antifuses, SSI-LEDs, microdisplays, on-chip optical interconnection systems, and nano-heaters are shown and discussed.

Three-mode all-optical (de)multiplexing on a SOI chip

An on-chip three-mode division multiplexing circuit using a simple ADC-based TE0&TE1&TE2 (de)multiplexer is demonstrated to improve the link capacity of on-chip optical interconnects. The proposed (de)multiplexer does not contain any tapered waveguide which is different from the previous mode (de)multiplexer based on ADCs. Here, we choose multimode waveguide width first and then confirm corresponding width of the other two waveguides. Thus the bus waveguide without any tapers can not only reduce complexity of (de)multiplexer but also reduce difficulty of the fabrication. Our simulation results show that the hybrid multiplexer has relatively low loss and low crosstalk about −40 dB, −26.99 dB and −28.72 dB for each mode around 1550 nm with a width-variation w =±25 nm. These properties make the proposed mode-(de)multiplexer suitable for application in high-capacity data transmission.

Ge nanowire photodetector with high photoconductive gain epitaxially integrated on Si substrate

Efficient nanoscale photodetectors are desirable for future applications such as on-chip optical interconnect systems. High density integration, ideally at the transistor level, requires nanoscale photodetectors integrated on Si using a CMOS compatible process. In this study, we demonstrate 20 nm diameter Ge photodetectors based on individual Ge nanowires epitaxially grown on a Si substrate, with a photoconductive gain of 2000 and responsivity of 22.6 A/W operating at 1.55 μm wavelength. The abrupt heterojunction between the Ge nanowire and the Si substrate minimizes the leakage current including generation/recombination and tunneling. The photocurrent amplification can be attributed to the long lifetime of surface state trapped electrons in the Ge nanowires and Ge/Si core/shell nanowires. By increasing the number of active nanowires connected in parallel in a single detector, the photocurrent can be further increased.

Failure Mechanism of Nano-Resistor Devices

Recently, a new type of nano-resistor device was reported by the authors’ group [1-7]. Nano-resistors are formed from the breakdown of an amorphous high-k thin film on a p-type Si wafer [4]. There are many applications of the nano-resistor device. For example, the broad-band light could be emitted from nano-resistors upon the pass of a large current [1-3]. Since the whole device is made of the IC-compatible materials and processes, it can be used as a solid-state incandescent light emitting device (SSI-LED) for the on-chip optical interconnect, microdisplays, etc. [8,9]. It also has antifuse- and diode-like characteristics that are suitable for IC and other electronics [5,6]. Without a passivation layer, the babo0resistor can be operated continuously for over 20,000 hrs in air [7]. In this paper, authors investigated the failure mechanism of the nano-resistor device using the high voltage stress condition. The surface morphology change was also studied. The nano-resistor device was fabricated from a MOS capacitor made of the sputter deposited ZrHfO film on a p-type <100> Si (1015 cm-3). The detailed device fabrication process including the nano-resistors formation can be found in refs. 1-6. The post deposition annealing condition was 800°C, 3 min in N2 and the final annealing condition was 400°C, 5 min in forming gas. Although the device was normally operated at a gate voltage (Vg ) of -20V, in the accelerated failure test, it was stressed Vg = -65 V. Figure 1 shows the top-view graphs of the device after being stressed at Vg = -65 V for 5 min. Fig. 1(a) is the photo of the device under the light emission condition. Compared with the nearly perfect round-shaped and uniformly distributed bright dots under the -20V stress condition, the high voltage stressed device is deteriorated. The shape of the lighted area is not round. A large number of bright dots are accumulated at the edge of the device. This is because the electric field, i.e., from the backside of the wafer to the individual device, on the edge is larger than that away from the edge. Since nano-resistors are formed from the breakdown of the dielectric film, it is natural that more nano-resistors are formed at the edge than near the center. Fig. 1(b) shows the same device without the V g stress. It shows that the damage of the device started from the edge. After a long period of high voltage stress, the complete device is damaged with the whole device showing as black. Figure 2 shows the SEM micrograph of the failed region of the device (a) before and (b) after the stripping of the ITO electrode with an aqua regia solution for 5 min. In Fig. 2(a), the originally flat ITO gate becomes very rough and forms several irregular sharped bumps. This is due to the melt of the ITO layer under the high voltage stress condition. In Fig. 2(b), after the removal of the top ITO gate, the underlying Si surface is also very rough. This proves that Si was molten under the high voltage stress condition because the temperature of the nano-resistor is very high. In summary, the failure of the nano-resistor device starts from the edge due to the local high density of the leakage path from the dielectric breakdown. More detailed discussion of the failure mechanism will be discussed. [1] Y. Kuo et al, APL, 102, 031117 (2013). [2] Y. Kuo et al, ESSL, 2, Q59 (2013). [3] Y. Kuo et al, SSE, 89, 120 (2013). [4] C.-C. Lin et al, APL, 106, 121107 (2015). [5] Y. Kuo, ECST, 67, 183 (2015). [6] Y. Kuo, ECST, 69, 23 (2015). [7] Y. Kuo et al, 63rd AVS Abst. EM-FrM-7, 2016. [8] Y. Kuo, Proc. ISSP 2015, 20-24, 2015. [9] Y. Kuo, Proc. AMFPD ’15, 9-12, 2015. Figure 1

Spectral focusing of broadband silver electroluminescence in nanoscopic FRET-LEDs.

Few inventions have shaped the world like the incandescent bulb. Edison used thermal radiation from ohmically heated conductors, but some noble metals also exhibit 'cold' electroluminescence in percolation films, tunnel diodes, electromigrated nanoparticle aggregates, optical antennas or scanning tunnelling microscopy. The origin of this radiation, which is spectrally broad and depends on applied bias, is controversial given the low radiative yields of electronic transitions. Nanoparticle electroluminescence is particularly intriguing because it involves localized surface-plasmon resonances with large dipole moments. Such plasmons enable very efficient non-radiative fluorescence resonance energy transfer (FRET) coupling to proximal resonant dipole transitions. Here, we demonstrate nanoscopic FRET-light-emitting diodes which exploit the opposite process, energy transfer from silver nanoparticles to exfoliated monolayers of transition-metal dichalcogenides. In diffraction-limited hotspots showing pronounced photon bunching, broadband silver electroluminescence is focused into the narrow excitonic resonance of the atomically thin overlayer. Such devices may offer alternatives to conventional nano-light-emitting diodes in on-chip optical interconnects.

GaN directional couplers for on-chip optical interconnect

Here, we propose, fabricate and characterize GaN directional couplers for on-chip optical interconnect on a GaN-on-silicon platform. Suspended InGaN/GaN multiple-quantum-well diodes are adopted for both the transmitter and the receiver, and GaN directional couplers are used to achieve the light coupling between suspended waveguides that are directly connected to the transmitter and the receiver. The proposed on-chip optical interconnects are experimentally demonstrated by light propagation and in-plane data transmission using visible light. The light propagation images directly show that the emitted light can be laterally coupled into the suspended waveguide, and the guided light from the input waveguide then couples to the coupled waveguide due to the overlapped slab. The receiver detects the transmitted light from the coupled waveguide to complete the in-plane visible light communication process, as confirmed by pseudo-random binary sequence data and eye diagrams at the transmission rate of 30 Mbps.

Study of a slow-light-enhanced membrane photodetector for realizing on-chip interconnection with low power consumption

Slow-light propagation can be used to enhance light–matter interactions such as material loss and gain, which enables the realization of ultracompact photonic devices toward the ultralow-power-consumption on-chip or chip-scale optical interconnection. We designed a slow-light-enhanced waveguide-type GaInAs p–i–n photodetector (PD) by using the three-dimensional finite-difference time domain method. As a result, it was found that a cut-off frequency of 19.6 GHz with moderate output voltage, which was attributed to the high impedance characteristic, can be obtained with a 5.5-μm-long PD.

Microring modulator matrix integrated with mode multiplexer and de-multiplexer for on-chip optical interconnect.

We experimentally demonstrate a 4 × 4 microring modulator matrix integrated with the asymmetrical directional couplers based mode multiplexer and de-multiplexer photonic circuit for on-chip optical interconnect. The inter-mode optical crosstalk of the device is less than -20 dB in the wavelength range from 1525 nm to 1565 nm. Data transmission with a throughput capacity of 4 × 4 × 32 Gbps is achieved by utilizing four wavelengths and four spatial modes multiplexing. We envision this structure as a potential solution to increase the communication capacity for on-chip interconnect within limited chip area.

Communication—Filtration of Light Emitted from Solid State Incandescent Light Emitting Devices

The broad-band light emitted from the solid state incandescent light emitting device was narrowed down by the addition of an a-Si:H or SiNx thin film. The a-Si:H film strongly absorbed the short-wavelength light of below 600 nm. The SiNx film showed interference effect on incident light, i.e., including peaks in the transmittance spectrum. This effect was dependent on the film's refractive index and thickness, which could be controlled by the deposition condition. The Fabry-Perot filter made of the a-Si:H/SiNx stack could be used to filter the broad-band light into a narrow-band light peaked at 850 nm. There are many applications of the filtered light including the on-chip optical interconnect.

Implementation of On-chip Optical Interconnect in High Speed Digital Circuit: Two-stage CMOS Buffer

Implementation of On-chip Optical Interconnect in High Speed Digital Circuit: Two-stage CMOS Buffer

All-optical guided resonance tuning in hybrid GaN/Si microring induced by non-radiatively trapped injected hot electrons.

Advanced Si/III-V nanophotonics that emerged in the last decade has already founded the on-chip optical interconnect technology for future integrated systems on chip. New possibilities of light-on-chip applications beside signal transmissions, such as, all-optical sensing, have been given but small attention. Here, all-optical ultraviolet (UV)-sensitive guided resonance tuning in a hybrid GaN/Si microring resonator (HMR) was studied. Resonance redshifting by free-space UV pumping resulted in a 12 dB guided-mode modulation at the 1560 nm telecommunication wavelength. Investigations by experiments, theory, and simulations indicated the origin of the tuning mechanism from hot-electron heat extraction via defects-assisted non-radiative recombinations and electron-phonon interactions. A photothermal tuning efficiency of 73 pm/mW was attained at a pump power of 850 μW, thank to photothermal energy directly generated in the HMR. The UV-sensitive visible-blind all-optical tuning in the HMR may benefit all-optical UV sensing for the optical data era to come.

A Single Mode Hybrid III–V/Silicon On-Chip Laser Based on Flip-Chip Bonding Technology for Optical Interconnection**Supported by the National Basic Research Program of China under Grant No 2012CB933501, and the National Natural Science Foundation of China under Grant Nos 61307033, 61274070, 61137003 and 61321063.

A single mode hybrid III–V/silicon on-chip laser based on the flip-chip bonding technology for on-chip optical interconnection is demonstrated. A single mode Fabry—Pérot laser structure with micro-structures on an InP ridge waveguide is designed and fabricated on an InP/AlGaInAs multiple quantum well epitaxial layer structure wafer by using i-line lithography. Then, a silicon waveguide platform including a laser mounting stage is designed and fabricated on a silicon-on-insulator substrate. The single mode laser is flip-chip bonded on the laser mounting stage. The lasing light is butt-coupling to the silicon waveguide. The laser power output from a silicon waveguide is 1.3mW, and the threshold is 37mA at room temperature and continuous wave operation.

Silicon Add-Drop Filter Based on Multimode Grating Assisted Couplers

We demonstrate the design, fabrication, and characterization of a two-mode silicon add-drop filter, which is based on multimode grating-assisted contra-directional couplers. The mode conversions between two asymmetry strip waveguides are realized by using spatially periodic corrugations in one side wall of a multimode waveguide at the phase-match condition. Experimental results show that the fundamental mode of a single-mode waveguide is successfully coupled to the first two modes of the multimode waveguide in the opposite direction. The corresponding mode conversion bandwidths and extinction ratios are also measured. The demonstrated add-drop filter may find their applications in a hybrid multiplexing system by combing wavelength-division multiplexing technology and mode-division multiplexing technology for on-chip optical interconnect.

Design of oxide-confined and temperature stable long wavelength Vertical Cavity Surface Emitting Laser for optical interconnects

One of the important attributes of Vertical Cavity Surface Emitting Laser for applications in optical interconnects is stable high temperature performance. In addition to temperature insensitivity, power dissipation is other major concern in the field of on-chip optical interconnects. With ever increasing chip size and functionalities, researchers are aggressively looking for temperature stability and power reduction in each department. Also the future emerging system of on-chip devices require long wavelength laser for high capacity applications. This paper deals with the designing of oxide-confined VCSEL structure operating at long wavelength i.e. 1310nm. Atlas Silvaco frame work is used to design VCSEL and to analyze its electrical and thermal behavior with state of the art modules. The static properties of the proposed VCSEL are analyzed at different oxide aperture diameter and temperature. It is observed that the future obligatory performance can be attained with this proposed design of VCSEL structure model even operating at low current densities and reduced oxide-aperture diameter equal to 3μm. The average error between the simulated and analytical power conversion efficiency is less than 5%.