Ohmic Contact Metallization Research Articles

Comparative study of Ti/Al and Ti/Al/Ti/Au ohmic contacts to AlGaN/GaN heterostructures

We investigated the electrical properties and the ohmic contact formation considering Ti/Al and Ti/Al/Ti/Au ohmic contact metallization schemes on AlGaN/GaN heterostructures. The specific contact resistance of contacts was determined by characterizing the current–voltage relation from TLM measurement. The lowest value for the specific contact resistivity was obtained using Ti/Al/Ti/Au metallization. An interfacial TiN layer was monitored at the contact-AlGaN interface. TiN phases were found at both contacts, but the thickness in the Ti/Al/Ti/Au contact reached 8 nm, while the thickness in Ti/Al was thinner and discontinuous. The surface roughness of the Ti/Al/Ti/Au contact was determined as 8.17 nm and that of the Ti/Al contact as 36.23 nm. It was found that the spesific contact resistance depends on the atomic structure of the metal–semiconductor interface and composition and structure of the ohmic contact layers. These results showed that it is possible to achieve higher reliability and uniformity as well as lower contact resistance in AlGaN/GaN HEMTs with Ti/Al/Ti/Au contact compared to Ti/Al contact.

Investigation of AlGaN UV emitting tunnel junction LED devices by off-axis electron holography

Here we use off-axis electron holography combined with advanced transmission electron microscopy techniques to understand the opto-electronic properties of AlGaN tunnel junction (TJ)-light-emitting diode (LED) devices for ultraviolet emission. Four identical AlGaN LED devices emitting at 290 nm have been grown by metal–organic chemical vapour deposition. Then Ge doped n-type regions with and without InGaN or GaN interlayers (IL) have been grown by molecular beam epitaxy onto the top Mg doped p-type layer to form a TJ and hence a high quality ohmic metal contact. Off-axis electron holography has then been used to demonstrate a reduction in the width of the TJ from 9.5 to 4.1 nm when an InGaN IL is used. As such we demonstrate that off-axis electron holography can be used to reproducibly measure nm-scale changes in electrostatic potential in highly defected and challenging materials such as AlGaN and that systematic studies of devices can be performed. The LED devices are then characterized using standard opto-electric techniques and the improvements in the performance of the LEDs are correlated with the electron holography results.

Ultraviolet-B Resonant-Cavity Light-Emitting Diodes with Tunnel Junctions and Dielectric Mirrors.

We demonstrate the first electrically injected AlGaN-based ultraviolet-B resonant-cavity light-emitting diode (RCLED). The devices feature dielectric SiO2/HfO2 distributed Bragg reflectors enabled by tunnel junctions (TJs) for lateral current spreading. A highly doped n++-AlGaN/n++-GaN/p++-AlGaN TJ and a top n-AlGaN current spreading layer are used as transparent contacts, resulting in a good current spreading up to an active region mesa diameter of 120 μm. To access the N-face side of the device, the substrate is removed by electrochemically etching a sacrificial n-AlGaN layer, leading to a smooth underetched surface without evident parasitic etching in the n- and n++-doped layers of the device. The RCLEDs show a narrow emission spectrum with a full width at half-maximum (FWHM) of 4.3 nm compared to 9.4 nm for an ordinary LED and a more directional emission pattern with an angular FWHM of 52° for the resonance at 310 nm in comparison to ∼126° for an LED. Additionally, the RCLEDs show a much more stable emission spectrum with temperature with a red-shift of the electroluminescence peak of about ∼18 pm/K and a negligible change of the FWHM compared to LEDs, which shift ∼30 pm/K and show spectrum broadening with temperature. The demonstration of those devices, where a highly reflective mirror is spatially separated from an ohmic metal contact, opens up a new design space to potentially increase the poor light extraction efficiency in UV LEDs and is an important step toward electrically injected UV vertical-cavity surface-emitting lasers.

Microscopic insights into metal diffusion and ohmic contact formation in delta-doped GaAs/(Al,Ga)As core/shell nanowires

Semiconductor nanowires (NWs) are promising candidates for use in electronic and optoelectronic applications, offering numerous advantages over their thin film counterparts. Their performance relies heavily on the quality of the contacts to the NW, which should exhibit ohmic behavior with low resistance and should be formed in a reproducible manner. In the case of heterostructure NWs for high-mobility applications that host a two-dimensional electron gas, ohmic contacts are particularly challenging to implement since the NW core constituting the conduction channel is away from the NW surface. We investigated contact formation to modulation-doped GaAs/(Al,Ga)As core/shell NWs using scanning transmission electron microscopy, energy dispersive x-ray spectroscopy and electron tomography to correlate microstructure, diffusion profile and chemical composition of the NW contact region with the current–voltage (I–V) characteristics of the contacted NWs. Our results illustrate how diffusion, alloying and phase formation processes essential to the effective formation of ohmic contacts are more intricate than in planar layers, leading to reproducibility challenges even when the processing conditions are the same. We demonstrate that the NW geometry plays a crucial role in the creation of good contacts. Both ohmic and rectifying contacts were obtained under nominally identical processing conditions. Furthermore, the presence of Ge in the NW core, in the absence of Au and Ni, was found as the key factor leading to ohmic contacts. The analysis contributes to the current understanding of ohmic contact formation to heterostructure core/shell NWs offering pathways to enhance the reproducibility and further optimization of such NW contacts.

Effect of Dry Etching to Improve Ohmic Contacts on Bulk, Lightly-Doped β-Ga2O3

Ti/Au is a typical Ohmic metal contact stack to n-type β-Ga2O3 but there have been few systematic studies of the use of pre-exposure of the surface to plasmas prior to metal deposition in order to lower the contact resistance. The effects of Cl2/Ar Inductively Coupled Plasma exposure of Ga2O3 surfaces prior to deposition of Ti/Au (20/80 nm) contacts were examined through circular transfer length method (CTLM) measurements to determine both the contact resistance and specific contact resistivity. ICP source power, which controls ion density in the plasma is found to be more important than ion energy (∼165–490 eV in these experiments). The plasma exposure improved specific contact resistivity by more than a factor of 2 in all cases for lightly n-type (1017 cm−3) Ga2O3 and a minimum value of 2 × 10−4 Ω.cm2 was obtained after heating at 550 °C.

Wet Chemical Treatment and Mg Doping of p‐InP Surfaces for Ohmic Low‐Resistive Metal Contacts

Manufacturing a low‐resistive Ohmic metal contact on p‐type InP crystals for various applications is a challenge because of the Fermi‐level pinning via surface defects and the diffusion of p‐type doping atoms in InP. Development of wet‐chemistry treatments and nanoscale control of p‐doping for InP surfaces is crucial for decreasing the device resistivity losses and durability problems. Herein, a proper combination of HCl‐based solution immersion, which directly provides an unusual wet chemical‐induced InP(100)c(2 × 2) atomic structure, and low‐temperature Mg‐surface doping of the cleaned InP before Ni‐film deposition is demonstrated to decrease the contact resistivity of Ni/p‐InP by the factor of 10 approximately as compared to the lowest reference value without Mg. Deposition of the Mg intermediate layer on p‐InP and postheating of Mg/p‐InP at 350 °C, both performed in ultrahigh‐vacuum (UHV) chamber, lead to intermixing of Mg and InP elements according to X‐ray photoelectron spectroscopy. Introducing a small oxygen gas background (O2 ≈ 10−6 mbar) in UHV chamber during the postheating of Mg/p‐InP enhances the indium outdiffusion and provides the lowest contact resistivity. Quantum mechanical simulations indicate that the presence of InP native oxide or/and metal indium alloy at the interface increases In diffusion.

Effect of TiN barrier layer in Cu-based ohmic contact of AlGaN/GaN high electron mobility transistor

Ti/TiN/Cu is established to be an enabling alternative to the better-known Au-based ohmic contact metals such as Ti/Al/Ni/Au. The Cu-based option delivers lower contact resistance and smoother surface morphology and is proven to be compatible with AlGaN/GaN high-electron-mobility transistors (HEMTs) device processing. The TiN layer serves as an effective Cu-diffusion barrier as no detectable Cu-diffusion was observed when subjected to thermal treatment up to 600 °C. There is a tendency of N-diffusion across the Ti/GaN interface near which N-deficiency in the GaN epitaxial layer and formation of a nano-sheath of TiN were found. This ultrathin layer of TiN works to further improve the ohmic performance of the electric contact, as reflected in lowered contact resistivity ρ C . It is possible to manufacture the TiN thin films with low sheet resistance at a high deposition rate by adjusting the ratios between argon and nitrogen gas flows during sputtering deposition. Contact resistivity ρ C , tested for the AlGaN/GaN HEMT devices fabricated on Si substrate according to the transmission line method standard was found to be as low as 3.65 × 10−6 Ω cm2 (R C = 0.54 Ω mm). The outcomes benchmark favorably against many reported metal-stacking structures for ohmic contacts. The robustness of surface morphology and interface sharpness against thermal treatments make the established ohmic stack structures suitable for scalable device fabrications.

(Invited, Digital Presentation) Oxide TFTs Based on Semiconductors and Semimetals

Oxide semiconductors have opened a new era for large-area, flexible and transparent applications. Despite the progresses, a bottleneck issue of oxide thin-film transistors (TFTs) is the instability either under bias stress or when used as a current source. Furthermore, the carrier mobility and current driving capability need to be improved for high-spec displays. It is still hugely challenging to overcome both issues using the conventional device structure and oxide semiconductor materials.Here, we review our recent work on novel oxide TFTs that show a few desirable properties. Rather than using an ohmic metal contact as the source electrode, a high work-function Schottky source contact enables depletion around the TFT source region, which results in intrinsic immunity to the negative bias illumination stress, no obvious short channel effect, and superb current saturation over a wide range of drain voltage1. The flat saturation current gives rise to an extremely high voltage gain reaching 23,000, which is, to the best of our knowledge, the highest gain ever achieved by a solid-state transistor to date. The threshold voltage is also found to remain stable under different drain voltages, in contrast to standard TFTs, which may be useful in larger-area displays where the drain voltages of the drive TFTs can differ2. Furthermore, the depletion provided by the Schottky source electrode allows utilizing semi-metal ITO to replace IGZO as the TFT channel layer, which significantly enhances the carrier mobility and current driving capability. Other related work may also be discussed in the talk including oxide Schottky diodes operating beyond 10 GHz3, oxide TFTs operating beyond 1 GHz4, significantly enhanced carrier mobility by self-assembled monolayer treatment5,6, and CMOS-like oxide-based logic circuits7,8. References Extremely high-gain source-gated transistors, J Zhang, J Wilson, G Auton, Y Wang, M Xu, Q Xin, A Song, Proceedings of the National Academy of Sciences 116 (11), 4843-4848 (2019)Comparative Study of Short-Channel Effects Between Source-Gated Transistors and Standard Thin-Film Transistors, Zhenze Wang, Li Luo, Yiming Wang, Jiawei Zhang, and Aimin Song, IEEE Transactions on Electron Devices, 69(2), 561 - 566 (2022).Flexible indium–gallium–zinc–oxide Schottky diode operating beyond 2.45 GHz, J Zhang, Y Li, B Zhang, H Wang, Q Xin, A Song, Nature communications 6 (1), 1-7 (2015).Amorphous-InGaZnO thin-film transistors operating beyond 1 GHz achieved by optimizing the channel and gate dimensions, Y Wang, J Yang, H Wang, J Zhang, H Li, G Zhu, Y Shi, Y Li, Q Wang, Qian Xin, Zhongchao Fan, Fuhua Yang, Aimin Song, IEEE Transactions on Electron Devices 65 (4), 1377-1382 (2018).Significant Performance Improvement of Oxide Thin‐Film Transistors by a Self‐Assembled Monolayer Treatment, W Cai, J Zhang, J Wilson, J Brownless, S Park, L Majewski, A Song, Advanced Electronic Materials 6 (5), 1901421 (2020).Significant performance enhancement of very thin InGaZnO thin-film transistors by a self-assembled monolayer treatment, W Cai, J Wilson, J Zhang, J Brownless, X Zhang, LA Majewski, A Song, ACS Applied Electronic Materials 2 (1), 301-308 (2020).Complementary integrated circuits based on p-type SnO and n-type IGZO thin-film transistors, Y Li, J Yang, Y Wang, P Ma, Y Yuan, J Zhang, Z Lin, L Zhou, Q Xin, Aimin Song, IEEE Electron Device Letters 39 (2), 208-211 (2017).Thin Film Sequential Circuits: Flip-Flops and a Counter Based on p-SnO and n-InGaZnO, Y Yuan, J Yang, Y Wang, Z Hu, L Zhou, Q Xin, A Song, IEEE Electron Device Letters 42 (1), 62-65 (2020).

Cost-Effective Formation of Ti/Ni/Ti/Au Ohmic Contacts to n-type SiC Using SiO2 Encapsulation Layer during Phosphorous Implant Activation

The purpose of this research is to develop a cost-effective formation of ohmic contacts to n-type SiC through ion implantation and activation. Although Nitrogen is commonly used as an n-type dopant, especially for in-situ doping during epitaxial growth, Phosphorus was chosen as dopant for this work due to the following reasons: Phosphorus has higher solubility than Nitrogen. Thus, it is easier to achieve higher concentration locally through ion implantation, which is needed for quality ohmic contact.Phosphorous has a higher activation rate at lower activation temperature, which could be beneficial if the availability of furnace equipment and cap layer material is limited.Phosphorus-implanted doping profile can be accurately detected through SIMS analysis against a constant in-situ doped nitrogen background doping of the n-type epi layer. Phosphorus was implanted using the implantation series shown in Table 1. As indicated, the three multiple energy implants, with the highest energy of 200keV and the lowest energy of 50keV, will form a 200-nm-deep box profile against a n- epitaxial layer (0.4μm, 2×1017cm-3) used as a RESURF layer for device fabrication (see Figure 1 and 2). Obtaining a good box profile with high doping concentration is necessary in achieving quality ohmic contact with low contact resistance.After ion implantation, the dopants must be thermally activated, and crystal damage must be recovered through annealing at high temperature between 1400~1700°C. The process of ion implantation and activation is shown in Figure 1. Traditionally, cap layers, such as pyrolyzed negative photoresist and AlN, have been used during implant activation to prevent surface deterioration. But using pyrolyzed negative photoresist as a cap layer requires a complex furnace setup, where inert gasses, such as Ar or N2, are needed to prevent the cap layer from oxidizing and evaporating. The deposition of a thick AlN layer requires a DC sputtering system where a 3-inch AlN sputtering target could cost over $500~. The AlN cap layer also requires KOH etch for removal after activation, which can also etch the SiC layer underneath. Because of the above reasons, we propose the use of 1µm thick SiO2 to encapsulate the front and back of implanted sample using PECVD deposition. The SiO2 encapsulation layer withstands temperature up to ~1500°C in air ambient, and the activation temperature and the ambient are set to these values for evaluation and analysis. As shown in Figure 3, if there is sufficient thickness (>1µm) of SiO2, the surface is protected from the deterioration caused by high temperature, and surface roughness is suppressed to the minimum as summarized in Table 2.Ti/Ni/Ti/Au (20nm/90nm/5nm/120nm) were deposited using e-beam evaporation system and annealed at 1050℃ for 2min using Heatpulse 610 RTA (Rapid Thermal Annealing) system in N2 ambient. This unique metal contact stacks are effective in forming quality ohmic contacts even when oxidation during annealing is inevitable. It has been widely understood that only Ni layer is necessary to form nickel silicide during thermal formation of ohmic contacts, but when oxygen is present from incomplete inert gas ambient or poor vacuum conditions, contact layer surface starts to oxides, forming a green NiO (nickel oxide) layer. This unwanted layer significantly deteriorates current conduction. The Ti layer (5nm) over the Ni layer in the proposed metal stacks reacts with oxygen easily, preventing further oxidation inward and achieving quality ohmic contact through effective nickel silicide formation. Even when state-of-the-art semiconductor fabrication equipment is unavailable, the proposed ohmic metal contact stacks will still be effective.Two-contact two-terminal patterns using the above ohmic metal stacks were initially fabricated for the confirmation of activation process. The plots in Figure 5 show the current conduction capability of evaluation pattern with an activation temperature of 1300°C and 1500°C, compared with a non-implanted epitaxial layer. As shown in the figure, with 1300°C annealing, the activation ratio is only ~20% and negative effects from the epi layer degradation dominates over carrier activation. Whereas, with 1500°C annealing, the activation ratio is roughly 70% and current conduction increases by a factor of 4 through the dopant activation process.The specific contact resistance ρC is significantly improved through N+ implant with an obtained value of 2.461×10-5 Ω·cm2 from the TLM evaluation plot in Figure 6. While the N+ implant is effective in reducing contact resistance, the high temperature activation annealing still slightly deteriorates the conductivity of the drift layer, where increase in sheet resistance RS is observed.The proposed ohmic metal stacks and SiO2 encapsulation enable cost-effective formation of ohmic contacts to n-type SiC where complex fabrication equipment setup is unavailable. Figure 1

4.7 Kv Reverse Breakdown Voltage Ultra-Thin Double-Layered NiO/β-Ga2O3 p-n Junction Rectifiers

In this study, we present a double-layer NiO/β-Ga2O3 p-n heterojunction diode, which exhibits high performance with breakdown voltage, on-resistance and turn-on voltage. β-Ga2O3 has been attracting great attention as one of the excellent materials for next-generation high-performance electronics, owing to its high Baliga’s figure-of-merit (BFOM), carrier mobility, critical breakdown field strength and low-cost, simple growth methods. β-Ga2O3 based unipolar devices, especially Schottky barrier diodes, have been developed rapidly; however, the lack of p-type doping in Ga2O3 remains a challenge for bipolar devices, which can more generally be utilized in practical applications. One of the possible strategies is to introduce a p-type material to construct p-n junctions with n-type β-Ga2O3. The NiO turns out to be a feasible p-type material that has a wide bandgap, adjustable doping concentration, intrinsic p-type conductivity and diverse deposition techniques to form a uniform film, such as sputtering, PLD and thermal oxidation. In this study, we fabricated the diodes from depositing Ti/Au for the back Ohmic contact metal and annealing at 550℃ in N2, followed by sputtering two NiO layers with different doping concentrations by tuning the ratio of Ar/O2. The Ni/Au contact metal was deposited onto the NiO layer after annealing at 300℃ under O2 ambient. Compared to typical NiO thicknesses of 300 to 500 nm, we turned to another trend with ultra-thin layers of NiO. The top layer NiO thickness is 10nm while the bottom layer of NiO thickness varies from 10 to 80 nm. Through the design of the ultra-thin (20 nm) double-layer NiO structure, the breakdown voltage (Vb) is substantially improved to 4.7 kV and demonstrates the on-resistance (Ron) of 11.3 mΩ·cm2, which leads to a figure-of-merit (Vb 2/Ron) of 2 GW/cm2. The high Vb is attributed to the structure of both the double-layer and the guard-ring designs. From the TCAD simulation, the peak of the electric field locates at the edge of the diodes. Increasing the doping concentration of NiO layer contact with Ni/Au can reduce the electric field on the edge of the Ohmic contact. On the other hand, the low doping concentration of the NiO contact with β-Ga2O3 can effectively move the electric field crowding on the edge to the inside of devices. In addition, the extension guard ring can also spread the electric field crowding. This work provides a desirable design strategy for p-n heterojunction, which has the highest breakdown voltage among all Ga2O3-based p-n diodes. Figure 1

A computational study of electrical contacts to all-inorganic perovskite CsPbBr3

All-inorganic halide perovskites are promising candidates for optoelectronic devices due to their excellent physicochemical properties and better thermal stability than their hybrid counterparts. The electrical contact to perovskite plays a crucial role in determining the device’s performance. This paper investigated the contacts of two types of CsPbBr3 surface to a series of metals (Pd, In, Pb, Zr, Ti, Zn, graphene, and Ti3C2) through first-principles calculations. On the PbBr2-terminated surface, all the studied metals form Schottky contacts with minimum barriers ranging from 0.63 to 0.97 eV. On the CsBr-terminated surface, Ti and Ti3C2 forms n-type Ohmic contacts while others form Schottky contacts with minimum barriers ranging from 0.25 to 0.97 eV. Ti3C2, considering the small Schottky barrier, large tunneling barrier, and high electronic localization function, is found to be proper ohmic metal contacts with the CsBr-terminated surface. In addition, a −16.4% to 15.1% change in the size of the CsPbBr3 band gap is found because of the interfacial interaction. The Fermi pinning factor of the CsPbBr3-metal contact is estimated via a modified method considering the gap change, and that of the PbBr2-terminated one is slightly larger than that of the CsBr-terminated one, indicating a more flexible Schottky barrier in the former through changing the metal work function. This work presents a comprehensive understanding of metal contacts to all-inorganic perovskite CsPbBr3 and offers theoretical guidance for preparing high-performance inorganic perovskite photoelectric devices.

Rhenium-based low resistivity and low annealing temperature ohmic contacts to n-GaN

We report an ohmic contact metallization scheme for n-GaN based on a Re–Al–Ni–Au multilayer stack that offers low-resistivity and provides better edge sharpness and lower surface roughness at reduced annealing temperature compared to standard Ti–Al-based metallization. We studied three sets of samples with Re thicknesses of 10, 30, and 60 nm and measured specific contact resistances using the circular transmission line method. We obtained reliable ohmic contacts with specific contact resistance of the order of 10−6 Ω cm2 at 550 °C temperature with the contact stack having a large annealing temperature window of >300 °C for resistivity below 5 × 10−6 Ω cm2. The lowest contact resistivity, below 10−7 Ω cm2, is achieved at annealing temperature around 650–700 °C. A reduction in surface roughness by a factor of 4, with excellent edge definition for Re >30 nm thickness is observed as compared to Ti–Al contacts. Grazing incidence x-ray diffraction and electron dispersive x-ray spectroscopy (EDS) show intermetallic phases of RexNy, Re–Al–Ni, Al–Re, and Al–Au being formed. Atomic force microscope and EDS measurements show the formation of crystalline Re–Al–Ni agglomerates, surrounded by phases of AlAu2 and Al2Au5. The presence of Re seems to suppress the formation of viscous AlAu4 phase, thus minimizing the lateral flow of the metals and providing better edge acuity. The temperature dependence of contact resistivity suggests a field-emission mechanism for current transport across the contact. Our results show that Re-based ohmic contacts, with their lower annealing temperature and excellent edge definition, may offer a promising alternative to Ti–Al contacts.

Low-Resistance Ti/Au Ohmic Contact on (001) Plane Ga2O3 Crystal

We studied the Ti/Au Ohmic contact on (001) plane Ga2O3 single crystal wafer as a function of annealing temperature and crystallographic orientation. The lowest specific contact resistances of ∼5 × 10−4 Ω·cm2 were obtained at 400 °C annealing temperature under nitrogen ambience. The Ohmic metal contact became degraded when annealed above 500 °C. The formation of Ti oxide might be responsible for the degradation of Ohmic contact at high annealing temperatures. In comparison with (010) Ga2O3 substrate, the Ohmic contact could be more easily formed on and (001) Ga2O3 planes, possibly due to high surface energy and dangling bond density. It is notable that the contact properties did not show any particular dependence on in-plane azimuth angles on (001) Ga2O3 substrate.

Temperature dependence of the strain of the AlGaN barrier layer under the gate in AlGaN/AlN/GaN HFETs

By a combination of electrical measurement, the Debye model and the basic theory of polarization, the strain of AlGaN barrier layer underneath the gate in two AlGaN/AlN/GaN HFETs at the same ratio of gate length (LG) to source-drain distance (LSD) but with different dimensions is investigated at temperatures from 300 ​K to 450 ​K. It is found that temperatures have important influence on this strain. Furthermore, the temperature dependence of the strain is found related to device dimensions, a phenomenon that can be explained by the Ohmic contact metal atoms diffusion nearby the Ohmic electrode and lattice mismatch underneath the gate electrode. This study is conducive to understanding the effect of temperatures on the polarization Coulomb field (PCF) scattering, which has been verified to be a significant scattering mechanism affecting the performance of AlGaN/AlN/GaN HFETs.

Study of Scandium Based Ohmic Contacts to AlGaN/GaN Heterostructures

Development of semiconductor devices based on AlGaN/GaN heterostructure requires study and improvement of ohmic contacts, whose necessary improvement lies in process of checking new metallic compositions and thermal formation process parameters. Usually, in metallic ohmic annealed contacts of AlGaN/GaN heterostructures, titanium is applied as the first layer, but scandium may be an alternative. It was proved to be useful to obtain both ohmic and Schottky characteristics, depending on annealing temperature of the contact. In the presented research, contacts including scandium (Sc/Al/Mo/Au) were fabricated, and, as reference sample, contacts with titanium including metallziation (Ti/Al/Mo/Au). Reference sample was annealed at 825°C, and forming temperatures for scandium contacts were 825°C, 625°C, and 425°C. All samples after thermal formation process were additionally thickened with Ru/Au bilayer. To quickly compare level of metals in metallization mixing during formation process and to check applicability of EDS (Energy-Dispersive X-ray Spectroscopy), the simulations of electrons trajectories and EDS point scans were performed.

Van der Waals crystal radio with Pt/MoSe2 Schottky diode and h-BN capacitor for RF energy harvesting

Two-dimensional (2D) semiconductor-based devices are mostly using in-plane direction current in their device architecture, to justify the novelty of 2D-like ultrathin electron devices beyond conventional 3D devices. Those ultrathin 2D devices, however, would unavoidably meet high contact resistance issue. In the present study, thick 2D-layered crystals are rather chosen for a meaningful vertical device, which alleviates the contact resistance issue using a large contact area. Here, we have fabricated Pt/120 nm-thick MoSe2 Schottky diodes with different Ohmic metal contacts of Au, Ti/Au, and MoTi/Au. These diodes are then monolithically integrated with a capacitor of ~20 nm-thick h-BN or 50 nm-thick ALD Al2O3. This way, van der Waals crystal radios are successfully fabricated for wireless RF energy harvesting. In terms of crystal radio device performance, the best results come from Pt/n-MoSe2 Schottky diode with MoTi contact and h-BN capacitor combination. This superiority is attributed to the excellent Ohmic behavior of MoTi alloy contact. At last, when AM demodulation experiments are conducted with 1 MHz carrier frequency/audio frequency-mixed signals, the crystal radio with MoTi demonstrates the highest output DC voltage envelope, allowing loud audio sound.

Au‐Free Ohmic Contacts and Their Impact on Sub‐Contact Charge Carrier Concentration in AlGaN/GaN Heterostructures

The impact of an Au‐free Ti/Al/Ti/TiN (20/100/20/80 nm) ohmic contact metallization on an Al0.21Ga0.79N/GaN heterostructure is investigated. Using the transfer length method and Hall measurements, the sheet resistance and the carrier concentration below the contact are analyzed, depending on the post‐deposition annealing temperature. It is shown that with increasing annealing temperature, the carrier density below the contact is enhanced. This is caused by the contact formation mechanism, leading to an extremely low contact end resistance to the sub‐contact region of 0.04 Ω mm. However, while the sub‐contact semiconductor resistance is low, the contact (front) resistance to the device channel is 0.74 Ω mm after annealing at 900 °C, indicating a depletion of the sub‐contact 2D electron gas because of alloy formation.

(Invited) The Application of ALD and ALE Passivated MicroLED Display

Micro LED has been engaged to the next generation display technology and evolved for various applications from several electronic manufacturers and institutions. The less than 10×10 μm2 area of micro-LEDs is desired for the high pixel per inch (PPI) of micro display but the sidewall effect from etching process will drop the quantum efficiency. Therefore, a good passivation process is essential to be introduced into micro-LED process to overcome the efficiency droop issue. The passivation technique of atomic layer deposition (ALD) enables to improve the sidewall damages from dry etching and hence the quantum efficiency of micro-LEDs can be enhanced [1, 2]. Furthermore, the improvement can be enhanced within smaller size of micro LEDs. In particular, due to the excellent uniformity and step coverage passivation by ALD Al2O3 thin films, the interest in efficient ALD equipment has gradually increased. The atomic layer etching (ALE) is an advance etching process that promises an excellent depth control in shallow device structures. This paper provides an overview of ALD and ALE process for improving the micro-LED performance.The epitaxial structure of the micro-LED structures was grown on a c-plane sapphire substrate using metal-organic chemical vapor deposition (MOCVD). Following the development of MOCVD, a transparent and ohmic p-contact of indium tin oxide (ITO) with a thickness of 100 nm was deposited by electron-beam evaporation as a transparent and ohmic p-contact. The ITO layer can result in efficient electrical current spreading and provide a transparent emission window for topside emitting devices. N-type GaN, p-type GaN, and the multiple quantum wells (MQWs) active region, which consists of twelve pairs of InGaN wells and a GaN barrier with an emission wavelength of around 445 nm, are the major epitaxial layers. The growth phases of micro-LED processing included mesa etching, ohmic contact metallization, sidewall passivation deposition using Al2O3 of thickness 21.3 nm and SiO2 of thickness 300 nm, and interconnects. The inductively coupled plasma (ICP) dry etching process is used for the mesa etching method, and SiO2 and Al2O3 passivation layers are deposited using PECVD and ALD techniques. Since Al2O3 and SiO2 are well-known dielectric materials for photonic applications, they were selected. Because of the field effect passivation produced by negative fixed charges, Al2O3 has emerged as a unique passivation material for commercial solar cells. The passivation layers tend to prevent surface recombination and reabsorption of emitted light near the etched surface during forward-biased activity. Following the deposition of the dielectric passivation layers, a hole was created using the ICP etching technique for the deposition of metal contacts. The electrode metal consisted of 50/300 nm of Ti/Au for p- and n- metal contacts deposited using electron-beam evaporation followed by rapid thermal annealing. The process flow of ALD passivated micro-LED is shown in Fig. 1(a).Fig. 1(b) showed the effect of the ALD-Al2O3 passivation technique on the EQE enhancement of µ-LEDs. According to the literature, the peak EQE of a small LED is considerably small due to the surface and nonradiative recombination of the mesa layer caused by plasma-assisted dry etching. ALD sidewall passivation is an important method for reducing plasma damage in LEDs. We can observe the 21.3 nm Al2O3 passivation on micro-LED in Fig.1(a). Therefore, Fig. 1 (b) presents the EQEs of 10 × 10-µm2 µ-LEDs with and without an Al2O3 passivation layer deposited using the ALD technology for reducing plasma damage. Compared with the device not subjected to ALD-Al2O3 passivation, the 10 × 10-µm2 array subjected to ALD-Al2O3 passivation exhibited an EQE enhancement of 37.5%. This result proves that ALD sidewall passivation can effectively reduce the sidewall damage caused by SRH nonradiative recombination and thus increase the EQE of small LEDs.

Monolithic lateral p–n junction GaAs nanowire diodes via selective lateral epitaxy

Semiconductor p–n junctions are essential building blocks of electronic and optoelectronic devices. Although vertical p–n junction structures can be formed readily by growing in sequence, lateral p–n junctions normal to surface direction can only be formed on specially patterned substrates or by post-growth implantation of one type of dopant while protecting the oppositely doped side. In this study, we report the monolithic formation of lateral p–n junctions in GaAs nanowires (NWs) on a planar substrate sequentially through the Au-assisted vapor–liquid–solid selective lateral epitaxy using metalorganic chemical vapor deposition. p-type and n-type segments are formed by modulating the gas phase flow of p-type (diethylzinc) and n-type (disilane) precursors in situ during nanowire growth, allowing independent sequential control of p- and n-doping levels self-aligned in-plane in a single growth run. The p–n junctions formed are electrically characterized by fabricating arrays of p–n junction NW diodes with coplanar ohmic metal contacts and two-terminal I–V measurements. The lateral p–n diode exhibits a 2.15 ideality factor and a rectification ratio of ∼106. The electron beam-induced current measurement confirms the junction position. The extracted minority carrier diffusion length is much higher compared to those previously reported, suggesting a low surface recombination velocity in these lateral NWp–n diodes.

Comparison of n and p type Si-based Schottky photodiode with interlayered Congo red dye

We synthesized a thin film of Au nanoparticles-decorated Congo red (CR) dye on both n-Si and p-Si substrates by the spin coating technique. UV–Vis spectrometer was used to determine the absorbance and band gap of the CR film. Transmission electron microscope (TEM) was used to assess the distribution of Au nanoparticles on the CR dye film. Then, the metal-semiconductor devices were fabricated by evaporation of Co metal and Al ohmic contacts on the front and back surfaces of the CR film-covered substrates, respectively. Thus, Co/CR:Au/n-Si and Co/CR:Au/p-Si Schottky photodiodes were fabricated and characterized by I–V measurements under dark and various light power illumination intensities at room temperature. The devices exhibited good rectifying behaviors and low barrier heights. Various diode parameters such as ideality factor, barrier height, and series resistance values were calculated and compared for the two fabricated photodiodes. The Co/CR:Au/n-Si and Co/CR:Au/p-Si devices exhibited good photodiode and photodetector properties. Various detection parameters revealed that the obtained devices can be improved for optoelectronic applications.